perf jevents: Program to convert JSON file
This is a modified version of an earlier patch by Andi Kleen.
We expect architectures to create JSON files describing the performance
monitoring (PMU) events that each CPU model/family of the architecture
supports.
Following is an example of the JSON file entry for an x86 event:
[
...
{
"EventCode": "0x00",
"UMask": "0x01",
"EventName": "INST_RETIRED.ANY",
"BriefDescription": "Instructions retired from execution.",
"PublicDescription": "Instructions retired from execution.",
"Counter": "Fixed counter 1",
"CounterHTOff": "Fixed counter 1",
"SampleAfterValue": "2000003",
"SampleAfterValue": "2000003",
"MSRIndex": "0",
"MSRValue": "0",
"TakenAlone": "0",
"CounterMask": "0",
"Invert": "0",
"AnyThread": "0",
"EdgeDetect": "0",
"PEBS": "0",
"PRECISE_STORE": "0",
"Errata": "null",
"Offcore": "0"
},
...
]
All the PMU events supported by a CPU model/family must be grouped into
"topics" such as "Pipelining", "Floating-point", "Virtual-memory" etc.
All events belonging to a topic must be placed in a separate JSON file
(eg: "Pipelining.json") and all the topic JSON files for a CPU model must
be in a separate directory.
Eg: for the CPU model "Silvermont_core":
$ ls tools/perf/pmu-events/arch/x86/Silvermont_core
Floating-point.json
Memory.json
Other.json
Pipelining.json
Virtualmemory.json
Finally, to allow multiple CPU models to share a single set of JSON files,
architectures must provide a mapping between a model and its set of events:
$ grep Silvermont tools/perf/pmu-events/arch/x86/mapfile.csv
GenuineIntel-6-4D,V13,Silvermont_core,core
GenuineIntel-6-4C,V13,Silvermont_core,core
which maps each CPU, identified by [vendor, family, model, version, type]
to a directory of JSON files. Thus two (or more) CPU models support the
set of PMU events listed in the directory.
tools/perf/pmu-events/arch/x86/Silvermont_core/
Given this organization of files, the program, jevents:
- locates all JSON files for each CPU-model of the architecture,
- parses all JSON files for the CPU-model and generates a C-style
"PMU-events table" (pmu-events.c) for the model
- locates a mapfile for the architecture
- builds a global table, mapping each model of CPU to the corresponding
PMU-events table.
The 'pmu-events.c' is generated when building perf and added to libperf.a.
The global table pmu_events_map[] table in this pmu-events.c will be used
in perf in a follow-on patch.
If the architecture does not have any JSON files or there is an error in
processing them, an empty mapping file is created. This would allow the
build of perf to proceed even if we are not able to provide aliases for
events.
The parser for JSON files allows parsing Intel style JSON event files. This
allows to use an Intel event list directly with perf. The Intel event lists
can be quite large and are too big to store in unswappable kernel memory.
The conversion from JSON to C-style is straight forward. The parser knows
(very little) Intel specific information, and can be easily extended to
handle fields for other CPUs.
The parser code is partially shared with an independent parsing library,
which is 2-clause BSD licensed. To avoid any conflicts I marked those
files as BSD licensed too. As part of perf they become GPLv2.
Committer notes:
Fixes:
1) Limit maxfds to 512 to avoid nftd() segfaulting on alloca() with a
big rlim_max, as in docker containers - acme
2) Make jevents a hostprog, supporting cross compilation - jolsa
3) Use HOSTCC for jevents final step - acme
4) Define _GNU_SOURCE for asprintf, as we can't use CC's EXTRA_CFLAGS,
that has to have --sysroot on the Android NDK 24 - acme
5) Removed $(srctree)/tools/perf/pmu-events/pmu-events.c from the
'clean' target, it is generated on $(OUTPUT)pmu-events/pmu-events.c,
which is already taken care of in the original patch - acme
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Jiri Olsa <jolsa@redhat.com>
Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Acked-by: Ingo Molnar <mingo@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Cc: linuxppc-dev@lists.ozlabs.org
Link: http://lkml.kernel.org/r/1473978296-20712-3-git-send-email-sukadev@linux.vnet.ibm.com
Link: http://lkml.kernel.org/r/20160927141846.GA6589@krava
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-19 20:39:33 +00:00
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#define _XOPEN_SOURCE 500 /* needed for nftw() */
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#define _GNU_SOURCE /* needed for asprintf() */
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/* Parse event JSON files */
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/*
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* Copyright (c) 2014, Intel Corporation
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
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* OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <stdio.h>
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#include <stdlib.h>
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#include <errno.h>
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#include <string.h>
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#include <ctype.h>
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#include <unistd.h>
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#include <stdarg.h>
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#include <libgen.h>
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perf vendor events: Add support for pmu events vendor subdirectory
For some architectures (like arm), it is required to support a vendor
subdirectory and not locate all the JSONs for a specific vendor in the
same folder.
This is because all the events for the same vendor will be placed in the
same pmu events table, which may cause conflict. This conflict would be
in the instance that a vendor's custom implemented events do have the
same meaning on different platforms, so events in the pmu table would
conflict. In addition, per list command may show events which are not
even supported for a given platform.
This patch adds support for a arch/vendor/platform directory hierarchy,
while maintaining backwards-compatibility for existing arch/platform
structure. In this, each platform would always have its own pmu events
table.
In generated file pmu_events.c, each platform table name is in the
format pme{_vendor}_platform, like this:
struct pmu_events_map pmu_events_map[] = {
{
.cpuid = "0x00000000420f5160",
.version = "v1",
.type = "core",
.table = pme_cavium_thunderx2
},
{
.cpuid = 0,
.version = 0,
.type = 0,
.table = 0,
},
};
Signed-off-by: John Garry <john.garry@huawei.com>
Acked-by: Jiri Olsa <jolsa@kernel.org>
Tested-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Ganapatrao Kulkarni <ganapatrao.kulkarni@cavium.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Shaokun Zhang <zhangshaokun@hisilicon.com>
Cc: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: William Cohen <wcohen@redhat.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linuxarm@huawei.com
Link: http://lkml.kernel.org/r/1520506716-197429-5-git-send-email-john.garry@huawei.com
Link: http://lkml.kernel.org/r/1521047452-28565-1-git-send-email-john.garry@huawei.com
[ Add missing limits.h include, fixing the build on at least all Alpine Linux versions tested (3.4 to 3.7 + edge), ]
[ Applied a patch to fix reading ./.. directories in XFS, see second Link tag ]
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2018-03-08 10:58:29 +00:00
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#include <limits.h>
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perf jevents: Program to convert JSON file
This is a modified version of an earlier patch by Andi Kleen.
We expect architectures to create JSON files describing the performance
monitoring (PMU) events that each CPU model/family of the architecture
supports.
Following is an example of the JSON file entry for an x86 event:
[
...
{
"EventCode": "0x00",
"UMask": "0x01",
"EventName": "INST_RETIRED.ANY",
"BriefDescription": "Instructions retired from execution.",
"PublicDescription": "Instructions retired from execution.",
"Counter": "Fixed counter 1",
"CounterHTOff": "Fixed counter 1",
"SampleAfterValue": "2000003",
"SampleAfterValue": "2000003",
"MSRIndex": "0",
"MSRValue": "0",
"TakenAlone": "0",
"CounterMask": "0",
"Invert": "0",
"AnyThread": "0",
"EdgeDetect": "0",
"PEBS": "0",
"PRECISE_STORE": "0",
"Errata": "null",
"Offcore": "0"
},
...
]
All the PMU events supported by a CPU model/family must be grouped into
"topics" such as "Pipelining", "Floating-point", "Virtual-memory" etc.
All events belonging to a topic must be placed in a separate JSON file
(eg: "Pipelining.json") and all the topic JSON files for a CPU model must
be in a separate directory.
Eg: for the CPU model "Silvermont_core":
$ ls tools/perf/pmu-events/arch/x86/Silvermont_core
Floating-point.json
Memory.json
Other.json
Pipelining.json
Virtualmemory.json
Finally, to allow multiple CPU models to share a single set of JSON files,
architectures must provide a mapping between a model and its set of events:
$ grep Silvermont tools/perf/pmu-events/arch/x86/mapfile.csv
GenuineIntel-6-4D,V13,Silvermont_core,core
GenuineIntel-6-4C,V13,Silvermont_core,core
which maps each CPU, identified by [vendor, family, model, version, type]
to a directory of JSON files. Thus two (or more) CPU models support the
set of PMU events listed in the directory.
tools/perf/pmu-events/arch/x86/Silvermont_core/
Given this organization of files, the program, jevents:
- locates all JSON files for each CPU-model of the architecture,
- parses all JSON files for the CPU-model and generates a C-style
"PMU-events table" (pmu-events.c) for the model
- locates a mapfile for the architecture
- builds a global table, mapping each model of CPU to the corresponding
PMU-events table.
The 'pmu-events.c' is generated when building perf and added to libperf.a.
The global table pmu_events_map[] table in this pmu-events.c will be used
in perf in a follow-on patch.
If the architecture does not have any JSON files or there is an error in
processing them, an empty mapping file is created. This would allow the
build of perf to proceed even if we are not able to provide aliases for
events.
The parser for JSON files allows parsing Intel style JSON event files. This
allows to use an Intel event list directly with perf. The Intel event lists
can be quite large and are too big to store in unswappable kernel memory.
The conversion from JSON to C-style is straight forward. The parser knows
(very little) Intel specific information, and can be easily extended to
handle fields for other CPUs.
The parser code is partially shared with an independent parsing library,
which is 2-clause BSD licensed. To avoid any conflicts I marked those
files as BSD licensed too. As part of perf they become GPLv2.
Committer notes:
Fixes:
1) Limit maxfds to 512 to avoid nftd() segfaulting on alloca() with a
big rlim_max, as in docker containers - acme
2) Make jevents a hostprog, supporting cross compilation - jolsa
3) Use HOSTCC for jevents final step - acme
4) Define _GNU_SOURCE for asprintf, as we can't use CC's EXTRA_CFLAGS,
that has to have --sysroot on the Android NDK 24 - acme
5) Removed $(srctree)/tools/perf/pmu-events/pmu-events.c from the
'clean' target, it is generated on $(OUTPUT)pmu-events/pmu-events.c,
which is already taken care of in the original patch - acme
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Jiri Olsa <jolsa@redhat.com>
Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Acked-by: Ingo Molnar <mingo@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Cc: linuxppc-dev@lists.ozlabs.org
Link: http://lkml.kernel.org/r/1473978296-20712-3-git-send-email-sukadev@linux.vnet.ibm.com
Link: http://lkml.kernel.org/r/20160927141846.GA6589@krava
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-19 20:39:33 +00:00
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#include <dirent.h>
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#include <sys/time.h> /* getrlimit */
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#include <sys/resource.h> /* getrlimit */
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#include <ftw.h>
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#include <sys/stat.h>
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perf vendor events: Add support for arch standard events
For some architectures (like arm), there are architecture- defined
events. Sometimes these events may be "recommended" according to the
architecture standard, in that the implementer is free ignore the
"recommendation" and create its custom event.
This patch adds support for parsing standard events from arch-defined
JSONs, and fixing up vendor events when they have implemented these
events as standard.
Support is also ensured that the vendor may implement their own custom
events.
A new step is added to the pmu events parsing to fix up the vendor
events with the arch-standard events.
The arch-defined JSONs must be placed in the arch root folder for
preprocessing prior to tree JSON processing.
In the vendor JSON, to specify that the arch event is supported, the
keyword "ArchStdEvent" should be used, like this:
[
{
"ArchStdEvent": "L1D_CACHE_WR",
},
]
Matching is based on the "EventName" field in the architecture JSON.
No other JSON objects are strictly required. However, for other objects
added, these take precedence over architecture defined standard events,
thus supporting separate events which have the same event code.
Signed-off-by: John Garry <john.garry@huawei.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Ganapatrao Kulkarni <ganapatrao.kulkarni@cavium.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Shaokun Zhang <zhangshaokun@hisilicon.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: William Cohen <wcohen@redhat.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linuxarm@huawei.com
Link: http://lkml.kernel.org/r/1520506716-197429-8-git-send-email-john.garry@huawei.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2018-03-08 10:58:32 +00:00
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#include <linux/list.h>
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perf jevents: Program to convert JSON file
This is a modified version of an earlier patch by Andi Kleen.
We expect architectures to create JSON files describing the performance
monitoring (PMU) events that each CPU model/family of the architecture
supports.
Following is an example of the JSON file entry for an x86 event:
[
...
{
"EventCode": "0x00",
"UMask": "0x01",
"EventName": "INST_RETIRED.ANY",
"BriefDescription": "Instructions retired from execution.",
"PublicDescription": "Instructions retired from execution.",
"Counter": "Fixed counter 1",
"CounterHTOff": "Fixed counter 1",
"SampleAfterValue": "2000003",
"SampleAfterValue": "2000003",
"MSRIndex": "0",
"MSRValue": "0",
"TakenAlone": "0",
"CounterMask": "0",
"Invert": "0",
"AnyThread": "0",
"EdgeDetect": "0",
"PEBS": "0",
"PRECISE_STORE": "0",
"Errata": "null",
"Offcore": "0"
},
...
]
All the PMU events supported by a CPU model/family must be grouped into
"topics" such as "Pipelining", "Floating-point", "Virtual-memory" etc.
All events belonging to a topic must be placed in a separate JSON file
(eg: "Pipelining.json") and all the topic JSON files for a CPU model must
be in a separate directory.
Eg: for the CPU model "Silvermont_core":
$ ls tools/perf/pmu-events/arch/x86/Silvermont_core
Floating-point.json
Memory.json
Other.json
Pipelining.json
Virtualmemory.json
Finally, to allow multiple CPU models to share a single set of JSON files,
architectures must provide a mapping between a model and its set of events:
$ grep Silvermont tools/perf/pmu-events/arch/x86/mapfile.csv
GenuineIntel-6-4D,V13,Silvermont_core,core
GenuineIntel-6-4C,V13,Silvermont_core,core
which maps each CPU, identified by [vendor, family, model, version, type]
to a directory of JSON files. Thus two (or more) CPU models support the
set of PMU events listed in the directory.
tools/perf/pmu-events/arch/x86/Silvermont_core/
Given this organization of files, the program, jevents:
- locates all JSON files for each CPU-model of the architecture,
- parses all JSON files for the CPU-model and generates a C-style
"PMU-events table" (pmu-events.c) for the model
- locates a mapfile for the architecture
- builds a global table, mapping each model of CPU to the corresponding
PMU-events table.
The 'pmu-events.c' is generated when building perf and added to libperf.a.
The global table pmu_events_map[] table in this pmu-events.c will be used
in perf in a follow-on patch.
If the architecture does not have any JSON files or there is an error in
processing them, an empty mapping file is created. This would allow the
build of perf to proceed even if we are not able to provide aliases for
events.
The parser for JSON files allows parsing Intel style JSON event files. This
allows to use an Intel event list directly with perf. The Intel event lists
can be quite large and are too big to store in unswappable kernel memory.
The conversion from JSON to C-style is straight forward. The parser knows
(very little) Intel specific information, and can be easily extended to
handle fields for other CPUs.
The parser code is partially shared with an independent parsing library,
which is 2-clause BSD licensed. To avoid any conflicts I marked those
files as BSD licensed too. As part of perf they become GPLv2.
Committer notes:
Fixes:
1) Limit maxfds to 512 to avoid nftd() segfaulting on alloca() with a
big rlim_max, as in docker containers - acme
2) Make jevents a hostprog, supporting cross compilation - jolsa
3) Use HOSTCC for jevents final step - acme
4) Define _GNU_SOURCE for asprintf, as we can't use CC's EXTRA_CFLAGS,
that has to have --sysroot on the Android NDK 24 - acme
5) Removed $(srctree)/tools/perf/pmu-events/pmu-events.c from the
'clean' target, it is generated on $(OUTPUT)pmu-events/pmu-events.c,
which is already taken care of in the original patch - acme
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Jiri Olsa <jolsa@redhat.com>
Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Acked-by: Ingo Molnar <mingo@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Cc: linuxppc-dev@lists.ozlabs.org
Link: http://lkml.kernel.org/r/1473978296-20712-3-git-send-email-sukadev@linux.vnet.ibm.com
Link: http://lkml.kernel.org/r/20160927141846.GA6589@krava
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-19 20:39:33 +00:00
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#include "jsmn.h"
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#include "json.h"
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2020-09-07 06:41:31 +00:00
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#include "pmu-events.h"
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perf jevents: Program to convert JSON file
This is a modified version of an earlier patch by Andi Kleen.
We expect architectures to create JSON files describing the performance
monitoring (PMU) events that each CPU model/family of the architecture
supports.
Following is an example of the JSON file entry for an x86 event:
[
...
{
"EventCode": "0x00",
"UMask": "0x01",
"EventName": "INST_RETIRED.ANY",
"BriefDescription": "Instructions retired from execution.",
"PublicDescription": "Instructions retired from execution.",
"Counter": "Fixed counter 1",
"CounterHTOff": "Fixed counter 1",
"SampleAfterValue": "2000003",
"SampleAfterValue": "2000003",
"MSRIndex": "0",
"MSRValue": "0",
"TakenAlone": "0",
"CounterMask": "0",
"Invert": "0",
"AnyThread": "0",
"EdgeDetect": "0",
"PEBS": "0",
"PRECISE_STORE": "0",
"Errata": "null",
"Offcore": "0"
},
...
]
All the PMU events supported by a CPU model/family must be grouped into
"topics" such as "Pipelining", "Floating-point", "Virtual-memory" etc.
All events belonging to a topic must be placed in a separate JSON file
(eg: "Pipelining.json") and all the topic JSON files for a CPU model must
be in a separate directory.
Eg: for the CPU model "Silvermont_core":
$ ls tools/perf/pmu-events/arch/x86/Silvermont_core
Floating-point.json
Memory.json
Other.json
Pipelining.json
Virtualmemory.json
Finally, to allow multiple CPU models to share a single set of JSON files,
architectures must provide a mapping between a model and its set of events:
$ grep Silvermont tools/perf/pmu-events/arch/x86/mapfile.csv
GenuineIntel-6-4D,V13,Silvermont_core,core
GenuineIntel-6-4C,V13,Silvermont_core,core
which maps each CPU, identified by [vendor, family, model, version, type]
to a directory of JSON files. Thus two (or more) CPU models support the
set of PMU events listed in the directory.
tools/perf/pmu-events/arch/x86/Silvermont_core/
Given this organization of files, the program, jevents:
- locates all JSON files for each CPU-model of the architecture,
- parses all JSON files for the CPU-model and generates a C-style
"PMU-events table" (pmu-events.c) for the model
- locates a mapfile for the architecture
- builds a global table, mapping each model of CPU to the corresponding
PMU-events table.
The 'pmu-events.c' is generated when building perf and added to libperf.a.
The global table pmu_events_map[] table in this pmu-events.c will be used
in perf in a follow-on patch.
If the architecture does not have any JSON files or there is an error in
processing them, an empty mapping file is created. This would allow the
build of perf to proceed even if we are not able to provide aliases for
events.
The parser for JSON files allows parsing Intel style JSON event files. This
allows to use an Intel event list directly with perf. The Intel event lists
can be quite large and are too big to store in unswappable kernel memory.
The conversion from JSON to C-style is straight forward. The parser knows
(very little) Intel specific information, and can be easily extended to
handle fields for other CPUs.
The parser code is partially shared with an independent parsing library,
which is 2-clause BSD licensed. To avoid any conflicts I marked those
files as BSD licensed too. As part of perf they become GPLv2.
Committer notes:
Fixes:
1) Limit maxfds to 512 to avoid nftd() segfaulting on alloca() with a
big rlim_max, as in docker containers - acme
2) Make jevents a hostprog, supporting cross compilation - jolsa
3) Use HOSTCC for jevents final step - acme
4) Define _GNU_SOURCE for asprintf, as we can't use CC's EXTRA_CFLAGS,
that has to have --sysroot on the Android NDK 24 - acme
5) Removed $(srctree)/tools/perf/pmu-events/pmu-events.c from the
'clean' target, it is generated on $(OUTPUT)pmu-events/pmu-events.c,
which is already taken care of in the original patch - acme
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Jiri Olsa <jolsa@redhat.com>
Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Acked-by: Ingo Molnar <mingo@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Cc: linuxppc-dev@lists.ozlabs.org
Link: http://lkml.kernel.org/r/1473978296-20712-3-git-send-email-sukadev@linux.vnet.ibm.com
Link: http://lkml.kernel.org/r/20160927141846.GA6589@krava
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-19 20:39:33 +00:00
|
|
|
|
|
|
|
int verbose;
|
|
|
|
char *prog;
|
|
|
|
|
2020-09-07 06:41:30 +00:00
|
|
|
struct json_event {
|
|
|
|
char *name;
|
perf jevents: Add support for system events tables
Process the JSONs to find support for "system" events, which are not
tied to a specific CPUID.
A "COMPAT" property is now used to match against the namespace ID from
the kernel PMU driver.
The generated pmu-events.c will now have 2 tables:
a. CPU events, as before.
b. New pmu_sys_event_tables[] table, which will have events matched to
specific SoCs.
It will look like this:
struct pmu_event pme_hisilicon_hip09_sys[] = {
{
.name = "cycles",
.compat = "0x00030736",
.event = "event=0",
.desc = "Clock cycles",
.topic = "smmu v3 pmcg",
.long_desc = "Clock cycles",
},
{
.name = "smmuv3_pmcg.l1_tlb",
.compat = "0x00030736",
.event = "event=0x8a",
.desc = "SMMUv3 PMCG l1_tlb. Unit: smmuv3_pmcg ",
.topic = "smmu v3 pmcg",
.long_desc = "SMMUv3 PMCG l1_tlb",
.pmu = "smmuv3_pmcg",
},
...
};
struct pmu_event pme_arm_cortex_a53[] = {
{
.name = "ext_mem_req",
.event = "event=0xc0",
.desc = "External memory request",
.topic = "memory",
},
{
.name = "ext_mem_req_nc",
.event = "event=0xc1",
.desc = "Non-cacheable external memory request",
.topic = "memory",
},
...
};
struct pmu_event pme_hisilicon_hip09_cpu[] = {
{
.name = "l2d_cache_refill_wr",
.event = "event=0x53",
.desc = "L2D cache refill, write",
.topic = "core imp def",
.long_desc = "Attributable Level 2 data cache refill, write",
},
...
};
struct pmu_events_map pmu_events_map[] = {
{
.cpuid = "0x00000000410fd030",
.version = "v1",
.type = "core",
.table = pme_arm_cortex_a53
},
{
.cpuid = "0x00000000480fd010",
.version = "v1",
.type = "core",
.table = pme_hisilicon_hip09_cpu
},
{
.table = 0
},
};
struct pmu_event pme_hisilicon_hip09_cpu[] = {
{
.name = "uncore_hisi_l3c.rd_cpipe",
.event = "event=0",
.desc = "Total read accesses. Unit: hisi_sccl,l3c ",
.topic = "uncore l3c",
.long_desc = "Total read accesses",
.pmu = "hisi_sccl,l3c",
},
{
.name = "uncore_hisi_l3c.wr_cpipe",
.event = "event=0x1",
.desc = "Total write accesses. Unit: hisi_sccl,l3c ",
.topic = "uncore l3c",
.long_desc = "Total write accesses",
.pmu = "hisi_sccl,l3c",
},
...
};
struct pmu_sys_events pmu_sys_event_tables[] = {
{
.table = pme_hisilicon_hip09_sys,
},
...
};
Committer notes:
Added the fix for architectures without PMU events, provided by John
after I reported the build failing in such systems.
Link: https://lore.kernel.org/lkml/650baaf2-36b6-a9e2-ff49-963ef864c1f3@huawei.com/
Signed-off-by: John Garry <john.garry@huawei.com>
Acked-by: Kajol Jain <kjain@linux.ibm.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Ian Rogers <irogers@google.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Joakim Zhang <qiangqing.zhang@nxp.com>
Cc: Kan Liang <kan.liang@linux.intel.com>
Cc: Kim Phillips <kim.phillips@amd.com>
Cc: Leo Yan <leo.yan@linaro.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Shaokun Zhang <zhangshaokun@hisilicon.com>
Cc: Will Deacon <will@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linuxarm@huawei.com
Link: http://lore.kernel.org/lkml/1607080216-36968-3-git-send-email-john.garry@huawei.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2020-12-04 11:10:08 +00:00
|
|
|
char *compat;
|
2020-09-07 06:41:30 +00:00
|
|
|
char *event;
|
|
|
|
char *desc;
|
|
|
|
char *long_desc;
|
|
|
|
char *pmu;
|
|
|
|
char *unit;
|
|
|
|
char *perpkg;
|
2020-09-07 06:41:31 +00:00
|
|
|
char *aggr_mode;
|
2020-09-07 06:41:30 +00:00
|
|
|
char *metric_expr;
|
|
|
|
char *metric_name;
|
|
|
|
char *metric_group;
|
|
|
|
char *deprecated;
|
|
|
|
char *metric_constraint;
|
|
|
|
};
|
|
|
|
|
2020-09-07 06:41:31 +00:00
|
|
|
enum aggr_mode_class convert(const char *aggr_mode)
|
|
|
|
{
|
|
|
|
if (!strcmp(aggr_mode, "PerCore"))
|
|
|
|
return PerCore;
|
|
|
|
else if (!strcmp(aggr_mode, "PerChip"))
|
|
|
|
return PerChip;
|
|
|
|
|
|
|
|
pr_err("%s: Wrong AggregationMode value '%s'\n", prog, aggr_mode);
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
|
2020-09-07 06:41:30 +00:00
|
|
|
typedef int (*func)(void *data, struct json_event *je);
|
|
|
|
|
perf jevents: Add support for system events tables
Process the JSONs to find support for "system" events, which are not
tied to a specific CPUID.
A "COMPAT" property is now used to match against the namespace ID from
the kernel PMU driver.
The generated pmu-events.c will now have 2 tables:
a. CPU events, as before.
b. New pmu_sys_event_tables[] table, which will have events matched to
specific SoCs.
It will look like this:
struct pmu_event pme_hisilicon_hip09_sys[] = {
{
.name = "cycles",
.compat = "0x00030736",
.event = "event=0",
.desc = "Clock cycles",
.topic = "smmu v3 pmcg",
.long_desc = "Clock cycles",
},
{
.name = "smmuv3_pmcg.l1_tlb",
.compat = "0x00030736",
.event = "event=0x8a",
.desc = "SMMUv3 PMCG l1_tlb. Unit: smmuv3_pmcg ",
.topic = "smmu v3 pmcg",
.long_desc = "SMMUv3 PMCG l1_tlb",
.pmu = "smmuv3_pmcg",
},
...
};
struct pmu_event pme_arm_cortex_a53[] = {
{
.name = "ext_mem_req",
.event = "event=0xc0",
.desc = "External memory request",
.topic = "memory",
},
{
.name = "ext_mem_req_nc",
.event = "event=0xc1",
.desc = "Non-cacheable external memory request",
.topic = "memory",
},
...
};
struct pmu_event pme_hisilicon_hip09_cpu[] = {
{
.name = "l2d_cache_refill_wr",
.event = "event=0x53",
.desc = "L2D cache refill, write",
.topic = "core imp def",
.long_desc = "Attributable Level 2 data cache refill, write",
},
...
};
struct pmu_events_map pmu_events_map[] = {
{
.cpuid = "0x00000000410fd030",
.version = "v1",
.type = "core",
.table = pme_arm_cortex_a53
},
{
.cpuid = "0x00000000480fd010",
.version = "v1",
.type = "core",
.table = pme_hisilicon_hip09_cpu
},
{
.table = 0
},
};
struct pmu_event pme_hisilicon_hip09_cpu[] = {
{
.name = "uncore_hisi_l3c.rd_cpipe",
.event = "event=0",
.desc = "Total read accesses. Unit: hisi_sccl,l3c ",
.topic = "uncore l3c",
.long_desc = "Total read accesses",
.pmu = "hisi_sccl,l3c",
},
{
.name = "uncore_hisi_l3c.wr_cpipe",
.event = "event=0x1",
.desc = "Total write accesses. Unit: hisi_sccl,l3c ",
.topic = "uncore l3c",
.long_desc = "Total write accesses",
.pmu = "hisi_sccl,l3c",
},
...
};
struct pmu_sys_events pmu_sys_event_tables[] = {
{
.table = pme_hisilicon_hip09_sys,
},
...
};
Committer notes:
Added the fix for architectures without PMU events, provided by John
after I reported the build failing in such systems.
Link: https://lore.kernel.org/lkml/650baaf2-36b6-a9e2-ff49-963ef864c1f3@huawei.com/
Signed-off-by: John Garry <john.garry@huawei.com>
Acked-by: Kajol Jain <kjain@linux.ibm.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Ian Rogers <irogers@google.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Joakim Zhang <qiangqing.zhang@nxp.com>
Cc: Kan Liang <kan.liang@linux.intel.com>
Cc: Kim Phillips <kim.phillips@amd.com>
Cc: Leo Yan <leo.yan@linaro.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Shaokun Zhang <zhangshaokun@hisilicon.com>
Cc: Will Deacon <will@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linuxarm@huawei.com
Link: http://lore.kernel.org/lkml/1607080216-36968-3-git-send-email-john.garry@huawei.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2020-12-04 11:10:08 +00:00
|
|
|
static LIST_HEAD(sys_event_tables);
|
|
|
|
|
|
|
|
struct sys_event_table {
|
|
|
|
struct list_head list;
|
|
|
|
char *soc_id;
|
|
|
|
};
|
|
|
|
|
|
|
|
static void free_sys_event_tables(void)
|
|
|
|
{
|
|
|
|
struct sys_event_table *et, *next;
|
|
|
|
|
|
|
|
list_for_each_entry_safe(et, next, &sys_event_tables, list) {
|
|
|
|
free(et->soc_id);
|
|
|
|
free(et);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
perf jevents: Program to convert JSON file
This is a modified version of an earlier patch by Andi Kleen.
We expect architectures to create JSON files describing the performance
monitoring (PMU) events that each CPU model/family of the architecture
supports.
Following is an example of the JSON file entry for an x86 event:
[
...
{
"EventCode": "0x00",
"UMask": "0x01",
"EventName": "INST_RETIRED.ANY",
"BriefDescription": "Instructions retired from execution.",
"PublicDescription": "Instructions retired from execution.",
"Counter": "Fixed counter 1",
"CounterHTOff": "Fixed counter 1",
"SampleAfterValue": "2000003",
"SampleAfterValue": "2000003",
"MSRIndex": "0",
"MSRValue": "0",
"TakenAlone": "0",
"CounterMask": "0",
"Invert": "0",
"AnyThread": "0",
"EdgeDetect": "0",
"PEBS": "0",
"PRECISE_STORE": "0",
"Errata": "null",
"Offcore": "0"
},
...
]
All the PMU events supported by a CPU model/family must be grouped into
"topics" such as "Pipelining", "Floating-point", "Virtual-memory" etc.
All events belonging to a topic must be placed in a separate JSON file
(eg: "Pipelining.json") and all the topic JSON files for a CPU model must
be in a separate directory.
Eg: for the CPU model "Silvermont_core":
$ ls tools/perf/pmu-events/arch/x86/Silvermont_core
Floating-point.json
Memory.json
Other.json
Pipelining.json
Virtualmemory.json
Finally, to allow multiple CPU models to share a single set of JSON files,
architectures must provide a mapping between a model and its set of events:
$ grep Silvermont tools/perf/pmu-events/arch/x86/mapfile.csv
GenuineIntel-6-4D,V13,Silvermont_core,core
GenuineIntel-6-4C,V13,Silvermont_core,core
which maps each CPU, identified by [vendor, family, model, version, type]
to a directory of JSON files. Thus two (or more) CPU models support the
set of PMU events listed in the directory.
tools/perf/pmu-events/arch/x86/Silvermont_core/
Given this organization of files, the program, jevents:
- locates all JSON files for each CPU-model of the architecture,
- parses all JSON files for the CPU-model and generates a C-style
"PMU-events table" (pmu-events.c) for the model
- locates a mapfile for the architecture
- builds a global table, mapping each model of CPU to the corresponding
PMU-events table.
The 'pmu-events.c' is generated when building perf and added to libperf.a.
The global table pmu_events_map[] table in this pmu-events.c will be used
in perf in a follow-on patch.
If the architecture does not have any JSON files or there is an error in
processing them, an empty mapping file is created. This would allow the
build of perf to proceed even if we are not able to provide aliases for
events.
The parser for JSON files allows parsing Intel style JSON event files. This
allows to use an Intel event list directly with perf. The Intel event lists
can be quite large and are too big to store in unswappable kernel memory.
The conversion from JSON to C-style is straight forward. The parser knows
(very little) Intel specific information, and can be easily extended to
handle fields for other CPUs.
The parser code is partially shared with an independent parsing library,
which is 2-clause BSD licensed. To avoid any conflicts I marked those
files as BSD licensed too. As part of perf they become GPLv2.
Committer notes:
Fixes:
1) Limit maxfds to 512 to avoid nftd() segfaulting on alloca() with a
big rlim_max, as in docker containers - acme
2) Make jevents a hostprog, supporting cross compilation - jolsa
3) Use HOSTCC for jevents final step - acme
4) Define _GNU_SOURCE for asprintf, as we can't use CC's EXTRA_CFLAGS,
that has to have --sysroot on the Android NDK 24 - acme
5) Removed $(srctree)/tools/perf/pmu-events/pmu-events.c from the
'clean' target, it is generated on $(OUTPUT)pmu-events/pmu-events.c,
which is already taken care of in the original patch - acme
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Jiri Olsa <jolsa@redhat.com>
Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Acked-by: Ingo Molnar <mingo@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Cc: linuxppc-dev@lists.ozlabs.org
Link: http://lkml.kernel.org/r/1473978296-20712-3-git-send-email-sukadev@linux.vnet.ibm.com
Link: http://lkml.kernel.org/r/20160927141846.GA6589@krava
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-19 20:39:33 +00:00
|
|
|
int eprintf(int level, int var, const char *fmt, ...)
|
|
|
|
{
|
|
|
|
|
|
|
|
int ret;
|
|
|
|
va_list args;
|
|
|
|
|
|
|
|
if (var < level)
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
va_start(args, fmt);
|
|
|
|
|
|
|
|
ret = vfprintf(stderr, fmt, args);
|
|
|
|
|
|
|
|
va_end(args);
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void addfield(char *map, char **dst, const char *sep,
|
|
|
|
const char *a, jsmntok_t *bt)
|
|
|
|
{
|
|
|
|
unsigned int len = strlen(a) + 1 + strlen(sep);
|
|
|
|
int olen = *dst ? strlen(*dst) : 0;
|
|
|
|
int blen = bt ? json_len(bt) : 0;
|
|
|
|
char *out;
|
|
|
|
|
|
|
|
out = realloc(*dst, len + olen + blen);
|
|
|
|
if (!out) {
|
|
|
|
/* Don't add field in this case */
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
*dst = out;
|
|
|
|
|
|
|
|
if (!olen)
|
|
|
|
*(*dst) = 0;
|
|
|
|
else
|
|
|
|
strcat(*dst, sep);
|
|
|
|
strcat(*dst, a);
|
|
|
|
if (bt)
|
|
|
|
strncat(*dst, map + bt->start, blen);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void fixname(char *s)
|
|
|
|
{
|
|
|
|
for (; *s; s++)
|
|
|
|
*s = tolower(*s);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void fixdesc(char *s)
|
|
|
|
{
|
|
|
|
char *e = s + strlen(s);
|
|
|
|
|
|
|
|
/* Remove trailing dots that look ugly in perf list */
|
|
|
|
--e;
|
|
|
|
while (e >= s && isspace(*e))
|
|
|
|
--e;
|
|
|
|
if (*e == '.')
|
|
|
|
*e = 0;
|
|
|
|
}
|
|
|
|
|
2017-12-04 14:57:28 +00:00
|
|
|
/* Add escapes for '\' so they are proper C strings. */
|
|
|
|
static char *fixregex(char *s)
|
|
|
|
{
|
|
|
|
int len = 0;
|
|
|
|
int esc_count = 0;
|
|
|
|
char *fixed = NULL;
|
|
|
|
char *p, *q;
|
|
|
|
|
|
|
|
/* Count the number of '\' in string */
|
|
|
|
for (p = s; *p; p++) {
|
|
|
|
++len;
|
|
|
|
if (*p == '\\')
|
|
|
|
++esc_count;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (esc_count == 0)
|
|
|
|
return s;
|
|
|
|
|
|
|
|
/* allocate space for a new string */
|
2020-09-03 15:25:10 +00:00
|
|
|
fixed = (char *) malloc(len + esc_count + 1);
|
2017-12-04 14:57:28 +00:00
|
|
|
if (!fixed)
|
|
|
|
return NULL;
|
|
|
|
|
|
|
|
/* copy over the characters */
|
|
|
|
q = fixed;
|
|
|
|
for (p = s; *p; p++) {
|
|
|
|
if (*p == '\\') {
|
|
|
|
*q = '\\';
|
|
|
|
++q;
|
|
|
|
}
|
|
|
|
*q = *p;
|
|
|
|
++q;
|
|
|
|
}
|
|
|
|
*q = '\0';
|
|
|
|
return fixed;
|
|
|
|
}
|
|
|
|
|
perf jevents: Program to convert JSON file
This is a modified version of an earlier patch by Andi Kleen.
We expect architectures to create JSON files describing the performance
monitoring (PMU) events that each CPU model/family of the architecture
supports.
Following is an example of the JSON file entry for an x86 event:
[
...
{
"EventCode": "0x00",
"UMask": "0x01",
"EventName": "INST_RETIRED.ANY",
"BriefDescription": "Instructions retired from execution.",
"PublicDescription": "Instructions retired from execution.",
"Counter": "Fixed counter 1",
"CounterHTOff": "Fixed counter 1",
"SampleAfterValue": "2000003",
"SampleAfterValue": "2000003",
"MSRIndex": "0",
"MSRValue": "0",
"TakenAlone": "0",
"CounterMask": "0",
"Invert": "0",
"AnyThread": "0",
"EdgeDetect": "0",
"PEBS": "0",
"PRECISE_STORE": "0",
"Errata": "null",
"Offcore": "0"
},
...
]
All the PMU events supported by a CPU model/family must be grouped into
"topics" such as "Pipelining", "Floating-point", "Virtual-memory" etc.
All events belonging to a topic must be placed in a separate JSON file
(eg: "Pipelining.json") and all the topic JSON files for a CPU model must
be in a separate directory.
Eg: for the CPU model "Silvermont_core":
$ ls tools/perf/pmu-events/arch/x86/Silvermont_core
Floating-point.json
Memory.json
Other.json
Pipelining.json
Virtualmemory.json
Finally, to allow multiple CPU models to share a single set of JSON files,
architectures must provide a mapping between a model and its set of events:
$ grep Silvermont tools/perf/pmu-events/arch/x86/mapfile.csv
GenuineIntel-6-4D,V13,Silvermont_core,core
GenuineIntel-6-4C,V13,Silvermont_core,core
which maps each CPU, identified by [vendor, family, model, version, type]
to a directory of JSON files. Thus two (or more) CPU models support the
set of PMU events listed in the directory.
tools/perf/pmu-events/arch/x86/Silvermont_core/
Given this organization of files, the program, jevents:
- locates all JSON files for each CPU-model of the architecture,
- parses all JSON files for the CPU-model and generates a C-style
"PMU-events table" (pmu-events.c) for the model
- locates a mapfile for the architecture
- builds a global table, mapping each model of CPU to the corresponding
PMU-events table.
The 'pmu-events.c' is generated when building perf and added to libperf.a.
The global table pmu_events_map[] table in this pmu-events.c will be used
in perf in a follow-on patch.
If the architecture does not have any JSON files or there is an error in
processing them, an empty mapping file is created. This would allow the
build of perf to proceed even if we are not able to provide aliases for
events.
The parser for JSON files allows parsing Intel style JSON event files. This
allows to use an Intel event list directly with perf. The Intel event lists
can be quite large and are too big to store in unswappable kernel memory.
The conversion from JSON to C-style is straight forward. The parser knows
(very little) Intel specific information, and can be easily extended to
handle fields for other CPUs.
The parser code is partially shared with an independent parsing library,
which is 2-clause BSD licensed. To avoid any conflicts I marked those
files as BSD licensed too. As part of perf they become GPLv2.
Committer notes:
Fixes:
1) Limit maxfds to 512 to avoid nftd() segfaulting on alloca() with a
big rlim_max, as in docker containers - acme
2) Make jevents a hostprog, supporting cross compilation - jolsa
3) Use HOSTCC for jevents final step - acme
4) Define _GNU_SOURCE for asprintf, as we can't use CC's EXTRA_CFLAGS,
that has to have --sysroot on the Android NDK 24 - acme
5) Removed $(srctree)/tools/perf/pmu-events/pmu-events.c from the
'clean' target, it is generated on $(OUTPUT)pmu-events/pmu-events.c,
which is already taken care of in the original patch - acme
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Jiri Olsa <jolsa@redhat.com>
Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Acked-by: Ingo Molnar <mingo@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Cc: linuxppc-dev@lists.ozlabs.org
Link: http://lkml.kernel.org/r/1473978296-20712-3-git-send-email-sukadev@linux.vnet.ibm.com
Link: http://lkml.kernel.org/r/20160927141846.GA6589@krava
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-19 20:39:33 +00:00
|
|
|
static struct msrmap {
|
|
|
|
const char *num;
|
|
|
|
const char *pname;
|
|
|
|
} msrmap[] = {
|
|
|
|
{ "0x3F6", "ldlat=" },
|
|
|
|
{ "0x1A6", "offcore_rsp=" },
|
|
|
|
{ "0x1A7", "offcore_rsp=" },
|
2016-09-15 22:24:55 +00:00
|
|
|
{ "0x3F7", "frontend=" },
|
perf jevents: Program to convert JSON file
This is a modified version of an earlier patch by Andi Kleen.
We expect architectures to create JSON files describing the performance
monitoring (PMU) events that each CPU model/family of the architecture
supports.
Following is an example of the JSON file entry for an x86 event:
[
...
{
"EventCode": "0x00",
"UMask": "0x01",
"EventName": "INST_RETIRED.ANY",
"BriefDescription": "Instructions retired from execution.",
"PublicDescription": "Instructions retired from execution.",
"Counter": "Fixed counter 1",
"CounterHTOff": "Fixed counter 1",
"SampleAfterValue": "2000003",
"SampleAfterValue": "2000003",
"MSRIndex": "0",
"MSRValue": "0",
"TakenAlone": "0",
"CounterMask": "0",
"Invert": "0",
"AnyThread": "0",
"EdgeDetect": "0",
"PEBS": "0",
"PRECISE_STORE": "0",
"Errata": "null",
"Offcore": "0"
},
...
]
All the PMU events supported by a CPU model/family must be grouped into
"topics" such as "Pipelining", "Floating-point", "Virtual-memory" etc.
All events belonging to a topic must be placed in a separate JSON file
(eg: "Pipelining.json") and all the topic JSON files for a CPU model must
be in a separate directory.
Eg: for the CPU model "Silvermont_core":
$ ls tools/perf/pmu-events/arch/x86/Silvermont_core
Floating-point.json
Memory.json
Other.json
Pipelining.json
Virtualmemory.json
Finally, to allow multiple CPU models to share a single set of JSON files,
architectures must provide a mapping between a model and its set of events:
$ grep Silvermont tools/perf/pmu-events/arch/x86/mapfile.csv
GenuineIntel-6-4D,V13,Silvermont_core,core
GenuineIntel-6-4C,V13,Silvermont_core,core
which maps each CPU, identified by [vendor, family, model, version, type]
to a directory of JSON files. Thus two (or more) CPU models support the
set of PMU events listed in the directory.
tools/perf/pmu-events/arch/x86/Silvermont_core/
Given this organization of files, the program, jevents:
- locates all JSON files for each CPU-model of the architecture,
- parses all JSON files for the CPU-model and generates a C-style
"PMU-events table" (pmu-events.c) for the model
- locates a mapfile for the architecture
- builds a global table, mapping each model of CPU to the corresponding
PMU-events table.
The 'pmu-events.c' is generated when building perf and added to libperf.a.
The global table pmu_events_map[] table in this pmu-events.c will be used
in perf in a follow-on patch.
If the architecture does not have any JSON files or there is an error in
processing them, an empty mapping file is created. This would allow the
build of perf to proceed even if we are not able to provide aliases for
events.
The parser for JSON files allows parsing Intel style JSON event files. This
allows to use an Intel event list directly with perf. The Intel event lists
can be quite large and are too big to store in unswappable kernel memory.
The conversion from JSON to C-style is straight forward. The parser knows
(very little) Intel specific information, and can be easily extended to
handle fields for other CPUs.
The parser code is partially shared with an independent parsing library,
which is 2-clause BSD licensed. To avoid any conflicts I marked those
files as BSD licensed too. As part of perf they become GPLv2.
Committer notes:
Fixes:
1) Limit maxfds to 512 to avoid nftd() segfaulting on alloca() with a
big rlim_max, as in docker containers - acme
2) Make jevents a hostprog, supporting cross compilation - jolsa
3) Use HOSTCC for jevents final step - acme
4) Define _GNU_SOURCE for asprintf, as we can't use CC's EXTRA_CFLAGS,
that has to have --sysroot on the Android NDK 24 - acme
5) Removed $(srctree)/tools/perf/pmu-events/pmu-events.c from the
'clean' target, it is generated on $(OUTPUT)pmu-events/pmu-events.c,
which is already taken care of in the original patch - acme
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Jiri Olsa <jolsa@redhat.com>
Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Acked-by: Ingo Molnar <mingo@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Cc: linuxppc-dev@lists.ozlabs.org
Link: http://lkml.kernel.org/r/1473978296-20712-3-git-send-email-sukadev@linux.vnet.ibm.com
Link: http://lkml.kernel.org/r/20160927141846.GA6589@krava
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-19 20:39:33 +00:00
|
|
|
{ NULL, NULL }
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct field {
|
|
|
|
const char *field;
|
|
|
|
const char *kernel;
|
|
|
|
} fields[] = {
|
|
|
|
{ "UMask", "umask=" },
|
|
|
|
{ "CounterMask", "cmask=" },
|
|
|
|
{ "Invert", "inv=" },
|
|
|
|
{ "AnyThread", "any=" },
|
|
|
|
{ "EdgeDetect", "edge=" },
|
|
|
|
{ "SampleAfterValue", "period=" },
|
2017-08-16 22:02:00 +00:00
|
|
|
{ "FCMask", "fc_mask=" },
|
|
|
|
{ "PortMask", "ch_mask=" },
|
perf jevents: Program to convert JSON file
This is a modified version of an earlier patch by Andi Kleen.
We expect architectures to create JSON files describing the performance
monitoring (PMU) events that each CPU model/family of the architecture
supports.
Following is an example of the JSON file entry for an x86 event:
[
...
{
"EventCode": "0x00",
"UMask": "0x01",
"EventName": "INST_RETIRED.ANY",
"BriefDescription": "Instructions retired from execution.",
"PublicDescription": "Instructions retired from execution.",
"Counter": "Fixed counter 1",
"CounterHTOff": "Fixed counter 1",
"SampleAfterValue": "2000003",
"SampleAfterValue": "2000003",
"MSRIndex": "0",
"MSRValue": "0",
"TakenAlone": "0",
"CounterMask": "0",
"Invert": "0",
"AnyThread": "0",
"EdgeDetect": "0",
"PEBS": "0",
"PRECISE_STORE": "0",
"Errata": "null",
"Offcore": "0"
},
...
]
All the PMU events supported by a CPU model/family must be grouped into
"topics" such as "Pipelining", "Floating-point", "Virtual-memory" etc.
All events belonging to a topic must be placed in a separate JSON file
(eg: "Pipelining.json") and all the topic JSON files for a CPU model must
be in a separate directory.
Eg: for the CPU model "Silvermont_core":
$ ls tools/perf/pmu-events/arch/x86/Silvermont_core
Floating-point.json
Memory.json
Other.json
Pipelining.json
Virtualmemory.json
Finally, to allow multiple CPU models to share a single set of JSON files,
architectures must provide a mapping between a model and its set of events:
$ grep Silvermont tools/perf/pmu-events/arch/x86/mapfile.csv
GenuineIntel-6-4D,V13,Silvermont_core,core
GenuineIntel-6-4C,V13,Silvermont_core,core
which maps each CPU, identified by [vendor, family, model, version, type]
to a directory of JSON files. Thus two (or more) CPU models support the
set of PMU events listed in the directory.
tools/perf/pmu-events/arch/x86/Silvermont_core/
Given this organization of files, the program, jevents:
- locates all JSON files for each CPU-model of the architecture,
- parses all JSON files for the CPU-model and generates a C-style
"PMU-events table" (pmu-events.c) for the model
- locates a mapfile for the architecture
- builds a global table, mapping each model of CPU to the corresponding
PMU-events table.
The 'pmu-events.c' is generated when building perf and added to libperf.a.
The global table pmu_events_map[] table in this pmu-events.c will be used
in perf in a follow-on patch.
If the architecture does not have any JSON files or there is an error in
processing them, an empty mapping file is created. This would allow the
build of perf to proceed even if we are not able to provide aliases for
events.
The parser for JSON files allows parsing Intel style JSON event files. This
allows to use an Intel event list directly with perf. The Intel event lists
can be quite large and are too big to store in unswappable kernel memory.
The conversion from JSON to C-style is straight forward. The parser knows
(very little) Intel specific information, and can be easily extended to
handle fields for other CPUs.
The parser code is partially shared with an independent parsing library,
which is 2-clause BSD licensed. To avoid any conflicts I marked those
files as BSD licensed too. As part of perf they become GPLv2.
Committer notes:
Fixes:
1) Limit maxfds to 512 to avoid nftd() segfaulting on alloca() with a
big rlim_max, as in docker containers - acme
2) Make jevents a hostprog, supporting cross compilation - jolsa
3) Use HOSTCC for jevents final step - acme
4) Define _GNU_SOURCE for asprintf, as we can't use CC's EXTRA_CFLAGS,
that has to have --sysroot on the Android NDK 24 - acme
5) Removed $(srctree)/tools/perf/pmu-events/pmu-events.c from the
'clean' target, it is generated on $(OUTPUT)pmu-events/pmu-events.c,
which is already taken care of in the original patch - acme
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Jiri Olsa <jolsa@redhat.com>
Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Acked-by: Ingo Molnar <mingo@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Cc: linuxppc-dev@lists.ozlabs.org
Link: http://lkml.kernel.org/r/1473978296-20712-3-git-send-email-sukadev@linux.vnet.ibm.com
Link: http://lkml.kernel.org/r/20160927141846.GA6589@krava
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-19 20:39:33 +00:00
|
|
|
{ NULL, NULL }
|
|
|
|
};
|
|
|
|
|
|
|
|
static void cut_comma(char *map, jsmntok_t *newval)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
|
|
|
|
/* Cut off everything after comma */
|
|
|
|
for (i = newval->start; i < newval->end; i++) {
|
|
|
|
if (map[i] == ',')
|
|
|
|
newval->end = i;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static int match_field(char *map, jsmntok_t *field, int nz,
|
|
|
|
char **event, jsmntok_t *val)
|
|
|
|
{
|
|
|
|
struct field *f;
|
|
|
|
jsmntok_t newval = *val;
|
|
|
|
|
|
|
|
for (f = fields; f->field; f++)
|
|
|
|
if (json_streq(map, field, f->field) && nz) {
|
|
|
|
cut_comma(map, &newval);
|
|
|
|
addfield(map, event, ",", f->kernel, &newval);
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct msrmap *lookup_msr(char *map, jsmntok_t *val)
|
|
|
|
{
|
|
|
|
jsmntok_t newval = *val;
|
|
|
|
static bool warned;
|
|
|
|
int i;
|
|
|
|
|
|
|
|
cut_comma(map, &newval);
|
|
|
|
for (i = 0; msrmap[i].num; i++)
|
|
|
|
if (json_streq(map, &newval, msrmap[i].num))
|
|
|
|
return &msrmap[i];
|
|
|
|
if (!warned) {
|
|
|
|
warned = true;
|
|
|
|
pr_err("%s: Unknown MSR in event file %.*s\n", prog,
|
|
|
|
json_len(val), map + val->start);
|
|
|
|
}
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
2017-01-28 02:03:37 +00:00
|
|
|
static struct map {
|
|
|
|
const char *json;
|
|
|
|
const char *perf;
|
|
|
|
} unit_to_pmu[] = {
|
|
|
|
{ "CBO", "uncore_cbox" },
|
|
|
|
{ "QPI LL", "uncore_qpi" },
|
|
|
|
{ "SBO", "uncore_sbox" },
|
2017-03-30 00:20:28 +00:00
|
|
|
{ "iMPH-U", "uncore_arb" },
|
2018-06-21 08:04:50 +00:00
|
|
|
{ "CPU-M-CF", "cpum_cf" },
|
|
|
|
{ "CPU-M-SF", "cpum_sf" },
|
2019-05-07 13:16:31 +00:00
|
|
|
{ "UPI LL", "uncore_upi" },
|
2019-06-28 14:35:50 +00:00
|
|
|
{ "hisi_sccl,ddrc", "hisi_sccl,ddrc" },
|
2019-06-28 14:35:51 +00:00
|
|
|
{ "hisi_sccl,hha", "hisi_sccl,hha" },
|
2019-06-28 14:35:52 +00:00
|
|
|
{ "hisi_sccl,l3c", "hisi_sccl,l3c" },
|
2020-12-04 11:10:16 +00:00
|
|
|
/* it's not realistic to keep adding these, we need something more scalable ... */
|
|
|
|
{ "imx8_ddr", "imx8_ddr" },
|
perf vendor events amd: Add L3 cache events for Family 17h
Allow users to symbolically specify L3 events for Family 17h processors
using the existing AMD Uncore driver.
Source of events descriptions are from section 2.1.15.4.1 "L3 Cache PMC
Events" of the latest Family 17h PPR, available here:
https://www.amd.com/system/files/TechDocs/55570-B1_PUB.zip
Opnly BriefDescriptions added, since they show with and without
the -v and --details flags.
Tested with:
# perf stat -e l3_request_g1.caching_l3_cache_accesses,amd_l3/event=0x01,umask=0x80/,l3_comb_clstr_state.request_miss,amd_l3/event=0x06,umask=0x01/ perf bench mem memcpy -s 4mb -l 100 -f default
...
7,006,831 l3_request_g1.caching_l3_cache_accesses
7,006,830 amd_l3/event=0x01,umask=0x80/
366,530 l3_comb_clstr_state.request_miss
366,568 amd_l3/event=0x06,umask=0x01/
Signed-off-by: Kim Phillips <kim.phillips@amd.com>
Reviewed-by: Andi Kleen <ak@linux.intel.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Borislav Petkov <bp@suse.de>
Cc: Janakarajan Natarajan <janakarajan.natarajan@amd.com>
Cc: Jin Yao <yao.jin@linux.intel.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Kan Liang <kan.liang@linux.intel.com>
Cc: Luke Mujica <lukemujica@google.com>
Cc: Martin Liška <mliska@suse.cz>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Link: http://lore.kernel.org/lkml/20190919204306.12598-1-kim.phillips@amd.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2019-09-19 20:43:02 +00:00
|
|
|
{ "L3PMC", "amd_l3" },
|
perf vendor events amd: Add recommended events
Add support for events listed in Section 2.1.15.2 "Performance
Measurement" of "PPR for AMD Family 17h Model 31h B0 - 55803
Rev 0.54 - Sep 12, 2019".
perf now supports these new events (-e):
all_dc_accesses
all_tlbs_flushed
l1_dtlb_misses
l2_cache_accesses_from_dc_misses
l2_cache_accesses_from_ic_misses
l2_cache_hits_from_dc_misses
l2_cache_hits_from_ic_misses
l2_cache_misses_from_dc_misses
l2_cache_misses_from_ic_miss
l2_dtlb_misses
l2_itlb_misses
sse_avx_stalls
uops_dispatched
uops_retired
l3_accesses
l3_misses
and these metrics (-M):
branch_misprediction_ratio
all_l2_cache_accesses
all_l2_cache_hits
all_l2_cache_misses
ic_fetch_miss_ratio
l2_cache_accesses_from_l2_hwpf
l2_cache_hits_from_l2_hwpf
l2_cache_misses_from_l2_hwpf
l3_read_miss_latency
l1_itlb_misses
all_remote_links_outbound
nps1_die_to_dram
The nps1_die_to_dram event may need perf stat's --metric-no-group
switch if the number of available data fabric counters is less
than the number it uses (8).
Committer testing:
On a AMD Ryzen 3900x system:
Before:
# perf list all_dc_accesses all_tlbs_flushed l1_dtlb_misses l2_cache_accesses_from_dc_misses l2_cache_accesses_from_ic_misses l2_cache_hits_from_dc_misses l2_cache_hits_from_ic_misses l2_cache_misses_from_dc_misses l2_cache_misses_from_ic_miss l2_dtlb_misses l2_itlb_misses sse_avx_stalls uops_dispatched uops_retired l3_accesses l3_misses | grep -v "^Metric Groups:$" | grep -v "^$"
#
After:
# perf list all_dc_accesses all_tlbs_flushed l1_dtlb_misses l2_cache_accesses_from_dc_misses l2_cache_accesses_from_ic_misses l2_cache_hits_from_dc_misses l2_cache_hits_from_ic_misses l2_cache_misses_from_dc_misses l2_cache_misses_from_ic_miss l2_dtlb_misses l2_itlb_misses sse_avx_stalls uops_dispatched uops_retired l3_accesses l3_misses | grep -v "^Metric Groups:$" | grep -v "^$" | grep -v "^recommended:$"
all_dc_accesses
[All L1 Data Cache Accesses]
all_tlbs_flushed
[All TLBs Flushed]
l1_dtlb_misses
[L1 DTLB Misses]
l2_cache_accesses_from_dc_misses
[L2 Cache Accesses from L1 Data Cache Misses (including prefetch)]
l2_cache_accesses_from_ic_misses
[L2 Cache Accesses from L1 Instruction Cache Misses (including
prefetch)]
l2_cache_hits_from_dc_misses
[L2 Cache Hits from L1 Data Cache Misses]
l2_cache_hits_from_ic_misses
[L2 Cache Hits from L1 Instruction Cache Misses]
l2_cache_misses_from_dc_misses
[L2 Cache Misses from L1 Data Cache Misses]
l2_cache_misses_from_ic_miss
[L2 Cache Misses from L1 Instruction Cache Misses]
l2_dtlb_misses
[L2 DTLB Misses & Data page walks]
l2_itlb_misses
[L2 ITLB Misses & Instruction page walks]
sse_avx_stalls
[Mixed SSE/AVX Stalls]
uops_dispatched
[Micro-ops Dispatched]
uops_retired
[Micro-ops Retired]
l3_accesses
[L3 Accesses. Unit: amd_l3]
l3_misses
[L3 Misses (includes Chg2X). Unit: amd_l3]
#
# perf stat -a -e all_dc_accesses,all_tlbs_flushed,l1_dtlb_misses,l2_cache_accesses_from_dc_misses,l2_cache_accesses_from_ic_misses,l2_cache_hits_from_dc_misses,l2_cache_hits_from_ic_misses,l2_cache_misses_from_dc_misses,l2_cache_misses_from_ic_miss,l2_dtlb_misses,l2_itlb_misses,sse_avx_stalls,uops_dispatched,uops_retired,l3_accesses,l3_misses sleep 2
Performance counter stats for 'system wide':
433,439,949 all_dc_accesses (35.66%)
443 all_tlbs_flushed (35.66%)
2,985,885 l1_dtlb_misses (35.66%)
18,318,019 l2_cache_accesses_from_dc_misses (35.68%)
50,114,810 l2_cache_accesses_from_ic_misses (35.72%)
12,423,978 l2_cache_hits_from_dc_misses (35.74%)
40,703,103 l2_cache_hits_from_ic_misses (35.74%)
6,698,673 l2_cache_misses_from_dc_misses (35.74%)
12,090,892 l2_cache_misses_from_ic_miss (35.74%)
614,267 l2_dtlb_misses (35.74%)
216,036 l2_itlb_misses (35.74%)
11,977 sse_avx_stalls (35.74%)
999,276,223 uops_dispatched (35.73%)
1,075,311,620 uops_retired (35.69%)
1,420,763 l3_accesses
540,164 l3_misses
2.002344121 seconds time elapsed
# perf stat -a -e all_dc_accesses,all_tlbs_flushed,l1_dtlb_misses,l2_cache_accesses_from_dc_misses,l2_cache_accesses_from_ic_misses sleep 2
Performance counter stats for 'system wide':
175,943,104 all_dc_accesses
310 all_tlbs_flushed
2,280,359 l1_dtlb_misses
11,700,151 l2_cache_accesses_from_dc_misses
25,414,963 l2_cache_accesses_from_ic_misses
2.001957818 seconds time elapsed
#
Link: https://bugzilla.kernel.org/show_bug.cgi?id=206537
Signed-off-by: Kim Phillips <kim.phillips@amd.com>
Acked-by: Ian Rogers <irogers@google.com>
Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Borislav Petkov <bp@suse.de>
Cc: Jin Yao <yao.jin@linux.intel.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: John Garry <john.garry@huawei.com>
Cc: Jon Grimm <jon.grimm@amd.com>
Cc: Kan Liang <kan.liang@linux.intel.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Martin Jambor <mjambor@suse.cz>
Cc: Martin Liška <mliska@suse.cz>
Cc: Michael Petlan <mpetlan@redhat.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Stephane Eranian <eranian@google.com>
Cc: Vijay Thakkar <vijaythakkar@me.com>
Cc: William Cohen <wcohen@redhat.com>
Cc: Yunfeng Ye <yeyunfeng@huawei.com>
Link: http://lore.kernel.org/lkml/20200901220944.277505-3-kim.phillips@amd.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2020-09-01 22:09:43 +00:00
|
|
|
{ "DFPMC", "amd_df" },
|
2017-01-28 02:03:37 +00:00
|
|
|
{}
|
|
|
|
};
|
|
|
|
|
|
|
|
static const char *field_to_perf(struct map *table, char *map, jsmntok_t *val)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
|
|
|
|
for (i = 0; table[i].json; i++) {
|
|
|
|
if (json_streq(map, val, table[i].json))
|
|
|
|
return table[i].perf;
|
|
|
|
}
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
perf jevents: Program to convert JSON file
This is a modified version of an earlier patch by Andi Kleen.
We expect architectures to create JSON files describing the performance
monitoring (PMU) events that each CPU model/family of the architecture
supports.
Following is an example of the JSON file entry for an x86 event:
[
...
{
"EventCode": "0x00",
"UMask": "0x01",
"EventName": "INST_RETIRED.ANY",
"BriefDescription": "Instructions retired from execution.",
"PublicDescription": "Instructions retired from execution.",
"Counter": "Fixed counter 1",
"CounterHTOff": "Fixed counter 1",
"SampleAfterValue": "2000003",
"SampleAfterValue": "2000003",
"MSRIndex": "0",
"MSRValue": "0",
"TakenAlone": "0",
"CounterMask": "0",
"Invert": "0",
"AnyThread": "0",
"EdgeDetect": "0",
"PEBS": "0",
"PRECISE_STORE": "0",
"Errata": "null",
"Offcore": "0"
},
...
]
All the PMU events supported by a CPU model/family must be grouped into
"topics" such as "Pipelining", "Floating-point", "Virtual-memory" etc.
All events belonging to a topic must be placed in a separate JSON file
(eg: "Pipelining.json") and all the topic JSON files for a CPU model must
be in a separate directory.
Eg: for the CPU model "Silvermont_core":
$ ls tools/perf/pmu-events/arch/x86/Silvermont_core
Floating-point.json
Memory.json
Other.json
Pipelining.json
Virtualmemory.json
Finally, to allow multiple CPU models to share a single set of JSON files,
architectures must provide a mapping between a model and its set of events:
$ grep Silvermont tools/perf/pmu-events/arch/x86/mapfile.csv
GenuineIntel-6-4D,V13,Silvermont_core,core
GenuineIntel-6-4C,V13,Silvermont_core,core
which maps each CPU, identified by [vendor, family, model, version, type]
to a directory of JSON files. Thus two (or more) CPU models support the
set of PMU events listed in the directory.
tools/perf/pmu-events/arch/x86/Silvermont_core/
Given this organization of files, the program, jevents:
- locates all JSON files for each CPU-model of the architecture,
- parses all JSON files for the CPU-model and generates a C-style
"PMU-events table" (pmu-events.c) for the model
- locates a mapfile for the architecture
- builds a global table, mapping each model of CPU to the corresponding
PMU-events table.
The 'pmu-events.c' is generated when building perf and added to libperf.a.
The global table pmu_events_map[] table in this pmu-events.c will be used
in perf in a follow-on patch.
If the architecture does not have any JSON files or there is an error in
processing them, an empty mapping file is created. This would allow the
build of perf to proceed even if we are not able to provide aliases for
events.
The parser for JSON files allows parsing Intel style JSON event files. This
allows to use an Intel event list directly with perf. The Intel event lists
can be quite large and are too big to store in unswappable kernel memory.
The conversion from JSON to C-style is straight forward. The parser knows
(very little) Intel specific information, and can be easily extended to
handle fields for other CPUs.
The parser code is partially shared with an independent parsing library,
which is 2-clause BSD licensed. To avoid any conflicts I marked those
files as BSD licensed too. As part of perf they become GPLv2.
Committer notes:
Fixes:
1) Limit maxfds to 512 to avoid nftd() segfaulting on alloca() with a
big rlim_max, as in docker containers - acme
2) Make jevents a hostprog, supporting cross compilation - jolsa
3) Use HOSTCC for jevents final step - acme
4) Define _GNU_SOURCE for asprintf, as we can't use CC's EXTRA_CFLAGS,
that has to have --sysroot on the Android NDK 24 - acme
5) Removed $(srctree)/tools/perf/pmu-events/pmu-events.c from the
'clean' target, it is generated on $(OUTPUT)pmu-events/pmu-events.c,
which is already taken care of in the original patch - acme
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Jiri Olsa <jolsa@redhat.com>
Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Acked-by: Ingo Molnar <mingo@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Cc: linuxppc-dev@lists.ozlabs.org
Link: http://lkml.kernel.org/r/1473978296-20712-3-git-send-email-sukadev@linux.vnet.ibm.com
Link: http://lkml.kernel.org/r/20160927141846.GA6589@krava
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-19 20:39:33 +00:00
|
|
|
#define EXPECT(e, t, m) do { if (!(e)) { \
|
|
|
|
jsmntok_t *loc = (t); \
|
|
|
|
if (!(t)->start && (t) > tokens) \
|
|
|
|
loc = (t) - 1; \
|
2018-03-08 10:58:27 +00:00
|
|
|
pr_err("%s:%d: " m ", got %s\n", fn, \
|
|
|
|
json_line(map, loc), \
|
|
|
|
json_name(t)); \
|
|
|
|
err = -EIO; \
|
perf jevents: Program to convert JSON file
This is a modified version of an earlier patch by Andi Kleen.
We expect architectures to create JSON files describing the performance
monitoring (PMU) events that each CPU model/family of the architecture
supports.
Following is an example of the JSON file entry for an x86 event:
[
...
{
"EventCode": "0x00",
"UMask": "0x01",
"EventName": "INST_RETIRED.ANY",
"BriefDescription": "Instructions retired from execution.",
"PublicDescription": "Instructions retired from execution.",
"Counter": "Fixed counter 1",
"CounterHTOff": "Fixed counter 1",
"SampleAfterValue": "2000003",
"SampleAfterValue": "2000003",
"MSRIndex": "0",
"MSRValue": "0",
"TakenAlone": "0",
"CounterMask": "0",
"Invert": "0",
"AnyThread": "0",
"EdgeDetect": "0",
"PEBS": "0",
"PRECISE_STORE": "0",
"Errata": "null",
"Offcore": "0"
},
...
]
All the PMU events supported by a CPU model/family must be grouped into
"topics" such as "Pipelining", "Floating-point", "Virtual-memory" etc.
All events belonging to a topic must be placed in a separate JSON file
(eg: "Pipelining.json") and all the topic JSON files for a CPU model must
be in a separate directory.
Eg: for the CPU model "Silvermont_core":
$ ls tools/perf/pmu-events/arch/x86/Silvermont_core
Floating-point.json
Memory.json
Other.json
Pipelining.json
Virtualmemory.json
Finally, to allow multiple CPU models to share a single set of JSON files,
architectures must provide a mapping between a model and its set of events:
$ grep Silvermont tools/perf/pmu-events/arch/x86/mapfile.csv
GenuineIntel-6-4D,V13,Silvermont_core,core
GenuineIntel-6-4C,V13,Silvermont_core,core
which maps each CPU, identified by [vendor, family, model, version, type]
to a directory of JSON files. Thus two (or more) CPU models support the
set of PMU events listed in the directory.
tools/perf/pmu-events/arch/x86/Silvermont_core/
Given this organization of files, the program, jevents:
- locates all JSON files for each CPU-model of the architecture,
- parses all JSON files for the CPU-model and generates a C-style
"PMU-events table" (pmu-events.c) for the model
- locates a mapfile for the architecture
- builds a global table, mapping each model of CPU to the corresponding
PMU-events table.
The 'pmu-events.c' is generated when building perf and added to libperf.a.
The global table pmu_events_map[] table in this pmu-events.c will be used
in perf in a follow-on patch.
If the architecture does not have any JSON files or there is an error in
processing them, an empty mapping file is created. This would allow the
build of perf to proceed even if we are not able to provide aliases for
events.
The parser for JSON files allows parsing Intel style JSON event files. This
allows to use an Intel event list directly with perf. The Intel event lists
can be quite large and are too big to store in unswappable kernel memory.
The conversion from JSON to C-style is straight forward. The parser knows
(very little) Intel specific information, and can be easily extended to
handle fields for other CPUs.
The parser code is partially shared with an independent parsing library,
which is 2-clause BSD licensed. To avoid any conflicts I marked those
files as BSD licensed too. As part of perf they become GPLv2.
Committer notes:
Fixes:
1) Limit maxfds to 512 to avoid nftd() segfaulting on alloca() with a
big rlim_max, as in docker containers - acme
2) Make jevents a hostprog, supporting cross compilation - jolsa
3) Use HOSTCC for jevents final step - acme
4) Define _GNU_SOURCE for asprintf, as we can't use CC's EXTRA_CFLAGS,
that has to have --sysroot on the Android NDK 24 - acme
5) Removed $(srctree)/tools/perf/pmu-events/pmu-events.c from the
'clean' target, it is generated on $(OUTPUT)pmu-events/pmu-events.c,
which is already taken care of in the original patch - acme
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Jiri Olsa <jolsa@redhat.com>
Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Acked-by: Ingo Molnar <mingo@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Cc: linuxppc-dev@lists.ozlabs.org
Link: http://lkml.kernel.org/r/1473978296-20712-3-git-send-email-sukadev@linux.vnet.ibm.com
Link: http://lkml.kernel.org/r/20160927141846.GA6589@krava
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-19 20:39:33 +00:00
|
|
|
goto out_free; \
|
|
|
|
} } while (0)
|
|
|
|
|
2018-03-08 10:58:28 +00:00
|
|
|
static char *topic;
|
perf jevents: Program to convert JSON file
This is a modified version of an earlier patch by Andi Kleen.
We expect architectures to create JSON files describing the performance
monitoring (PMU) events that each CPU model/family of the architecture
supports.
Following is an example of the JSON file entry for an x86 event:
[
...
{
"EventCode": "0x00",
"UMask": "0x01",
"EventName": "INST_RETIRED.ANY",
"BriefDescription": "Instructions retired from execution.",
"PublicDescription": "Instructions retired from execution.",
"Counter": "Fixed counter 1",
"CounterHTOff": "Fixed counter 1",
"SampleAfterValue": "2000003",
"SampleAfterValue": "2000003",
"MSRIndex": "0",
"MSRValue": "0",
"TakenAlone": "0",
"CounterMask": "0",
"Invert": "0",
"AnyThread": "0",
"EdgeDetect": "0",
"PEBS": "0",
"PRECISE_STORE": "0",
"Errata": "null",
"Offcore": "0"
},
...
]
All the PMU events supported by a CPU model/family must be grouped into
"topics" such as "Pipelining", "Floating-point", "Virtual-memory" etc.
All events belonging to a topic must be placed in a separate JSON file
(eg: "Pipelining.json") and all the topic JSON files for a CPU model must
be in a separate directory.
Eg: for the CPU model "Silvermont_core":
$ ls tools/perf/pmu-events/arch/x86/Silvermont_core
Floating-point.json
Memory.json
Other.json
Pipelining.json
Virtualmemory.json
Finally, to allow multiple CPU models to share a single set of JSON files,
architectures must provide a mapping between a model and its set of events:
$ grep Silvermont tools/perf/pmu-events/arch/x86/mapfile.csv
GenuineIntel-6-4D,V13,Silvermont_core,core
GenuineIntel-6-4C,V13,Silvermont_core,core
which maps each CPU, identified by [vendor, family, model, version, type]
to a directory of JSON files. Thus two (or more) CPU models support the
set of PMU events listed in the directory.
tools/perf/pmu-events/arch/x86/Silvermont_core/
Given this organization of files, the program, jevents:
- locates all JSON files for each CPU-model of the architecture,
- parses all JSON files for the CPU-model and generates a C-style
"PMU-events table" (pmu-events.c) for the model
- locates a mapfile for the architecture
- builds a global table, mapping each model of CPU to the corresponding
PMU-events table.
The 'pmu-events.c' is generated when building perf and added to libperf.a.
The global table pmu_events_map[] table in this pmu-events.c will be used
in perf in a follow-on patch.
If the architecture does not have any JSON files or there is an error in
processing them, an empty mapping file is created. This would allow the
build of perf to proceed even if we are not able to provide aliases for
events.
The parser for JSON files allows parsing Intel style JSON event files. This
allows to use an Intel event list directly with perf. The Intel event lists
can be quite large and are too big to store in unswappable kernel memory.
The conversion from JSON to C-style is straight forward. The parser knows
(very little) Intel specific information, and can be easily extended to
handle fields for other CPUs.
The parser code is partially shared with an independent parsing library,
which is 2-clause BSD licensed. To avoid any conflicts I marked those
files as BSD licensed too. As part of perf they become GPLv2.
Committer notes:
Fixes:
1) Limit maxfds to 512 to avoid nftd() segfaulting on alloca() with a
big rlim_max, as in docker containers - acme
2) Make jevents a hostprog, supporting cross compilation - jolsa
3) Use HOSTCC for jevents final step - acme
4) Define _GNU_SOURCE for asprintf, as we can't use CC's EXTRA_CFLAGS,
that has to have --sysroot on the Android NDK 24 - acme
5) Removed $(srctree)/tools/perf/pmu-events/pmu-events.c from the
'clean' target, it is generated on $(OUTPUT)pmu-events/pmu-events.c,
which is already taken care of in the original patch - acme
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Jiri Olsa <jolsa@redhat.com>
Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Acked-by: Ingo Molnar <mingo@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Cc: linuxppc-dev@lists.ozlabs.org
Link: http://lkml.kernel.org/r/1473978296-20712-3-git-send-email-sukadev@linux.vnet.ibm.com
Link: http://lkml.kernel.org/r/20160927141846.GA6589@krava
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-19 20:39:33 +00:00
|
|
|
|
|
|
|
static char *get_topic(void)
|
|
|
|
{
|
2018-03-08 10:58:28 +00:00
|
|
|
char *tp;
|
perf jevents: Program to convert JSON file
This is a modified version of an earlier patch by Andi Kleen.
We expect architectures to create JSON files describing the performance
monitoring (PMU) events that each CPU model/family of the architecture
supports.
Following is an example of the JSON file entry for an x86 event:
[
...
{
"EventCode": "0x00",
"UMask": "0x01",
"EventName": "INST_RETIRED.ANY",
"BriefDescription": "Instructions retired from execution.",
"PublicDescription": "Instructions retired from execution.",
"Counter": "Fixed counter 1",
"CounterHTOff": "Fixed counter 1",
"SampleAfterValue": "2000003",
"SampleAfterValue": "2000003",
"MSRIndex": "0",
"MSRValue": "0",
"TakenAlone": "0",
"CounterMask": "0",
"Invert": "0",
"AnyThread": "0",
"EdgeDetect": "0",
"PEBS": "0",
"PRECISE_STORE": "0",
"Errata": "null",
"Offcore": "0"
},
...
]
All the PMU events supported by a CPU model/family must be grouped into
"topics" such as "Pipelining", "Floating-point", "Virtual-memory" etc.
All events belonging to a topic must be placed in a separate JSON file
(eg: "Pipelining.json") and all the topic JSON files for a CPU model must
be in a separate directory.
Eg: for the CPU model "Silvermont_core":
$ ls tools/perf/pmu-events/arch/x86/Silvermont_core
Floating-point.json
Memory.json
Other.json
Pipelining.json
Virtualmemory.json
Finally, to allow multiple CPU models to share a single set of JSON files,
architectures must provide a mapping between a model and its set of events:
$ grep Silvermont tools/perf/pmu-events/arch/x86/mapfile.csv
GenuineIntel-6-4D,V13,Silvermont_core,core
GenuineIntel-6-4C,V13,Silvermont_core,core
which maps each CPU, identified by [vendor, family, model, version, type]
to a directory of JSON files. Thus two (or more) CPU models support the
set of PMU events listed in the directory.
tools/perf/pmu-events/arch/x86/Silvermont_core/
Given this organization of files, the program, jevents:
- locates all JSON files for each CPU-model of the architecture,
- parses all JSON files for the CPU-model and generates a C-style
"PMU-events table" (pmu-events.c) for the model
- locates a mapfile for the architecture
- builds a global table, mapping each model of CPU to the corresponding
PMU-events table.
The 'pmu-events.c' is generated when building perf and added to libperf.a.
The global table pmu_events_map[] table in this pmu-events.c will be used
in perf in a follow-on patch.
If the architecture does not have any JSON files or there is an error in
processing them, an empty mapping file is created. This would allow the
build of perf to proceed even if we are not able to provide aliases for
events.
The parser for JSON files allows parsing Intel style JSON event files. This
allows to use an Intel event list directly with perf. The Intel event lists
can be quite large and are too big to store in unswappable kernel memory.
The conversion from JSON to C-style is straight forward. The parser knows
(very little) Intel specific information, and can be easily extended to
handle fields for other CPUs.
The parser code is partially shared with an independent parsing library,
which is 2-clause BSD licensed. To avoid any conflicts I marked those
files as BSD licensed too. As part of perf they become GPLv2.
Committer notes:
Fixes:
1) Limit maxfds to 512 to avoid nftd() segfaulting on alloca() with a
big rlim_max, as in docker containers - acme
2) Make jevents a hostprog, supporting cross compilation - jolsa
3) Use HOSTCC for jevents final step - acme
4) Define _GNU_SOURCE for asprintf, as we can't use CC's EXTRA_CFLAGS,
that has to have --sysroot on the Android NDK 24 - acme
5) Removed $(srctree)/tools/perf/pmu-events/pmu-events.c from the
'clean' target, it is generated on $(OUTPUT)pmu-events/pmu-events.c,
which is already taken care of in the original patch - acme
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Jiri Olsa <jolsa@redhat.com>
Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Acked-by: Ingo Molnar <mingo@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Cc: linuxppc-dev@lists.ozlabs.org
Link: http://lkml.kernel.org/r/1473978296-20712-3-git-send-email-sukadev@linux.vnet.ibm.com
Link: http://lkml.kernel.org/r/20160927141846.GA6589@krava
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-19 20:39:33 +00:00
|
|
|
int i;
|
|
|
|
|
2018-03-08 10:58:28 +00:00
|
|
|
/* tp is free'd in process_one_file() */
|
|
|
|
i = asprintf(&tp, "%s", topic);
|
|
|
|
if (i < 0) {
|
|
|
|
pr_info("%s: asprintf() error %s\n", prog);
|
|
|
|
return NULL;
|
perf jevents: Program to convert JSON file
This is a modified version of an earlier patch by Andi Kleen.
We expect architectures to create JSON files describing the performance
monitoring (PMU) events that each CPU model/family of the architecture
supports.
Following is an example of the JSON file entry for an x86 event:
[
...
{
"EventCode": "0x00",
"UMask": "0x01",
"EventName": "INST_RETIRED.ANY",
"BriefDescription": "Instructions retired from execution.",
"PublicDescription": "Instructions retired from execution.",
"Counter": "Fixed counter 1",
"CounterHTOff": "Fixed counter 1",
"SampleAfterValue": "2000003",
"SampleAfterValue": "2000003",
"MSRIndex": "0",
"MSRValue": "0",
"TakenAlone": "0",
"CounterMask": "0",
"Invert": "0",
"AnyThread": "0",
"EdgeDetect": "0",
"PEBS": "0",
"PRECISE_STORE": "0",
"Errata": "null",
"Offcore": "0"
},
...
]
All the PMU events supported by a CPU model/family must be grouped into
"topics" such as "Pipelining", "Floating-point", "Virtual-memory" etc.
All events belonging to a topic must be placed in a separate JSON file
(eg: "Pipelining.json") and all the topic JSON files for a CPU model must
be in a separate directory.
Eg: for the CPU model "Silvermont_core":
$ ls tools/perf/pmu-events/arch/x86/Silvermont_core
Floating-point.json
Memory.json
Other.json
Pipelining.json
Virtualmemory.json
Finally, to allow multiple CPU models to share a single set of JSON files,
architectures must provide a mapping between a model and its set of events:
$ grep Silvermont tools/perf/pmu-events/arch/x86/mapfile.csv
GenuineIntel-6-4D,V13,Silvermont_core,core
GenuineIntel-6-4C,V13,Silvermont_core,core
which maps each CPU, identified by [vendor, family, model, version, type]
to a directory of JSON files. Thus two (or more) CPU models support the
set of PMU events listed in the directory.
tools/perf/pmu-events/arch/x86/Silvermont_core/
Given this organization of files, the program, jevents:
- locates all JSON files for each CPU-model of the architecture,
- parses all JSON files for the CPU-model and generates a C-style
"PMU-events table" (pmu-events.c) for the model
- locates a mapfile for the architecture
- builds a global table, mapping each model of CPU to the corresponding
PMU-events table.
The 'pmu-events.c' is generated when building perf and added to libperf.a.
The global table pmu_events_map[] table in this pmu-events.c will be used
in perf in a follow-on patch.
If the architecture does not have any JSON files or there is an error in
processing them, an empty mapping file is created. This would allow the
build of perf to proceed even if we are not able to provide aliases for
events.
The parser for JSON files allows parsing Intel style JSON event files. This
allows to use an Intel event list directly with perf. The Intel event lists
can be quite large and are too big to store in unswappable kernel memory.
The conversion from JSON to C-style is straight forward. The parser knows
(very little) Intel specific information, and can be easily extended to
handle fields for other CPUs.
The parser code is partially shared with an independent parsing library,
which is 2-clause BSD licensed. To avoid any conflicts I marked those
files as BSD licensed too. As part of perf they become GPLv2.
Committer notes:
Fixes:
1) Limit maxfds to 512 to avoid nftd() segfaulting on alloca() with a
big rlim_max, as in docker containers - acme
2) Make jevents a hostprog, supporting cross compilation - jolsa
3) Use HOSTCC for jevents final step - acme
4) Define _GNU_SOURCE for asprintf, as we can't use CC's EXTRA_CFLAGS,
that has to have --sysroot on the Android NDK 24 - acme
5) Removed $(srctree)/tools/perf/pmu-events/pmu-events.c from the
'clean' target, it is generated on $(OUTPUT)pmu-events/pmu-events.c,
which is already taken care of in the original patch - acme
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Jiri Olsa <jolsa@redhat.com>
Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Acked-by: Ingo Molnar <mingo@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Cc: linuxppc-dev@lists.ozlabs.org
Link: http://lkml.kernel.org/r/1473978296-20712-3-git-send-email-sukadev@linux.vnet.ibm.com
Link: http://lkml.kernel.org/r/20160927141846.GA6589@krava
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-19 20:39:33 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
for (i = 0; i < (int) strlen(tp); i++) {
|
|
|
|
char c = tp[i];
|
|
|
|
|
|
|
|
if (c == '-')
|
|
|
|
tp[i] = ' ';
|
|
|
|
else if (c == '.') {
|
|
|
|
tp[i] = '\0';
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
return tp;
|
|
|
|
}
|
|
|
|
|
2018-03-08 10:58:28 +00:00
|
|
|
static int add_topic(char *bname)
|
perf jevents: Program to convert JSON file
This is a modified version of an earlier patch by Andi Kleen.
We expect architectures to create JSON files describing the performance
monitoring (PMU) events that each CPU model/family of the architecture
supports.
Following is an example of the JSON file entry for an x86 event:
[
...
{
"EventCode": "0x00",
"UMask": "0x01",
"EventName": "INST_RETIRED.ANY",
"BriefDescription": "Instructions retired from execution.",
"PublicDescription": "Instructions retired from execution.",
"Counter": "Fixed counter 1",
"CounterHTOff": "Fixed counter 1",
"SampleAfterValue": "2000003",
"SampleAfterValue": "2000003",
"MSRIndex": "0",
"MSRValue": "0",
"TakenAlone": "0",
"CounterMask": "0",
"Invert": "0",
"AnyThread": "0",
"EdgeDetect": "0",
"PEBS": "0",
"PRECISE_STORE": "0",
"Errata": "null",
"Offcore": "0"
},
...
]
All the PMU events supported by a CPU model/family must be grouped into
"topics" such as "Pipelining", "Floating-point", "Virtual-memory" etc.
All events belonging to a topic must be placed in a separate JSON file
(eg: "Pipelining.json") and all the topic JSON files for a CPU model must
be in a separate directory.
Eg: for the CPU model "Silvermont_core":
$ ls tools/perf/pmu-events/arch/x86/Silvermont_core
Floating-point.json
Memory.json
Other.json
Pipelining.json
Virtualmemory.json
Finally, to allow multiple CPU models to share a single set of JSON files,
architectures must provide a mapping between a model and its set of events:
$ grep Silvermont tools/perf/pmu-events/arch/x86/mapfile.csv
GenuineIntel-6-4D,V13,Silvermont_core,core
GenuineIntel-6-4C,V13,Silvermont_core,core
which maps each CPU, identified by [vendor, family, model, version, type]
to a directory of JSON files. Thus two (or more) CPU models support the
set of PMU events listed in the directory.
tools/perf/pmu-events/arch/x86/Silvermont_core/
Given this organization of files, the program, jevents:
- locates all JSON files for each CPU-model of the architecture,
- parses all JSON files for the CPU-model and generates a C-style
"PMU-events table" (pmu-events.c) for the model
- locates a mapfile for the architecture
- builds a global table, mapping each model of CPU to the corresponding
PMU-events table.
The 'pmu-events.c' is generated when building perf and added to libperf.a.
The global table pmu_events_map[] table in this pmu-events.c will be used
in perf in a follow-on patch.
If the architecture does not have any JSON files or there is an error in
processing them, an empty mapping file is created. This would allow the
build of perf to proceed even if we are not able to provide aliases for
events.
The parser for JSON files allows parsing Intel style JSON event files. This
allows to use an Intel event list directly with perf. The Intel event lists
can be quite large and are too big to store in unswappable kernel memory.
The conversion from JSON to C-style is straight forward. The parser knows
(very little) Intel specific information, and can be easily extended to
handle fields for other CPUs.
The parser code is partially shared with an independent parsing library,
which is 2-clause BSD licensed. To avoid any conflicts I marked those
files as BSD licensed too. As part of perf they become GPLv2.
Committer notes:
Fixes:
1) Limit maxfds to 512 to avoid nftd() segfaulting on alloca() with a
big rlim_max, as in docker containers - acme
2) Make jevents a hostprog, supporting cross compilation - jolsa
3) Use HOSTCC for jevents final step - acme
4) Define _GNU_SOURCE for asprintf, as we can't use CC's EXTRA_CFLAGS,
that has to have --sysroot on the Android NDK 24 - acme
5) Removed $(srctree)/tools/perf/pmu-events/pmu-events.c from the
'clean' target, it is generated on $(OUTPUT)pmu-events/pmu-events.c,
which is already taken care of in the original patch - acme
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Jiri Olsa <jolsa@redhat.com>
Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Acked-by: Ingo Molnar <mingo@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Cc: linuxppc-dev@lists.ozlabs.org
Link: http://lkml.kernel.org/r/1473978296-20712-3-git-send-email-sukadev@linux.vnet.ibm.com
Link: http://lkml.kernel.org/r/20160927141846.GA6589@krava
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-19 20:39:33 +00:00
|
|
|
{
|
2018-03-08 10:58:28 +00:00
|
|
|
free(topic);
|
perf jevents: Program to convert JSON file
This is a modified version of an earlier patch by Andi Kleen.
We expect architectures to create JSON files describing the performance
monitoring (PMU) events that each CPU model/family of the architecture
supports.
Following is an example of the JSON file entry for an x86 event:
[
...
{
"EventCode": "0x00",
"UMask": "0x01",
"EventName": "INST_RETIRED.ANY",
"BriefDescription": "Instructions retired from execution.",
"PublicDescription": "Instructions retired from execution.",
"Counter": "Fixed counter 1",
"CounterHTOff": "Fixed counter 1",
"SampleAfterValue": "2000003",
"SampleAfterValue": "2000003",
"MSRIndex": "0",
"MSRValue": "0",
"TakenAlone": "0",
"CounterMask": "0",
"Invert": "0",
"AnyThread": "0",
"EdgeDetect": "0",
"PEBS": "0",
"PRECISE_STORE": "0",
"Errata": "null",
"Offcore": "0"
},
...
]
All the PMU events supported by a CPU model/family must be grouped into
"topics" such as "Pipelining", "Floating-point", "Virtual-memory" etc.
All events belonging to a topic must be placed in a separate JSON file
(eg: "Pipelining.json") and all the topic JSON files for a CPU model must
be in a separate directory.
Eg: for the CPU model "Silvermont_core":
$ ls tools/perf/pmu-events/arch/x86/Silvermont_core
Floating-point.json
Memory.json
Other.json
Pipelining.json
Virtualmemory.json
Finally, to allow multiple CPU models to share a single set of JSON files,
architectures must provide a mapping between a model and its set of events:
$ grep Silvermont tools/perf/pmu-events/arch/x86/mapfile.csv
GenuineIntel-6-4D,V13,Silvermont_core,core
GenuineIntel-6-4C,V13,Silvermont_core,core
which maps each CPU, identified by [vendor, family, model, version, type]
to a directory of JSON files. Thus two (or more) CPU models support the
set of PMU events listed in the directory.
tools/perf/pmu-events/arch/x86/Silvermont_core/
Given this organization of files, the program, jevents:
- locates all JSON files for each CPU-model of the architecture,
- parses all JSON files for the CPU-model and generates a C-style
"PMU-events table" (pmu-events.c) for the model
- locates a mapfile for the architecture
- builds a global table, mapping each model of CPU to the corresponding
PMU-events table.
The 'pmu-events.c' is generated when building perf and added to libperf.a.
The global table pmu_events_map[] table in this pmu-events.c will be used
in perf in a follow-on patch.
If the architecture does not have any JSON files or there is an error in
processing them, an empty mapping file is created. This would allow the
build of perf to proceed even if we are not able to provide aliases for
events.
The parser for JSON files allows parsing Intel style JSON event files. This
allows to use an Intel event list directly with perf. The Intel event lists
can be quite large and are too big to store in unswappable kernel memory.
The conversion from JSON to C-style is straight forward. The parser knows
(very little) Intel specific information, and can be easily extended to
handle fields for other CPUs.
The parser code is partially shared with an independent parsing library,
which is 2-clause BSD licensed. To avoid any conflicts I marked those
files as BSD licensed too. As part of perf they become GPLv2.
Committer notes:
Fixes:
1) Limit maxfds to 512 to avoid nftd() segfaulting on alloca() with a
big rlim_max, as in docker containers - acme
2) Make jevents a hostprog, supporting cross compilation - jolsa
3) Use HOSTCC for jevents final step - acme
4) Define _GNU_SOURCE for asprintf, as we can't use CC's EXTRA_CFLAGS,
that has to have --sysroot on the Android NDK 24 - acme
5) Removed $(srctree)/tools/perf/pmu-events/pmu-events.c from the
'clean' target, it is generated on $(OUTPUT)pmu-events/pmu-events.c,
which is already taken care of in the original patch - acme
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Jiri Olsa <jolsa@redhat.com>
Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Acked-by: Ingo Molnar <mingo@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Cc: linuxppc-dev@lists.ozlabs.org
Link: http://lkml.kernel.org/r/1473978296-20712-3-git-send-email-sukadev@linux.vnet.ibm.com
Link: http://lkml.kernel.org/r/20160927141846.GA6589@krava
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-19 20:39:33 +00:00
|
|
|
topic = strdup(bname);
|
|
|
|
if (!topic) {
|
|
|
|
pr_info("%s: strdup() error %s for file %s\n", prog,
|
|
|
|
strerror(errno), bname);
|
|
|
|
return -ENOMEM;
|
|
|
|
}
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
struct perf_entry_data {
|
|
|
|
FILE *outfp;
|
|
|
|
char *topic;
|
|
|
|
};
|
|
|
|
|
|
|
|
static int close_table;
|
|
|
|
|
|
|
|
static void print_events_table_prefix(FILE *fp, const char *tblname)
|
|
|
|
{
|
|
|
|
fprintf(fp, "struct pmu_event %s[] = {\n", tblname);
|
|
|
|
close_table = 1;
|
|
|
|
}
|
|
|
|
|
2020-09-07 06:41:30 +00:00
|
|
|
static int print_events_table_entry(void *data, struct json_event *je)
|
perf jevents: Program to convert JSON file
This is a modified version of an earlier patch by Andi Kleen.
We expect architectures to create JSON files describing the performance
monitoring (PMU) events that each CPU model/family of the architecture
supports.
Following is an example of the JSON file entry for an x86 event:
[
...
{
"EventCode": "0x00",
"UMask": "0x01",
"EventName": "INST_RETIRED.ANY",
"BriefDescription": "Instructions retired from execution.",
"PublicDescription": "Instructions retired from execution.",
"Counter": "Fixed counter 1",
"CounterHTOff": "Fixed counter 1",
"SampleAfterValue": "2000003",
"SampleAfterValue": "2000003",
"MSRIndex": "0",
"MSRValue": "0",
"TakenAlone": "0",
"CounterMask": "0",
"Invert": "0",
"AnyThread": "0",
"EdgeDetect": "0",
"PEBS": "0",
"PRECISE_STORE": "0",
"Errata": "null",
"Offcore": "0"
},
...
]
All the PMU events supported by a CPU model/family must be grouped into
"topics" such as "Pipelining", "Floating-point", "Virtual-memory" etc.
All events belonging to a topic must be placed in a separate JSON file
(eg: "Pipelining.json") and all the topic JSON files for a CPU model must
be in a separate directory.
Eg: for the CPU model "Silvermont_core":
$ ls tools/perf/pmu-events/arch/x86/Silvermont_core
Floating-point.json
Memory.json
Other.json
Pipelining.json
Virtualmemory.json
Finally, to allow multiple CPU models to share a single set of JSON files,
architectures must provide a mapping between a model and its set of events:
$ grep Silvermont tools/perf/pmu-events/arch/x86/mapfile.csv
GenuineIntel-6-4D,V13,Silvermont_core,core
GenuineIntel-6-4C,V13,Silvermont_core,core
which maps each CPU, identified by [vendor, family, model, version, type]
to a directory of JSON files. Thus two (or more) CPU models support the
set of PMU events listed in the directory.
tools/perf/pmu-events/arch/x86/Silvermont_core/
Given this organization of files, the program, jevents:
- locates all JSON files for each CPU-model of the architecture,
- parses all JSON files for the CPU-model and generates a C-style
"PMU-events table" (pmu-events.c) for the model
- locates a mapfile for the architecture
- builds a global table, mapping each model of CPU to the corresponding
PMU-events table.
The 'pmu-events.c' is generated when building perf and added to libperf.a.
The global table pmu_events_map[] table in this pmu-events.c will be used
in perf in a follow-on patch.
If the architecture does not have any JSON files or there is an error in
processing them, an empty mapping file is created. This would allow the
build of perf to proceed even if we are not able to provide aliases for
events.
The parser for JSON files allows parsing Intel style JSON event files. This
allows to use an Intel event list directly with perf. The Intel event lists
can be quite large and are too big to store in unswappable kernel memory.
The conversion from JSON to C-style is straight forward. The parser knows
(very little) Intel specific information, and can be easily extended to
handle fields for other CPUs.
The parser code is partially shared with an independent parsing library,
which is 2-clause BSD licensed. To avoid any conflicts I marked those
files as BSD licensed too. As part of perf they become GPLv2.
Committer notes:
Fixes:
1) Limit maxfds to 512 to avoid nftd() segfaulting on alloca() with a
big rlim_max, as in docker containers - acme
2) Make jevents a hostprog, supporting cross compilation - jolsa
3) Use HOSTCC for jevents final step - acme
4) Define _GNU_SOURCE for asprintf, as we can't use CC's EXTRA_CFLAGS,
that has to have --sysroot on the Android NDK 24 - acme
5) Removed $(srctree)/tools/perf/pmu-events/pmu-events.c from the
'clean' target, it is generated on $(OUTPUT)pmu-events/pmu-events.c,
which is already taken care of in the original patch - acme
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Jiri Olsa <jolsa@redhat.com>
Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Acked-by: Ingo Molnar <mingo@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Cc: linuxppc-dev@lists.ozlabs.org
Link: http://lkml.kernel.org/r/1473978296-20712-3-git-send-email-sukadev@linux.vnet.ibm.com
Link: http://lkml.kernel.org/r/20160927141846.GA6589@krava
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-19 20:39:33 +00:00
|
|
|
{
|
|
|
|
struct perf_entry_data *pd = data;
|
|
|
|
FILE *outfp = pd->outfp;
|
|
|
|
char *topic = pd->topic;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* TODO: Remove formatting chars after debugging to reduce
|
|
|
|
* string lengths.
|
|
|
|
*/
|
|
|
|
fprintf(outfp, "{\n");
|
|
|
|
|
2020-09-07 06:41:30 +00:00
|
|
|
if (je->name)
|
|
|
|
fprintf(outfp, "\t.name = \"%s\",\n", je->name);
|
|
|
|
if (je->event)
|
|
|
|
fprintf(outfp, "\t.event = \"%s\",\n", je->event);
|
|
|
|
fprintf(outfp, "\t.desc = \"%s\",\n", je->desc);
|
perf jevents: Add support for system events tables
Process the JSONs to find support for "system" events, which are not
tied to a specific CPUID.
A "COMPAT" property is now used to match against the namespace ID from
the kernel PMU driver.
The generated pmu-events.c will now have 2 tables:
a. CPU events, as before.
b. New pmu_sys_event_tables[] table, which will have events matched to
specific SoCs.
It will look like this:
struct pmu_event pme_hisilicon_hip09_sys[] = {
{
.name = "cycles",
.compat = "0x00030736",
.event = "event=0",
.desc = "Clock cycles",
.topic = "smmu v3 pmcg",
.long_desc = "Clock cycles",
},
{
.name = "smmuv3_pmcg.l1_tlb",
.compat = "0x00030736",
.event = "event=0x8a",
.desc = "SMMUv3 PMCG l1_tlb. Unit: smmuv3_pmcg ",
.topic = "smmu v3 pmcg",
.long_desc = "SMMUv3 PMCG l1_tlb",
.pmu = "smmuv3_pmcg",
},
...
};
struct pmu_event pme_arm_cortex_a53[] = {
{
.name = "ext_mem_req",
.event = "event=0xc0",
.desc = "External memory request",
.topic = "memory",
},
{
.name = "ext_mem_req_nc",
.event = "event=0xc1",
.desc = "Non-cacheable external memory request",
.topic = "memory",
},
...
};
struct pmu_event pme_hisilicon_hip09_cpu[] = {
{
.name = "l2d_cache_refill_wr",
.event = "event=0x53",
.desc = "L2D cache refill, write",
.topic = "core imp def",
.long_desc = "Attributable Level 2 data cache refill, write",
},
...
};
struct pmu_events_map pmu_events_map[] = {
{
.cpuid = "0x00000000410fd030",
.version = "v1",
.type = "core",
.table = pme_arm_cortex_a53
},
{
.cpuid = "0x00000000480fd010",
.version = "v1",
.type = "core",
.table = pme_hisilicon_hip09_cpu
},
{
.table = 0
},
};
struct pmu_event pme_hisilicon_hip09_cpu[] = {
{
.name = "uncore_hisi_l3c.rd_cpipe",
.event = "event=0",
.desc = "Total read accesses. Unit: hisi_sccl,l3c ",
.topic = "uncore l3c",
.long_desc = "Total read accesses",
.pmu = "hisi_sccl,l3c",
},
{
.name = "uncore_hisi_l3c.wr_cpipe",
.event = "event=0x1",
.desc = "Total write accesses. Unit: hisi_sccl,l3c ",
.topic = "uncore l3c",
.long_desc = "Total write accesses",
.pmu = "hisi_sccl,l3c",
},
...
};
struct pmu_sys_events pmu_sys_event_tables[] = {
{
.table = pme_hisilicon_hip09_sys,
},
...
};
Committer notes:
Added the fix for architectures without PMU events, provided by John
after I reported the build failing in such systems.
Link: https://lore.kernel.org/lkml/650baaf2-36b6-a9e2-ff49-963ef864c1f3@huawei.com/
Signed-off-by: John Garry <john.garry@huawei.com>
Acked-by: Kajol Jain <kjain@linux.ibm.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Ian Rogers <irogers@google.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Joakim Zhang <qiangqing.zhang@nxp.com>
Cc: Kan Liang <kan.liang@linux.intel.com>
Cc: Kim Phillips <kim.phillips@amd.com>
Cc: Leo Yan <leo.yan@linaro.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Shaokun Zhang <zhangshaokun@hisilicon.com>
Cc: Will Deacon <will@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linuxarm@huawei.com
Link: http://lore.kernel.org/lkml/1607080216-36968-3-git-send-email-john.garry@huawei.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2020-12-04 11:10:08 +00:00
|
|
|
if (je->compat)
|
|
|
|
fprintf(outfp, "\t.compat = \"%s\",\n", je->compat);
|
perf jevents: Program to convert JSON file
This is a modified version of an earlier patch by Andi Kleen.
We expect architectures to create JSON files describing the performance
monitoring (PMU) events that each CPU model/family of the architecture
supports.
Following is an example of the JSON file entry for an x86 event:
[
...
{
"EventCode": "0x00",
"UMask": "0x01",
"EventName": "INST_RETIRED.ANY",
"BriefDescription": "Instructions retired from execution.",
"PublicDescription": "Instructions retired from execution.",
"Counter": "Fixed counter 1",
"CounterHTOff": "Fixed counter 1",
"SampleAfterValue": "2000003",
"SampleAfterValue": "2000003",
"MSRIndex": "0",
"MSRValue": "0",
"TakenAlone": "0",
"CounterMask": "0",
"Invert": "0",
"AnyThread": "0",
"EdgeDetect": "0",
"PEBS": "0",
"PRECISE_STORE": "0",
"Errata": "null",
"Offcore": "0"
},
...
]
All the PMU events supported by a CPU model/family must be grouped into
"topics" such as "Pipelining", "Floating-point", "Virtual-memory" etc.
All events belonging to a topic must be placed in a separate JSON file
(eg: "Pipelining.json") and all the topic JSON files for a CPU model must
be in a separate directory.
Eg: for the CPU model "Silvermont_core":
$ ls tools/perf/pmu-events/arch/x86/Silvermont_core
Floating-point.json
Memory.json
Other.json
Pipelining.json
Virtualmemory.json
Finally, to allow multiple CPU models to share a single set of JSON files,
architectures must provide a mapping between a model and its set of events:
$ grep Silvermont tools/perf/pmu-events/arch/x86/mapfile.csv
GenuineIntel-6-4D,V13,Silvermont_core,core
GenuineIntel-6-4C,V13,Silvermont_core,core
which maps each CPU, identified by [vendor, family, model, version, type]
to a directory of JSON files. Thus two (or more) CPU models support the
set of PMU events listed in the directory.
tools/perf/pmu-events/arch/x86/Silvermont_core/
Given this organization of files, the program, jevents:
- locates all JSON files for each CPU-model of the architecture,
- parses all JSON files for the CPU-model and generates a C-style
"PMU-events table" (pmu-events.c) for the model
- locates a mapfile for the architecture
- builds a global table, mapping each model of CPU to the corresponding
PMU-events table.
The 'pmu-events.c' is generated when building perf and added to libperf.a.
The global table pmu_events_map[] table in this pmu-events.c will be used
in perf in a follow-on patch.
If the architecture does not have any JSON files or there is an error in
processing them, an empty mapping file is created. This would allow the
build of perf to proceed even if we are not able to provide aliases for
events.
The parser for JSON files allows parsing Intel style JSON event files. This
allows to use an Intel event list directly with perf. The Intel event lists
can be quite large and are too big to store in unswappable kernel memory.
The conversion from JSON to C-style is straight forward. The parser knows
(very little) Intel specific information, and can be easily extended to
handle fields for other CPUs.
The parser code is partially shared with an independent parsing library,
which is 2-clause BSD licensed. To avoid any conflicts I marked those
files as BSD licensed too. As part of perf they become GPLv2.
Committer notes:
Fixes:
1) Limit maxfds to 512 to avoid nftd() segfaulting on alloca() with a
big rlim_max, as in docker containers - acme
2) Make jevents a hostprog, supporting cross compilation - jolsa
3) Use HOSTCC for jevents final step - acme
4) Define _GNU_SOURCE for asprintf, as we can't use CC's EXTRA_CFLAGS,
that has to have --sysroot on the Android NDK 24 - acme
5) Removed $(srctree)/tools/perf/pmu-events/pmu-events.c from the
'clean' target, it is generated on $(OUTPUT)pmu-events/pmu-events.c,
which is already taken care of in the original patch - acme
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Jiri Olsa <jolsa@redhat.com>
Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Acked-by: Ingo Molnar <mingo@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Cc: linuxppc-dev@lists.ozlabs.org
Link: http://lkml.kernel.org/r/1473978296-20712-3-git-send-email-sukadev@linux.vnet.ibm.com
Link: http://lkml.kernel.org/r/20160927141846.GA6589@krava
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-19 20:39:33 +00:00
|
|
|
fprintf(outfp, "\t.topic = \"%s\",\n", topic);
|
2020-09-07 06:41:30 +00:00
|
|
|
if (je->long_desc && je->long_desc[0])
|
|
|
|
fprintf(outfp, "\t.long_desc = \"%s\",\n", je->long_desc);
|
|
|
|
if (je->pmu)
|
|
|
|
fprintf(outfp, "\t.pmu = \"%s\",\n", je->pmu);
|
|
|
|
if (je->unit)
|
|
|
|
fprintf(outfp, "\t.unit = \"%s\",\n", je->unit);
|
|
|
|
if (je->perpkg)
|
|
|
|
fprintf(outfp, "\t.perpkg = \"%s\",\n", je->perpkg);
|
2020-09-07 06:41:31 +00:00
|
|
|
if (je->aggr_mode)
|
|
|
|
fprintf(outfp, "\t.aggr_mode = \"%d\",\n", convert(je->aggr_mode));
|
2020-09-07 06:41:30 +00:00
|
|
|
if (je->metric_expr)
|
|
|
|
fprintf(outfp, "\t.metric_expr = \"%s\",\n", je->metric_expr);
|
|
|
|
if (je->metric_name)
|
|
|
|
fprintf(outfp, "\t.metric_name = \"%s\",\n", je->metric_name);
|
|
|
|
if (je->metric_group)
|
|
|
|
fprintf(outfp, "\t.metric_group = \"%s\",\n", je->metric_group);
|
|
|
|
if (je->deprecated)
|
|
|
|
fprintf(outfp, "\t.deprecated = \"%s\",\n", je->deprecated);
|
|
|
|
if (je->metric_constraint)
|
|
|
|
fprintf(outfp, "\t.metric_constraint = \"%s\",\n", je->metric_constraint);
|
perf jevents: Program to convert JSON file
This is a modified version of an earlier patch by Andi Kleen.
We expect architectures to create JSON files describing the performance
monitoring (PMU) events that each CPU model/family of the architecture
supports.
Following is an example of the JSON file entry for an x86 event:
[
...
{
"EventCode": "0x00",
"UMask": "0x01",
"EventName": "INST_RETIRED.ANY",
"BriefDescription": "Instructions retired from execution.",
"PublicDescription": "Instructions retired from execution.",
"Counter": "Fixed counter 1",
"CounterHTOff": "Fixed counter 1",
"SampleAfterValue": "2000003",
"SampleAfterValue": "2000003",
"MSRIndex": "0",
"MSRValue": "0",
"TakenAlone": "0",
"CounterMask": "0",
"Invert": "0",
"AnyThread": "0",
"EdgeDetect": "0",
"PEBS": "0",
"PRECISE_STORE": "0",
"Errata": "null",
"Offcore": "0"
},
...
]
All the PMU events supported by a CPU model/family must be grouped into
"topics" such as "Pipelining", "Floating-point", "Virtual-memory" etc.
All events belonging to a topic must be placed in a separate JSON file
(eg: "Pipelining.json") and all the topic JSON files for a CPU model must
be in a separate directory.
Eg: for the CPU model "Silvermont_core":
$ ls tools/perf/pmu-events/arch/x86/Silvermont_core
Floating-point.json
Memory.json
Other.json
Pipelining.json
Virtualmemory.json
Finally, to allow multiple CPU models to share a single set of JSON files,
architectures must provide a mapping between a model and its set of events:
$ grep Silvermont tools/perf/pmu-events/arch/x86/mapfile.csv
GenuineIntel-6-4D,V13,Silvermont_core,core
GenuineIntel-6-4C,V13,Silvermont_core,core
which maps each CPU, identified by [vendor, family, model, version, type]
to a directory of JSON files. Thus two (or more) CPU models support the
set of PMU events listed in the directory.
tools/perf/pmu-events/arch/x86/Silvermont_core/
Given this organization of files, the program, jevents:
- locates all JSON files for each CPU-model of the architecture,
- parses all JSON files for the CPU-model and generates a C-style
"PMU-events table" (pmu-events.c) for the model
- locates a mapfile for the architecture
- builds a global table, mapping each model of CPU to the corresponding
PMU-events table.
The 'pmu-events.c' is generated when building perf and added to libperf.a.
The global table pmu_events_map[] table in this pmu-events.c will be used
in perf in a follow-on patch.
If the architecture does not have any JSON files or there is an error in
processing them, an empty mapping file is created. This would allow the
build of perf to proceed even if we are not able to provide aliases for
events.
The parser for JSON files allows parsing Intel style JSON event files. This
allows to use an Intel event list directly with perf. The Intel event lists
can be quite large and are too big to store in unswappable kernel memory.
The conversion from JSON to C-style is straight forward. The parser knows
(very little) Intel specific information, and can be easily extended to
handle fields for other CPUs.
The parser code is partially shared with an independent parsing library,
which is 2-clause BSD licensed. To avoid any conflicts I marked those
files as BSD licensed too. As part of perf they become GPLv2.
Committer notes:
Fixes:
1) Limit maxfds to 512 to avoid nftd() segfaulting on alloca() with a
big rlim_max, as in docker containers - acme
2) Make jevents a hostprog, supporting cross compilation - jolsa
3) Use HOSTCC for jevents final step - acme
4) Define _GNU_SOURCE for asprintf, as we can't use CC's EXTRA_CFLAGS,
that has to have --sysroot on the Android NDK 24 - acme
5) Removed $(srctree)/tools/perf/pmu-events/pmu-events.c from the
'clean' target, it is generated on $(OUTPUT)pmu-events/pmu-events.c,
which is already taken care of in the original patch - acme
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Jiri Olsa <jolsa@redhat.com>
Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Acked-by: Ingo Molnar <mingo@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Cc: linuxppc-dev@lists.ozlabs.org
Link: http://lkml.kernel.org/r/1473978296-20712-3-git-send-email-sukadev@linux.vnet.ibm.com
Link: http://lkml.kernel.org/r/20160927141846.GA6589@krava
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-19 20:39:33 +00:00
|
|
|
fprintf(outfp, "},\n");
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
perf vendor events: Add support for arch standard events
For some architectures (like arm), there are architecture- defined
events. Sometimes these events may be "recommended" according to the
architecture standard, in that the implementer is free ignore the
"recommendation" and create its custom event.
This patch adds support for parsing standard events from arch-defined
JSONs, and fixing up vendor events when they have implemented these
events as standard.
Support is also ensured that the vendor may implement their own custom
events.
A new step is added to the pmu events parsing to fix up the vendor
events with the arch-standard events.
The arch-defined JSONs must be placed in the arch root folder for
preprocessing prior to tree JSON processing.
In the vendor JSON, to specify that the arch event is supported, the
keyword "ArchStdEvent" should be used, like this:
[
{
"ArchStdEvent": "L1D_CACHE_WR",
},
]
Matching is based on the "EventName" field in the architecture JSON.
No other JSON objects are strictly required. However, for other objects
added, these take precedence over architecture defined standard events,
thus supporting separate events which have the same event code.
Signed-off-by: John Garry <john.garry@huawei.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Ganapatrao Kulkarni <ganapatrao.kulkarni@cavium.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Shaokun Zhang <zhangshaokun@hisilicon.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: William Cohen <wcohen@redhat.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linuxarm@huawei.com
Link: http://lkml.kernel.org/r/1520506716-197429-8-git-send-email-john.garry@huawei.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2018-03-08 10:58:32 +00:00
|
|
|
struct event_struct {
|
|
|
|
struct list_head list;
|
|
|
|
char *name;
|
|
|
|
char *event;
|
perf jevents: Add support for system events tables
Process the JSONs to find support for "system" events, which are not
tied to a specific CPUID.
A "COMPAT" property is now used to match against the namespace ID from
the kernel PMU driver.
The generated pmu-events.c will now have 2 tables:
a. CPU events, as before.
b. New pmu_sys_event_tables[] table, which will have events matched to
specific SoCs.
It will look like this:
struct pmu_event pme_hisilicon_hip09_sys[] = {
{
.name = "cycles",
.compat = "0x00030736",
.event = "event=0",
.desc = "Clock cycles",
.topic = "smmu v3 pmcg",
.long_desc = "Clock cycles",
},
{
.name = "smmuv3_pmcg.l1_tlb",
.compat = "0x00030736",
.event = "event=0x8a",
.desc = "SMMUv3 PMCG l1_tlb. Unit: smmuv3_pmcg ",
.topic = "smmu v3 pmcg",
.long_desc = "SMMUv3 PMCG l1_tlb",
.pmu = "smmuv3_pmcg",
},
...
};
struct pmu_event pme_arm_cortex_a53[] = {
{
.name = "ext_mem_req",
.event = "event=0xc0",
.desc = "External memory request",
.topic = "memory",
},
{
.name = "ext_mem_req_nc",
.event = "event=0xc1",
.desc = "Non-cacheable external memory request",
.topic = "memory",
},
...
};
struct pmu_event pme_hisilicon_hip09_cpu[] = {
{
.name = "l2d_cache_refill_wr",
.event = "event=0x53",
.desc = "L2D cache refill, write",
.topic = "core imp def",
.long_desc = "Attributable Level 2 data cache refill, write",
},
...
};
struct pmu_events_map pmu_events_map[] = {
{
.cpuid = "0x00000000410fd030",
.version = "v1",
.type = "core",
.table = pme_arm_cortex_a53
},
{
.cpuid = "0x00000000480fd010",
.version = "v1",
.type = "core",
.table = pme_hisilicon_hip09_cpu
},
{
.table = 0
},
};
struct pmu_event pme_hisilicon_hip09_cpu[] = {
{
.name = "uncore_hisi_l3c.rd_cpipe",
.event = "event=0",
.desc = "Total read accesses. Unit: hisi_sccl,l3c ",
.topic = "uncore l3c",
.long_desc = "Total read accesses",
.pmu = "hisi_sccl,l3c",
},
{
.name = "uncore_hisi_l3c.wr_cpipe",
.event = "event=0x1",
.desc = "Total write accesses. Unit: hisi_sccl,l3c ",
.topic = "uncore l3c",
.long_desc = "Total write accesses",
.pmu = "hisi_sccl,l3c",
},
...
};
struct pmu_sys_events pmu_sys_event_tables[] = {
{
.table = pme_hisilicon_hip09_sys,
},
...
};
Committer notes:
Added the fix for architectures without PMU events, provided by John
after I reported the build failing in such systems.
Link: https://lore.kernel.org/lkml/650baaf2-36b6-a9e2-ff49-963ef864c1f3@huawei.com/
Signed-off-by: John Garry <john.garry@huawei.com>
Acked-by: Kajol Jain <kjain@linux.ibm.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Ian Rogers <irogers@google.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Joakim Zhang <qiangqing.zhang@nxp.com>
Cc: Kan Liang <kan.liang@linux.intel.com>
Cc: Kim Phillips <kim.phillips@amd.com>
Cc: Leo Yan <leo.yan@linaro.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Shaokun Zhang <zhangshaokun@hisilicon.com>
Cc: Will Deacon <will@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linuxarm@huawei.com
Link: http://lore.kernel.org/lkml/1607080216-36968-3-git-send-email-john.garry@huawei.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2020-12-04 11:10:08 +00:00
|
|
|
char *compat;
|
perf vendor events: Add support for arch standard events
For some architectures (like arm), there are architecture- defined
events. Sometimes these events may be "recommended" according to the
architecture standard, in that the implementer is free ignore the
"recommendation" and create its custom event.
This patch adds support for parsing standard events from arch-defined
JSONs, and fixing up vendor events when they have implemented these
events as standard.
Support is also ensured that the vendor may implement their own custom
events.
A new step is added to the pmu events parsing to fix up the vendor
events with the arch-standard events.
The arch-defined JSONs must be placed in the arch root folder for
preprocessing prior to tree JSON processing.
In the vendor JSON, to specify that the arch event is supported, the
keyword "ArchStdEvent" should be used, like this:
[
{
"ArchStdEvent": "L1D_CACHE_WR",
},
]
Matching is based on the "EventName" field in the architecture JSON.
No other JSON objects are strictly required. However, for other objects
added, these take precedence over architecture defined standard events,
thus supporting separate events which have the same event code.
Signed-off-by: John Garry <john.garry@huawei.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Ganapatrao Kulkarni <ganapatrao.kulkarni@cavium.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Shaokun Zhang <zhangshaokun@hisilicon.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: William Cohen <wcohen@redhat.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linuxarm@huawei.com
Link: http://lkml.kernel.org/r/1520506716-197429-8-git-send-email-john.garry@huawei.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2018-03-08 10:58:32 +00:00
|
|
|
char *desc;
|
|
|
|
char *long_desc;
|
|
|
|
char *pmu;
|
|
|
|
char *unit;
|
|
|
|
char *perpkg;
|
2020-09-07 06:41:31 +00:00
|
|
|
char *aggr_mode;
|
perf vendor events: Add support for arch standard events
For some architectures (like arm), there are architecture- defined
events. Sometimes these events may be "recommended" according to the
architecture standard, in that the implementer is free ignore the
"recommendation" and create its custom event.
This patch adds support for parsing standard events from arch-defined
JSONs, and fixing up vendor events when they have implemented these
events as standard.
Support is also ensured that the vendor may implement their own custom
events.
A new step is added to the pmu events parsing to fix up the vendor
events with the arch-standard events.
The arch-defined JSONs must be placed in the arch root folder for
preprocessing prior to tree JSON processing.
In the vendor JSON, to specify that the arch event is supported, the
keyword "ArchStdEvent" should be used, like this:
[
{
"ArchStdEvent": "L1D_CACHE_WR",
},
]
Matching is based on the "EventName" field in the architecture JSON.
No other JSON objects are strictly required. However, for other objects
added, these take precedence over architecture defined standard events,
thus supporting separate events which have the same event code.
Signed-off-by: John Garry <john.garry@huawei.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Ganapatrao Kulkarni <ganapatrao.kulkarni@cavium.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Shaokun Zhang <zhangshaokun@hisilicon.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: William Cohen <wcohen@redhat.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linuxarm@huawei.com
Link: http://lkml.kernel.org/r/1520506716-197429-8-git-send-email-john.garry@huawei.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2018-03-08 10:58:32 +00:00
|
|
|
char *metric_expr;
|
|
|
|
char *metric_name;
|
|
|
|
char *metric_group;
|
2019-10-15 02:53:57 +00:00
|
|
|
char *deprecated;
|
2020-02-24 21:59:20 +00:00
|
|
|
char *metric_constraint;
|
perf vendor events: Add support for arch standard events
For some architectures (like arm), there are architecture- defined
events. Sometimes these events may be "recommended" according to the
architecture standard, in that the implementer is free ignore the
"recommendation" and create its custom event.
This patch adds support for parsing standard events from arch-defined
JSONs, and fixing up vendor events when they have implemented these
events as standard.
Support is also ensured that the vendor may implement their own custom
events.
A new step is added to the pmu events parsing to fix up the vendor
events with the arch-standard events.
The arch-defined JSONs must be placed in the arch root folder for
preprocessing prior to tree JSON processing.
In the vendor JSON, to specify that the arch event is supported, the
keyword "ArchStdEvent" should be used, like this:
[
{
"ArchStdEvent": "L1D_CACHE_WR",
},
]
Matching is based on the "EventName" field in the architecture JSON.
No other JSON objects are strictly required. However, for other objects
added, these take precedence over architecture defined standard events,
thus supporting separate events which have the same event code.
Signed-off-by: John Garry <john.garry@huawei.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Ganapatrao Kulkarni <ganapatrao.kulkarni@cavium.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Shaokun Zhang <zhangshaokun@hisilicon.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: William Cohen <wcohen@redhat.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linuxarm@huawei.com
Link: http://lkml.kernel.org/r/1520506716-197429-8-git-send-email-john.garry@huawei.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2018-03-08 10:58:32 +00:00
|
|
|
};
|
|
|
|
|
2020-09-07 06:41:30 +00:00
|
|
|
#define ADD_EVENT_FIELD(field) do { if (je->field) { \
|
|
|
|
es->field = strdup(je->field); \
|
perf vendor events: Add support for arch standard events
For some architectures (like arm), there are architecture- defined
events. Sometimes these events may be "recommended" according to the
architecture standard, in that the implementer is free ignore the
"recommendation" and create its custom event.
This patch adds support for parsing standard events from arch-defined
JSONs, and fixing up vendor events when they have implemented these
events as standard.
Support is also ensured that the vendor may implement their own custom
events.
A new step is added to the pmu events parsing to fix up the vendor
events with the arch-standard events.
The arch-defined JSONs must be placed in the arch root folder for
preprocessing prior to tree JSON processing.
In the vendor JSON, to specify that the arch event is supported, the
keyword "ArchStdEvent" should be used, like this:
[
{
"ArchStdEvent": "L1D_CACHE_WR",
},
]
Matching is based on the "EventName" field in the architecture JSON.
No other JSON objects are strictly required. However, for other objects
added, these take precedence over architecture defined standard events,
thus supporting separate events which have the same event code.
Signed-off-by: John Garry <john.garry@huawei.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Ganapatrao Kulkarni <ganapatrao.kulkarni@cavium.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Shaokun Zhang <zhangshaokun@hisilicon.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: William Cohen <wcohen@redhat.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linuxarm@huawei.com
Link: http://lkml.kernel.org/r/1520506716-197429-8-git-send-email-john.garry@huawei.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2018-03-08 10:58:32 +00:00
|
|
|
if (!es->field) \
|
|
|
|
goto out_free; \
|
|
|
|
} } while (0)
|
|
|
|
|
|
|
|
#define FREE_EVENT_FIELD(field) free(es->field)
|
|
|
|
|
2020-09-07 06:41:30 +00:00
|
|
|
#define TRY_FIXUP_FIELD(field) do { if (es->field && !je->field) {\
|
|
|
|
je->field = strdup(es->field); \
|
|
|
|
if (!je->field) \
|
perf vendor events: Add support for arch standard events
For some architectures (like arm), there are architecture- defined
events. Sometimes these events may be "recommended" according to the
architecture standard, in that the implementer is free ignore the
"recommendation" and create its custom event.
This patch adds support for parsing standard events from arch-defined
JSONs, and fixing up vendor events when they have implemented these
events as standard.
Support is also ensured that the vendor may implement their own custom
events.
A new step is added to the pmu events parsing to fix up the vendor
events with the arch-standard events.
The arch-defined JSONs must be placed in the arch root folder for
preprocessing prior to tree JSON processing.
In the vendor JSON, to specify that the arch event is supported, the
keyword "ArchStdEvent" should be used, like this:
[
{
"ArchStdEvent": "L1D_CACHE_WR",
},
]
Matching is based on the "EventName" field in the architecture JSON.
No other JSON objects are strictly required. However, for other objects
added, these take precedence over architecture defined standard events,
thus supporting separate events which have the same event code.
Signed-off-by: John Garry <john.garry@huawei.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Ganapatrao Kulkarni <ganapatrao.kulkarni@cavium.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Shaokun Zhang <zhangshaokun@hisilicon.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: William Cohen <wcohen@redhat.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linuxarm@huawei.com
Link: http://lkml.kernel.org/r/1520506716-197429-8-git-send-email-john.garry@huawei.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2018-03-08 10:58:32 +00:00
|
|
|
return -ENOMEM; \
|
|
|
|
} } while (0)
|
|
|
|
|
|
|
|
#define FOR_ALL_EVENT_STRUCT_FIELDS(op) do { \
|
|
|
|
op(name); \
|
|
|
|
op(event); \
|
|
|
|
op(desc); \
|
|
|
|
op(long_desc); \
|
|
|
|
op(pmu); \
|
|
|
|
op(unit); \
|
|
|
|
op(perpkg); \
|
2020-09-07 06:41:31 +00:00
|
|
|
op(aggr_mode); \
|
perf vendor events: Add support for arch standard events
For some architectures (like arm), there are architecture- defined
events. Sometimes these events may be "recommended" according to the
architecture standard, in that the implementer is free ignore the
"recommendation" and create its custom event.
This patch adds support for parsing standard events from arch-defined
JSONs, and fixing up vendor events when they have implemented these
events as standard.
Support is also ensured that the vendor may implement their own custom
events.
A new step is added to the pmu events parsing to fix up the vendor
events with the arch-standard events.
The arch-defined JSONs must be placed in the arch root folder for
preprocessing prior to tree JSON processing.
In the vendor JSON, to specify that the arch event is supported, the
keyword "ArchStdEvent" should be used, like this:
[
{
"ArchStdEvent": "L1D_CACHE_WR",
},
]
Matching is based on the "EventName" field in the architecture JSON.
No other JSON objects are strictly required. However, for other objects
added, these take precedence over architecture defined standard events,
thus supporting separate events which have the same event code.
Signed-off-by: John Garry <john.garry@huawei.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Ganapatrao Kulkarni <ganapatrao.kulkarni@cavium.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Shaokun Zhang <zhangshaokun@hisilicon.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: William Cohen <wcohen@redhat.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linuxarm@huawei.com
Link: http://lkml.kernel.org/r/1520506716-197429-8-git-send-email-john.garry@huawei.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2018-03-08 10:58:32 +00:00
|
|
|
op(metric_expr); \
|
|
|
|
op(metric_name); \
|
|
|
|
op(metric_group); \
|
2019-10-15 02:53:57 +00:00
|
|
|
op(deprecated); \
|
perf vendor events: Add support for arch standard events
For some architectures (like arm), there are architecture- defined
events. Sometimes these events may be "recommended" according to the
architecture standard, in that the implementer is free ignore the
"recommendation" and create its custom event.
This patch adds support for parsing standard events from arch-defined
JSONs, and fixing up vendor events when they have implemented these
events as standard.
Support is also ensured that the vendor may implement their own custom
events.
A new step is added to the pmu events parsing to fix up the vendor
events with the arch-standard events.
The arch-defined JSONs must be placed in the arch root folder for
preprocessing prior to tree JSON processing.
In the vendor JSON, to specify that the arch event is supported, the
keyword "ArchStdEvent" should be used, like this:
[
{
"ArchStdEvent": "L1D_CACHE_WR",
},
]
Matching is based on the "EventName" field in the architecture JSON.
No other JSON objects are strictly required. However, for other objects
added, these take precedence over architecture defined standard events,
thus supporting separate events which have the same event code.
Signed-off-by: John Garry <john.garry@huawei.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Ganapatrao Kulkarni <ganapatrao.kulkarni@cavium.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Shaokun Zhang <zhangshaokun@hisilicon.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: William Cohen <wcohen@redhat.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linuxarm@huawei.com
Link: http://lkml.kernel.org/r/1520506716-197429-8-git-send-email-john.garry@huawei.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2018-03-08 10:58:32 +00:00
|
|
|
} while (0)
|
|
|
|
|
|
|
|
static LIST_HEAD(arch_std_events);
|
|
|
|
|
|
|
|
static void free_arch_std_events(void)
|
|
|
|
{
|
|
|
|
struct event_struct *es, *next;
|
|
|
|
|
|
|
|
list_for_each_entry_safe(es, next, &arch_std_events, list) {
|
|
|
|
FOR_ALL_EVENT_STRUCT_FIELDS(FREE_EVENT_FIELD);
|
2019-07-04 15:13:46 +00:00
|
|
|
list_del_init(&es->list);
|
perf vendor events: Add support for arch standard events
For some architectures (like arm), there are architecture- defined
events. Sometimes these events may be "recommended" according to the
architecture standard, in that the implementer is free ignore the
"recommendation" and create its custom event.
This patch adds support for parsing standard events from arch-defined
JSONs, and fixing up vendor events when they have implemented these
events as standard.
Support is also ensured that the vendor may implement their own custom
events.
A new step is added to the pmu events parsing to fix up the vendor
events with the arch-standard events.
The arch-defined JSONs must be placed in the arch root folder for
preprocessing prior to tree JSON processing.
In the vendor JSON, to specify that the arch event is supported, the
keyword "ArchStdEvent" should be used, like this:
[
{
"ArchStdEvent": "L1D_CACHE_WR",
},
]
Matching is based on the "EventName" field in the architecture JSON.
No other JSON objects are strictly required. However, for other objects
added, these take precedence over architecture defined standard events,
thus supporting separate events which have the same event code.
Signed-off-by: John Garry <john.garry@huawei.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Ganapatrao Kulkarni <ganapatrao.kulkarni@cavium.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Shaokun Zhang <zhangshaokun@hisilicon.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: William Cohen <wcohen@redhat.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linuxarm@huawei.com
Link: http://lkml.kernel.org/r/1520506716-197429-8-git-send-email-john.garry@huawei.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2018-03-08 10:58:32 +00:00
|
|
|
free(es);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2020-09-07 06:41:30 +00:00
|
|
|
static int save_arch_std_events(void *data, struct json_event *je)
|
perf vendor events: Add support for arch standard events
For some architectures (like arm), there are architecture- defined
events. Sometimes these events may be "recommended" according to the
architecture standard, in that the implementer is free ignore the
"recommendation" and create its custom event.
This patch adds support for parsing standard events from arch-defined
JSONs, and fixing up vendor events when they have implemented these
events as standard.
Support is also ensured that the vendor may implement their own custom
events.
A new step is added to the pmu events parsing to fix up the vendor
events with the arch-standard events.
The arch-defined JSONs must be placed in the arch root folder for
preprocessing prior to tree JSON processing.
In the vendor JSON, to specify that the arch event is supported, the
keyword "ArchStdEvent" should be used, like this:
[
{
"ArchStdEvent": "L1D_CACHE_WR",
},
]
Matching is based on the "EventName" field in the architecture JSON.
No other JSON objects are strictly required. However, for other objects
added, these take precedence over architecture defined standard events,
thus supporting separate events which have the same event code.
Signed-off-by: John Garry <john.garry@huawei.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Ganapatrao Kulkarni <ganapatrao.kulkarni@cavium.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Shaokun Zhang <zhangshaokun@hisilicon.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: William Cohen <wcohen@redhat.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linuxarm@huawei.com
Link: http://lkml.kernel.org/r/1520506716-197429-8-git-send-email-john.garry@huawei.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2018-03-08 10:58:32 +00:00
|
|
|
{
|
|
|
|
struct event_struct *es;
|
|
|
|
|
|
|
|
es = malloc(sizeof(*es));
|
|
|
|
if (!es)
|
|
|
|
return -ENOMEM;
|
|
|
|
memset(es, 0, sizeof(*es));
|
|
|
|
FOR_ALL_EVENT_STRUCT_FIELDS(ADD_EVENT_FIELD);
|
|
|
|
list_add_tail(&es->list, &arch_std_events);
|
|
|
|
return 0;
|
|
|
|
out_free:
|
|
|
|
FOR_ALL_EVENT_STRUCT_FIELDS(FREE_EVENT_FIELD);
|
|
|
|
free(es);
|
|
|
|
return -ENOMEM;
|
|
|
|
}
|
|
|
|
|
perf jevents: Program to convert JSON file
This is a modified version of an earlier patch by Andi Kleen.
We expect architectures to create JSON files describing the performance
monitoring (PMU) events that each CPU model/family of the architecture
supports.
Following is an example of the JSON file entry for an x86 event:
[
...
{
"EventCode": "0x00",
"UMask": "0x01",
"EventName": "INST_RETIRED.ANY",
"BriefDescription": "Instructions retired from execution.",
"PublicDescription": "Instructions retired from execution.",
"Counter": "Fixed counter 1",
"CounterHTOff": "Fixed counter 1",
"SampleAfterValue": "2000003",
"SampleAfterValue": "2000003",
"MSRIndex": "0",
"MSRValue": "0",
"TakenAlone": "0",
"CounterMask": "0",
"Invert": "0",
"AnyThread": "0",
"EdgeDetect": "0",
"PEBS": "0",
"PRECISE_STORE": "0",
"Errata": "null",
"Offcore": "0"
},
...
]
All the PMU events supported by a CPU model/family must be grouped into
"topics" such as "Pipelining", "Floating-point", "Virtual-memory" etc.
All events belonging to a topic must be placed in a separate JSON file
(eg: "Pipelining.json") and all the topic JSON files for a CPU model must
be in a separate directory.
Eg: for the CPU model "Silvermont_core":
$ ls tools/perf/pmu-events/arch/x86/Silvermont_core
Floating-point.json
Memory.json
Other.json
Pipelining.json
Virtualmemory.json
Finally, to allow multiple CPU models to share a single set of JSON files,
architectures must provide a mapping between a model and its set of events:
$ grep Silvermont tools/perf/pmu-events/arch/x86/mapfile.csv
GenuineIntel-6-4D,V13,Silvermont_core,core
GenuineIntel-6-4C,V13,Silvermont_core,core
which maps each CPU, identified by [vendor, family, model, version, type]
to a directory of JSON files. Thus two (or more) CPU models support the
set of PMU events listed in the directory.
tools/perf/pmu-events/arch/x86/Silvermont_core/
Given this organization of files, the program, jevents:
- locates all JSON files for each CPU-model of the architecture,
- parses all JSON files for the CPU-model and generates a C-style
"PMU-events table" (pmu-events.c) for the model
- locates a mapfile for the architecture
- builds a global table, mapping each model of CPU to the corresponding
PMU-events table.
The 'pmu-events.c' is generated when building perf and added to libperf.a.
The global table pmu_events_map[] table in this pmu-events.c will be used
in perf in a follow-on patch.
If the architecture does not have any JSON files or there is an error in
processing them, an empty mapping file is created. This would allow the
build of perf to proceed even if we are not able to provide aliases for
events.
The parser for JSON files allows parsing Intel style JSON event files. This
allows to use an Intel event list directly with perf. The Intel event lists
can be quite large and are too big to store in unswappable kernel memory.
The conversion from JSON to C-style is straight forward. The parser knows
(very little) Intel specific information, and can be easily extended to
handle fields for other CPUs.
The parser code is partially shared with an independent parsing library,
which is 2-clause BSD licensed. To avoid any conflicts I marked those
files as BSD licensed too. As part of perf they become GPLv2.
Committer notes:
Fixes:
1) Limit maxfds to 512 to avoid nftd() segfaulting on alloca() with a
big rlim_max, as in docker containers - acme
2) Make jevents a hostprog, supporting cross compilation - jolsa
3) Use HOSTCC for jevents final step - acme
4) Define _GNU_SOURCE for asprintf, as we can't use CC's EXTRA_CFLAGS,
that has to have --sysroot on the Android NDK 24 - acme
5) Removed $(srctree)/tools/perf/pmu-events/pmu-events.c from the
'clean' target, it is generated on $(OUTPUT)pmu-events/pmu-events.c,
which is already taken care of in the original patch - acme
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Jiri Olsa <jolsa@redhat.com>
Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Acked-by: Ingo Molnar <mingo@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Cc: linuxppc-dev@lists.ozlabs.org
Link: http://lkml.kernel.org/r/1473978296-20712-3-git-send-email-sukadev@linux.vnet.ibm.com
Link: http://lkml.kernel.org/r/20160927141846.GA6589@krava
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-19 20:39:33 +00:00
|
|
|
static void print_events_table_suffix(FILE *outfp)
|
|
|
|
{
|
|
|
|
fprintf(outfp, "{\n");
|
|
|
|
|
|
|
|
fprintf(outfp, "\t.name = 0,\n");
|
|
|
|
fprintf(outfp, "\t.event = 0,\n");
|
|
|
|
fprintf(outfp, "\t.desc = 0,\n");
|
|
|
|
|
|
|
|
fprintf(outfp, "},\n");
|
|
|
|
fprintf(outfp, "};\n");
|
|
|
|
close_table = 0;
|
|
|
|
}
|
|
|
|
|
2016-09-15 22:24:54 +00:00
|
|
|
static struct fixed {
|
|
|
|
const char *name;
|
|
|
|
const char *event;
|
|
|
|
} fixed[] = {
|
2019-09-27 23:35:45 +00:00
|
|
|
{ "inst_retired.any", "event=0xc0,period=2000003" },
|
|
|
|
{ "inst_retired.any_p", "event=0xc0,period=2000003" },
|
|
|
|
{ "cpu_clk_unhalted.ref", "event=0x0,umask=0x03,period=2000003" },
|
|
|
|
{ "cpu_clk_unhalted.thread", "event=0x3c,period=2000003" },
|
|
|
|
{ "cpu_clk_unhalted.core", "event=0x3c,period=2000003" },
|
|
|
|
{ "cpu_clk_unhalted.thread_any", "event=0x3c,any=1,period=2000003" },
|
2016-09-15 22:24:54 +00:00
|
|
|
{ NULL, NULL},
|
|
|
|
};
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Handle different fixed counter encodings between JSON and perf.
|
|
|
|
*/
|
|
|
|
static char *real_event(const char *name, char *event)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
|
2017-08-31 19:40:27 +00:00
|
|
|
if (!name)
|
|
|
|
return NULL;
|
|
|
|
|
2016-09-15 22:24:54 +00:00
|
|
|
for (i = 0; fixed[i].name; i++)
|
|
|
|
if (!strcasecmp(name, fixed[i].name))
|
|
|
|
return (char *)fixed[i].event;
|
|
|
|
return event;
|
|
|
|
}
|
|
|
|
|
perf vendor events: Add support for arch standard events
For some architectures (like arm), there are architecture- defined
events. Sometimes these events may be "recommended" according to the
architecture standard, in that the implementer is free ignore the
"recommendation" and create its custom event.
This patch adds support for parsing standard events from arch-defined
JSONs, and fixing up vendor events when they have implemented these
events as standard.
Support is also ensured that the vendor may implement their own custom
events.
A new step is added to the pmu events parsing to fix up the vendor
events with the arch-standard events.
The arch-defined JSONs must be placed in the arch root folder for
preprocessing prior to tree JSON processing.
In the vendor JSON, to specify that the arch event is supported, the
keyword "ArchStdEvent" should be used, like this:
[
{
"ArchStdEvent": "L1D_CACHE_WR",
},
]
Matching is based on the "EventName" field in the architecture JSON.
No other JSON objects are strictly required. However, for other objects
added, these take precedence over architecture defined standard events,
thus supporting separate events which have the same event code.
Signed-off-by: John Garry <john.garry@huawei.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Ganapatrao Kulkarni <ganapatrao.kulkarni@cavium.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Shaokun Zhang <zhangshaokun@hisilicon.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: William Cohen <wcohen@redhat.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linuxarm@huawei.com
Link: http://lkml.kernel.org/r/1520506716-197429-8-git-send-email-john.garry@huawei.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2018-03-08 10:58:32 +00:00
|
|
|
static int
|
2020-10-08 15:19:28 +00:00
|
|
|
try_fixup(const char *fn, char *arch_std, struct json_event *je, char **event)
|
perf vendor events: Add support for arch standard events
For some architectures (like arm), there are architecture- defined
events. Sometimes these events may be "recommended" according to the
architecture standard, in that the implementer is free ignore the
"recommendation" and create its custom event.
This patch adds support for parsing standard events from arch-defined
JSONs, and fixing up vendor events when they have implemented these
events as standard.
Support is also ensured that the vendor may implement their own custom
events.
A new step is added to the pmu events parsing to fix up the vendor
events with the arch-standard events.
The arch-defined JSONs must be placed in the arch root folder for
preprocessing prior to tree JSON processing.
In the vendor JSON, to specify that the arch event is supported, the
keyword "ArchStdEvent" should be used, like this:
[
{
"ArchStdEvent": "L1D_CACHE_WR",
},
]
Matching is based on the "EventName" field in the architecture JSON.
No other JSON objects are strictly required. However, for other objects
added, these take precedence over architecture defined standard events,
thus supporting separate events which have the same event code.
Signed-off-by: John Garry <john.garry@huawei.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Ganapatrao Kulkarni <ganapatrao.kulkarni@cavium.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Shaokun Zhang <zhangshaokun@hisilicon.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: William Cohen <wcohen@redhat.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linuxarm@huawei.com
Link: http://lkml.kernel.org/r/1520506716-197429-8-git-send-email-john.garry@huawei.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2018-03-08 10:58:32 +00:00
|
|
|
{
|
|
|
|
/* try to find matching event from arch standard values */
|
|
|
|
struct event_struct *es;
|
|
|
|
|
|
|
|
list_for_each_entry(es, &arch_std_events, list) {
|
|
|
|
if (!strcmp(arch_std, es->name)) {
|
|
|
|
FOR_ALL_EVENT_STRUCT_FIELDS(TRY_FIXUP_FIELD);
|
2020-10-08 15:19:28 +00:00
|
|
|
*event = je->event;
|
perf vendor events: Add support for arch standard events
For some architectures (like arm), there are architecture- defined
events. Sometimes these events may be "recommended" according to the
architecture standard, in that the implementer is free ignore the
"recommendation" and create its custom event.
This patch adds support for parsing standard events from arch-defined
JSONs, and fixing up vendor events when they have implemented these
events as standard.
Support is also ensured that the vendor may implement their own custom
events.
A new step is added to the pmu events parsing to fix up the vendor
events with the arch-standard events.
The arch-defined JSONs must be placed in the arch root folder for
preprocessing prior to tree JSON processing.
In the vendor JSON, to specify that the arch event is supported, the
keyword "ArchStdEvent" should be used, like this:
[
{
"ArchStdEvent": "L1D_CACHE_WR",
},
]
Matching is based on the "EventName" field in the architecture JSON.
No other JSON objects are strictly required. However, for other objects
added, these take precedence over architecture defined standard events,
thus supporting separate events which have the same event code.
Signed-off-by: John Garry <john.garry@huawei.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Ganapatrao Kulkarni <ganapatrao.kulkarni@cavium.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Shaokun Zhang <zhangshaokun@hisilicon.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: William Cohen <wcohen@redhat.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linuxarm@huawei.com
Link: http://lkml.kernel.org/r/1520506716-197429-8-git-send-email-john.garry@huawei.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2018-03-08 10:58:32 +00:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
pr_err("%s: could not find matching %s for %s\n",
|
|
|
|
prog, arch_std, fn);
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
|
perf jevents: Program to convert JSON file
This is a modified version of an earlier patch by Andi Kleen.
We expect architectures to create JSON files describing the performance
monitoring (PMU) events that each CPU model/family of the architecture
supports.
Following is an example of the JSON file entry for an x86 event:
[
...
{
"EventCode": "0x00",
"UMask": "0x01",
"EventName": "INST_RETIRED.ANY",
"BriefDescription": "Instructions retired from execution.",
"PublicDescription": "Instructions retired from execution.",
"Counter": "Fixed counter 1",
"CounterHTOff": "Fixed counter 1",
"SampleAfterValue": "2000003",
"SampleAfterValue": "2000003",
"MSRIndex": "0",
"MSRValue": "0",
"TakenAlone": "0",
"CounterMask": "0",
"Invert": "0",
"AnyThread": "0",
"EdgeDetect": "0",
"PEBS": "0",
"PRECISE_STORE": "0",
"Errata": "null",
"Offcore": "0"
},
...
]
All the PMU events supported by a CPU model/family must be grouped into
"topics" such as "Pipelining", "Floating-point", "Virtual-memory" etc.
All events belonging to a topic must be placed in a separate JSON file
(eg: "Pipelining.json") and all the topic JSON files for a CPU model must
be in a separate directory.
Eg: for the CPU model "Silvermont_core":
$ ls tools/perf/pmu-events/arch/x86/Silvermont_core
Floating-point.json
Memory.json
Other.json
Pipelining.json
Virtualmemory.json
Finally, to allow multiple CPU models to share a single set of JSON files,
architectures must provide a mapping between a model and its set of events:
$ grep Silvermont tools/perf/pmu-events/arch/x86/mapfile.csv
GenuineIntel-6-4D,V13,Silvermont_core,core
GenuineIntel-6-4C,V13,Silvermont_core,core
which maps each CPU, identified by [vendor, family, model, version, type]
to a directory of JSON files. Thus two (or more) CPU models support the
set of PMU events listed in the directory.
tools/perf/pmu-events/arch/x86/Silvermont_core/
Given this organization of files, the program, jevents:
- locates all JSON files for each CPU-model of the architecture,
- parses all JSON files for the CPU-model and generates a C-style
"PMU-events table" (pmu-events.c) for the model
- locates a mapfile for the architecture
- builds a global table, mapping each model of CPU to the corresponding
PMU-events table.
The 'pmu-events.c' is generated when building perf and added to libperf.a.
The global table pmu_events_map[] table in this pmu-events.c will be used
in perf in a follow-on patch.
If the architecture does not have any JSON files or there is an error in
processing them, an empty mapping file is created. This would allow the
build of perf to proceed even if we are not able to provide aliases for
events.
The parser for JSON files allows parsing Intel style JSON event files. This
allows to use an Intel event list directly with perf. The Intel event lists
can be quite large and are too big to store in unswappable kernel memory.
The conversion from JSON to C-style is straight forward. The parser knows
(very little) Intel specific information, and can be easily extended to
handle fields for other CPUs.
The parser code is partially shared with an independent parsing library,
which is 2-clause BSD licensed. To avoid any conflicts I marked those
files as BSD licensed too. As part of perf they become GPLv2.
Committer notes:
Fixes:
1) Limit maxfds to 512 to avoid nftd() segfaulting on alloca() with a
big rlim_max, as in docker containers - acme
2) Make jevents a hostprog, supporting cross compilation - jolsa
3) Use HOSTCC for jevents final step - acme
4) Define _GNU_SOURCE for asprintf, as we can't use CC's EXTRA_CFLAGS,
that has to have --sysroot on the Android NDK 24 - acme
5) Removed $(srctree)/tools/perf/pmu-events/pmu-events.c from the
'clean' target, it is generated on $(OUTPUT)pmu-events/pmu-events.c,
which is already taken care of in the original patch - acme
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Jiri Olsa <jolsa@redhat.com>
Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Acked-by: Ingo Molnar <mingo@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Cc: linuxppc-dev@lists.ozlabs.org
Link: http://lkml.kernel.org/r/1473978296-20712-3-git-send-email-sukadev@linux.vnet.ibm.com
Link: http://lkml.kernel.org/r/20160927141846.GA6589@krava
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-19 20:39:33 +00:00
|
|
|
/* Call func with each event in the json file */
|
2020-09-07 06:41:29 +00:00
|
|
|
static int json_events(const char *fn,
|
2020-09-07 06:41:30 +00:00
|
|
|
int (*func)(void *data, struct json_event *je),
|
|
|
|
void *data)
|
perf jevents: Program to convert JSON file
This is a modified version of an earlier patch by Andi Kleen.
We expect architectures to create JSON files describing the performance
monitoring (PMU) events that each CPU model/family of the architecture
supports.
Following is an example of the JSON file entry for an x86 event:
[
...
{
"EventCode": "0x00",
"UMask": "0x01",
"EventName": "INST_RETIRED.ANY",
"BriefDescription": "Instructions retired from execution.",
"PublicDescription": "Instructions retired from execution.",
"Counter": "Fixed counter 1",
"CounterHTOff": "Fixed counter 1",
"SampleAfterValue": "2000003",
"SampleAfterValue": "2000003",
"MSRIndex": "0",
"MSRValue": "0",
"TakenAlone": "0",
"CounterMask": "0",
"Invert": "0",
"AnyThread": "0",
"EdgeDetect": "0",
"PEBS": "0",
"PRECISE_STORE": "0",
"Errata": "null",
"Offcore": "0"
},
...
]
All the PMU events supported by a CPU model/family must be grouped into
"topics" such as "Pipelining", "Floating-point", "Virtual-memory" etc.
All events belonging to a topic must be placed in a separate JSON file
(eg: "Pipelining.json") and all the topic JSON files for a CPU model must
be in a separate directory.
Eg: for the CPU model "Silvermont_core":
$ ls tools/perf/pmu-events/arch/x86/Silvermont_core
Floating-point.json
Memory.json
Other.json
Pipelining.json
Virtualmemory.json
Finally, to allow multiple CPU models to share a single set of JSON files,
architectures must provide a mapping between a model and its set of events:
$ grep Silvermont tools/perf/pmu-events/arch/x86/mapfile.csv
GenuineIntel-6-4D,V13,Silvermont_core,core
GenuineIntel-6-4C,V13,Silvermont_core,core
which maps each CPU, identified by [vendor, family, model, version, type]
to a directory of JSON files. Thus two (or more) CPU models support the
set of PMU events listed in the directory.
tools/perf/pmu-events/arch/x86/Silvermont_core/
Given this organization of files, the program, jevents:
- locates all JSON files for each CPU-model of the architecture,
- parses all JSON files for the CPU-model and generates a C-style
"PMU-events table" (pmu-events.c) for the model
- locates a mapfile for the architecture
- builds a global table, mapping each model of CPU to the corresponding
PMU-events table.
The 'pmu-events.c' is generated when building perf and added to libperf.a.
The global table pmu_events_map[] table in this pmu-events.c will be used
in perf in a follow-on patch.
If the architecture does not have any JSON files or there is an error in
processing them, an empty mapping file is created. This would allow the
build of perf to proceed even if we are not able to provide aliases for
events.
The parser for JSON files allows parsing Intel style JSON event files. This
allows to use an Intel event list directly with perf. The Intel event lists
can be quite large and are too big to store in unswappable kernel memory.
The conversion from JSON to C-style is straight forward. The parser knows
(very little) Intel specific information, and can be easily extended to
handle fields for other CPUs.
The parser code is partially shared with an independent parsing library,
which is 2-clause BSD licensed. To avoid any conflicts I marked those
files as BSD licensed too. As part of perf they become GPLv2.
Committer notes:
Fixes:
1) Limit maxfds to 512 to avoid nftd() segfaulting on alloca() with a
big rlim_max, as in docker containers - acme
2) Make jevents a hostprog, supporting cross compilation - jolsa
3) Use HOSTCC for jevents final step - acme
4) Define _GNU_SOURCE for asprintf, as we can't use CC's EXTRA_CFLAGS,
that has to have --sysroot on the Android NDK 24 - acme
5) Removed $(srctree)/tools/perf/pmu-events/pmu-events.c from the
'clean' target, it is generated on $(OUTPUT)pmu-events/pmu-events.c,
which is already taken care of in the original patch - acme
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Jiri Olsa <jolsa@redhat.com>
Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Acked-by: Ingo Molnar <mingo@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Cc: linuxppc-dev@lists.ozlabs.org
Link: http://lkml.kernel.org/r/1473978296-20712-3-git-send-email-sukadev@linux.vnet.ibm.com
Link: http://lkml.kernel.org/r/20160927141846.GA6589@krava
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-19 20:39:33 +00:00
|
|
|
{
|
2018-03-08 10:58:27 +00:00
|
|
|
int err;
|
perf jevents: Program to convert JSON file
This is a modified version of an earlier patch by Andi Kleen.
We expect architectures to create JSON files describing the performance
monitoring (PMU) events that each CPU model/family of the architecture
supports.
Following is an example of the JSON file entry for an x86 event:
[
...
{
"EventCode": "0x00",
"UMask": "0x01",
"EventName": "INST_RETIRED.ANY",
"BriefDescription": "Instructions retired from execution.",
"PublicDescription": "Instructions retired from execution.",
"Counter": "Fixed counter 1",
"CounterHTOff": "Fixed counter 1",
"SampleAfterValue": "2000003",
"SampleAfterValue": "2000003",
"MSRIndex": "0",
"MSRValue": "0",
"TakenAlone": "0",
"CounterMask": "0",
"Invert": "0",
"AnyThread": "0",
"EdgeDetect": "0",
"PEBS": "0",
"PRECISE_STORE": "0",
"Errata": "null",
"Offcore": "0"
},
...
]
All the PMU events supported by a CPU model/family must be grouped into
"topics" such as "Pipelining", "Floating-point", "Virtual-memory" etc.
All events belonging to a topic must be placed in a separate JSON file
(eg: "Pipelining.json") and all the topic JSON files for a CPU model must
be in a separate directory.
Eg: for the CPU model "Silvermont_core":
$ ls tools/perf/pmu-events/arch/x86/Silvermont_core
Floating-point.json
Memory.json
Other.json
Pipelining.json
Virtualmemory.json
Finally, to allow multiple CPU models to share a single set of JSON files,
architectures must provide a mapping between a model and its set of events:
$ grep Silvermont tools/perf/pmu-events/arch/x86/mapfile.csv
GenuineIntel-6-4D,V13,Silvermont_core,core
GenuineIntel-6-4C,V13,Silvermont_core,core
which maps each CPU, identified by [vendor, family, model, version, type]
to a directory of JSON files. Thus two (or more) CPU models support the
set of PMU events listed in the directory.
tools/perf/pmu-events/arch/x86/Silvermont_core/
Given this organization of files, the program, jevents:
- locates all JSON files for each CPU-model of the architecture,
- parses all JSON files for the CPU-model and generates a C-style
"PMU-events table" (pmu-events.c) for the model
- locates a mapfile for the architecture
- builds a global table, mapping each model of CPU to the corresponding
PMU-events table.
The 'pmu-events.c' is generated when building perf and added to libperf.a.
The global table pmu_events_map[] table in this pmu-events.c will be used
in perf in a follow-on patch.
If the architecture does not have any JSON files or there is an error in
processing them, an empty mapping file is created. This would allow the
build of perf to proceed even if we are not able to provide aliases for
events.
The parser for JSON files allows parsing Intel style JSON event files. This
allows to use an Intel event list directly with perf. The Intel event lists
can be quite large and are too big to store in unswappable kernel memory.
The conversion from JSON to C-style is straight forward. The parser knows
(very little) Intel specific information, and can be easily extended to
handle fields for other CPUs.
The parser code is partially shared with an independent parsing library,
which is 2-clause BSD licensed. To avoid any conflicts I marked those
files as BSD licensed too. As part of perf they become GPLv2.
Committer notes:
Fixes:
1) Limit maxfds to 512 to avoid nftd() segfaulting on alloca() with a
big rlim_max, as in docker containers - acme
2) Make jevents a hostprog, supporting cross compilation - jolsa
3) Use HOSTCC for jevents final step - acme
4) Define _GNU_SOURCE for asprintf, as we can't use CC's EXTRA_CFLAGS,
that has to have --sysroot on the Android NDK 24 - acme
5) Removed $(srctree)/tools/perf/pmu-events/pmu-events.c from the
'clean' target, it is generated on $(OUTPUT)pmu-events/pmu-events.c,
which is already taken care of in the original patch - acme
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Jiri Olsa <jolsa@redhat.com>
Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Acked-by: Ingo Molnar <mingo@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Cc: linuxppc-dev@lists.ozlabs.org
Link: http://lkml.kernel.org/r/1473978296-20712-3-git-send-email-sukadev@linux.vnet.ibm.com
Link: http://lkml.kernel.org/r/20160927141846.GA6589@krava
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-19 20:39:33 +00:00
|
|
|
size_t size;
|
|
|
|
jsmntok_t *tokens, *tok;
|
|
|
|
int i, j, len;
|
|
|
|
char *map;
|
2017-01-28 02:03:36 +00:00
|
|
|
char buf[128];
|
perf jevents: Program to convert JSON file
This is a modified version of an earlier patch by Andi Kleen.
We expect architectures to create JSON files describing the performance
monitoring (PMU) events that each CPU model/family of the architecture
supports.
Following is an example of the JSON file entry for an x86 event:
[
...
{
"EventCode": "0x00",
"UMask": "0x01",
"EventName": "INST_RETIRED.ANY",
"BriefDescription": "Instructions retired from execution.",
"PublicDescription": "Instructions retired from execution.",
"Counter": "Fixed counter 1",
"CounterHTOff": "Fixed counter 1",
"SampleAfterValue": "2000003",
"SampleAfterValue": "2000003",
"MSRIndex": "0",
"MSRValue": "0",
"TakenAlone": "0",
"CounterMask": "0",
"Invert": "0",
"AnyThread": "0",
"EdgeDetect": "0",
"PEBS": "0",
"PRECISE_STORE": "0",
"Errata": "null",
"Offcore": "0"
},
...
]
All the PMU events supported by a CPU model/family must be grouped into
"topics" such as "Pipelining", "Floating-point", "Virtual-memory" etc.
All events belonging to a topic must be placed in a separate JSON file
(eg: "Pipelining.json") and all the topic JSON files for a CPU model must
be in a separate directory.
Eg: for the CPU model "Silvermont_core":
$ ls tools/perf/pmu-events/arch/x86/Silvermont_core
Floating-point.json
Memory.json
Other.json
Pipelining.json
Virtualmemory.json
Finally, to allow multiple CPU models to share a single set of JSON files,
architectures must provide a mapping between a model and its set of events:
$ grep Silvermont tools/perf/pmu-events/arch/x86/mapfile.csv
GenuineIntel-6-4D,V13,Silvermont_core,core
GenuineIntel-6-4C,V13,Silvermont_core,core
which maps each CPU, identified by [vendor, family, model, version, type]
to a directory of JSON files. Thus two (or more) CPU models support the
set of PMU events listed in the directory.
tools/perf/pmu-events/arch/x86/Silvermont_core/
Given this organization of files, the program, jevents:
- locates all JSON files for each CPU-model of the architecture,
- parses all JSON files for the CPU-model and generates a C-style
"PMU-events table" (pmu-events.c) for the model
- locates a mapfile for the architecture
- builds a global table, mapping each model of CPU to the corresponding
PMU-events table.
The 'pmu-events.c' is generated when building perf and added to libperf.a.
The global table pmu_events_map[] table in this pmu-events.c will be used
in perf in a follow-on patch.
If the architecture does not have any JSON files or there is an error in
processing them, an empty mapping file is created. This would allow the
build of perf to proceed even if we are not able to provide aliases for
events.
The parser for JSON files allows parsing Intel style JSON event files. This
allows to use an Intel event list directly with perf. The Intel event lists
can be quite large and are too big to store in unswappable kernel memory.
The conversion from JSON to C-style is straight forward. The parser knows
(very little) Intel specific information, and can be easily extended to
handle fields for other CPUs.
The parser code is partially shared with an independent parsing library,
which is 2-clause BSD licensed. To avoid any conflicts I marked those
files as BSD licensed too. As part of perf they become GPLv2.
Committer notes:
Fixes:
1) Limit maxfds to 512 to avoid nftd() segfaulting on alloca() with a
big rlim_max, as in docker containers - acme
2) Make jevents a hostprog, supporting cross compilation - jolsa
3) Use HOSTCC for jevents final step - acme
4) Define _GNU_SOURCE for asprintf, as we can't use CC's EXTRA_CFLAGS,
that has to have --sysroot on the Android NDK 24 - acme
5) Removed $(srctree)/tools/perf/pmu-events/pmu-events.c from the
'clean' target, it is generated on $(OUTPUT)pmu-events/pmu-events.c,
which is already taken care of in the original patch - acme
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Jiri Olsa <jolsa@redhat.com>
Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Acked-by: Ingo Molnar <mingo@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Cc: linuxppc-dev@lists.ozlabs.org
Link: http://lkml.kernel.org/r/1473978296-20712-3-git-send-email-sukadev@linux.vnet.ibm.com
Link: http://lkml.kernel.org/r/20160927141846.GA6589@krava
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-19 20:39:33 +00:00
|
|
|
|
|
|
|
if (!fn)
|
|
|
|
return -ENOENT;
|
|
|
|
|
|
|
|
tokens = parse_json(fn, &map, &size, &len);
|
|
|
|
if (!tokens)
|
|
|
|
return -EIO;
|
|
|
|
EXPECT(tokens->type == JSMN_ARRAY, tokens, "expected top level array");
|
|
|
|
tok = tokens + 1;
|
|
|
|
for (i = 0; i < tokens->size; i++) {
|
2020-09-07 06:41:30 +00:00
|
|
|
char *event = NULL;
|
2016-09-15 22:24:47 +00:00
|
|
|
char *extra_desc = NULL;
|
2017-01-28 02:03:37 +00:00
|
|
|
char *filter = NULL;
|
2020-09-07 06:41:30 +00:00
|
|
|
struct json_event je = {};
|
perf vendor events: Add support for arch standard events
For some architectures (like arm), there are architecture- defined
events. Sometimes these events may be "recommended" according to the
architecture standard, in that the implementer is free ignore the
"recommendation" and create its custom event.
This patch adds support for parsing standard events from arch-defined
JSONs, and fixing up vendor events when they have implemented these
events as standard.
Support is also ensured that the vendor may implement their own custom
events.
A new step is added to the pmu events parsing to fix up the vendor
events with the arch-standard events.
The arch-defined JSONs must be placed in the arch root folder for
preprocessing prior to tree JSON processing.
In the vendor JSON, to specify that the arch event is supported, the
keyword "ArchStdEvent" should be used, like this:
[
{
"ArchStdEvent": "L1D_CACHE_WR",
},
]
Matching is based on the "EventName" field in the architecture JSON.
No other JSON objects are strictly required. However, for other objects
added, these take precedence over architecture defined standard events,
thus supporting separate events which have the same event code.
Signed-off-by: John Garry <john.garry@huawei.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Ganapatrao Kulkarni <ganapatrao.kulkarni@cavium.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Shaokun Zhang <zhangshaokun@hisilicon.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: William Cohen <wcohen@redhat.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linuxarm@huawei.com
Link: http://lkml.kernel.org/r/1520506716-197429-8-git-send-email-john.garry@huawei.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2018-03-08 10:58:32 +00:00
|
|
|
char *arch_std = NULL;
|
2017-01-28 02:03:36 +00:00
|
|
|
unsigned long long eventcode = 0;
|
perf jevents: Program to convert JSON file
This is a modified version of an earlier patch by Andi Kleen.
We expect architectures to create JSON files describing the performance
monitoring (PMU) events that each CPU model/family of the architecture
supports.
Following is an example of the JSON file entry for an x86 event:
[
...
{
"EventCode": "0x00",
"UMask": "0x01",
"EventName": "INST_RETIRED.ANY",
"BriefDescription": "Instructions retired from execution.",
"PublicDescription": "Instructions retired from execution.",
"Counter": "Fixed counter 1",
"CounterHTOff": "Fixed counter 1",
"SampleAfterValue": "2000003",
"SampleAfterValue": "2000003",
"MSRIndex": "0",
"MSRValue": "0",
"TakenAlone": "0",
"CounterMask": "0",
"Invert": "0",
"AnyThread": "0",
"EdgeDetect": "0",
"PEBS": "0",
"PRECISE_STORE": "0",
"Errata": "null",
"Offcore": "0"
},
...
]
All the PMU events supported by a CPU model/family must be grouped into
"topics" such as "Pipelining", "Floating-point", "Virtual-memory" etc.
All events belonging to a topic must be placed in a separate JSON file
(eg: "Pipelining.json") and all the topic JSON files for a CPU model must
be in a separate directory.
Eg: for the CPU model "Silvermont_core":
$ ls tools/perf/pmu-events/arch/x86/Silvermont_core
Floating-point.json
Memory.json
Other.json
Pipelining.json
Virtualmemory.json
Finally, to allow multiple CPU models to share a single set of JSON files,
architectures must provide a mapping between a model and its set of events:
$ grep Silvermont tools/perf/pmu-events/arch/x86/mapfile.csv
GenuineIntel-6-4D,V13,Silvermont_core,core
GenuineIntel-6-4C,V13,Silvermont_core,core
which maps each CPU, identified by [vendor, family, model, version, type]
to a directory of JSON files. Thus two (or more) CPU models support the
set of PMU events listed in the directory.
tools/perf/pmu-events/arch/x86/Silvermont_core/
Given this organization of files, the program, jevents:
- locates all JSON files for each CPU-model of the architecture,
- parses all JSON files for the CPU-model and generates a C-style
"PMU-events table" (pmu-events.c) for the model
- locates a mapfile for the architecture
- builds a global table, mapping each model of CPU to the corresponding
PMU-events table.
The 'pmu-events.c' is generated when building perf and added to libperf.a.
The global table pmu_events_map[] table in this pmu-events.c will be used
in perf in a follow-on patch.
If the architecture does not have any JSON files or there is an error in
processing them, an empty mapping file is created. This would allow the
build of perf to proceed even if we are not able to provide aliases for
events.
The parser for JSON files allows parsing Intel style JSON event files. This
allows to use an Intel event list directly with perf. The Intel event lists
can be quite large and are too big to store in unswappable kernel memory.
The conversion from JSON to C-style is straight forward. The parser knows
(very little) Intel specific information, and can be easily extended to
handle fields for other CPUs.
The parser code is partially shared with an independent parsing library,
which is 2-clause BSD licensed. To avoid any conflicts I marked those
files as BSD licensed too. As part of perf they become GPLv2.
Committer notes:
Fixes:
1) Limit maxfds to 512 to avoid nftd() segfaulting on alloca() with a
big rlim_max, as in docker containers - acme
2) Make jevents a hostprog, supporting cross compilation - jolsa
3) Use HOSTCC for jevents final step - acme
4) Define _GNU_SOURCE for asprintf, as we can't use CC's EXTRA_CFLAGS,
that has to have --sysroot on the Android NDK 24 - acme
5) Removed $(srctree)/tools/perf/pmu-events/pmu-events.c from the
'clean' target, it is generated on $(OUTPUT)pmu-events/pmu-events.c,
which is already taken care of in the original patch - acme
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Jiri Olsa <jolsa@redhat.com>
Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Acked-by: Ingo Molnar <mingo@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Cc: linuxppc-dev@lists.ozlabs.org
Link: http://lkml.kernel.org/r/1473978296-20712-3-git-send-email-sukadev@linux.vnet.ibm.com
Link: http://lkml.kernel.org/r/20160927141846.GA6589@krava
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-19 20:39:33 +00:00
|
|
|
struct msrmap *msr = NULL;
|
|
|
|
jsmntok_t *msrval = NULL;
|
|
|
|
jsmntok_t *precise = NULL;
|
|
|
|
jsmntok_t *obj = tok++;
|
|
|
|
|
|
|
|
EXPECT(obj->type == JSMN_OBJECT, obj, "expected object");
|
|
|
|
for (j = 0; j < obj->size; j += 2) {
|
|
|
|
jsmntok_t *field, *val;
|
|
|
|
int nz;
|
2017-03-20 20:17:07 +00:00
|
|
|
char *s;
|
perf jevents: Program to convert JSON file
This is a modified version of an earlier patch by Andi Kleen.
We expect architectures to create JSON files describing the performance
monitoring (PMU) events that each CPU model/family of the architecture
supports.
Following is an example of the JSON file entry for an x86 event:
[
...
{
"EventCode": "0x00",
"UMask": "0x01",
"EventName": "INST_RETIRED.ANY",
"BriefDescription": "Instructions retired from execution.",
"PublicDescription": "Instructions retired from execution.",
"Counter": "Fixed counter 1",
"CounterHTOff": "Fixed counter 1",
"SampleAfterValue": "2000003",
"SampleAfterValue": "2000003",
"MSRIndex": "0",
"MSRValue": "0",
"TakenAlone": "0",
"CounterMask": "0",
"Invert": "0",
"AnyThread": "0",
"EdgeDetect": "0",
"PEBS": "0",
"PRECISE_STORE": "0",
"Errata": "null",
"Offcore": "0"
},
...
]
All the PMU events supported by a CPU model/family must be grouped into
"topics" such as "Pipelining", "Floating-point", "Virtual-memory" etc.
All events belonging to a topic must be placed in a separate JSON file
(eg: "Pipelining.json") and all the topic JSON files for a CPU model must
be in a separate directory.
Eg: for the CPU model "Silvermont_core":
$ ls tools/perf/pmu-events/arch/x86/Silvermont_core
Floating-point.json
Memory.json
Other.json
Pipelining.json
Virtualmemory.json
Finally, to allow multiple CPU models to share a single set of JSON files,
architectures must provide a mapping between a model and its set of events:
$ grep Silvermont tools/perf/pmu-events/arch/x86/mapfile.csv
GenuineIntel-6-4D,V13,Silvermont_core,core
GenuineIntel-6-4C,V13,Silvermont_core,core
which maps each CPU, identified by [vendor, family, model, version, type]
to a directory of JSON files. Thus two (or more) CPU models support the
set of PMU events listed in the directory.
tools/perf/pmu-events/arch/x86/Silvermont_core/
Given this organization of files, the program, jevents:
- locates all JSON files for each CPU-model of the architecture,
- parses all JSON files for the CPU-model and generates a C-style
"PMU-events table" (pmu-events.c) for the model
- locates a mapfile for the architecture
- builds a global table, mapping each model of CPU to the corresponding
PMU-events table.
The 'pmu-events.c' is generated when building perf and added to libperf.a.
The global table pmu_events_map[] table in this pmu-events.c will be used
in perf in a follow-on patch.
If the architecture does not have any JSON files or there is an error in
processing them, an empty mapping file is created. This would allow the
build of perf to proceed even if we are not able to provide aliases for
events.
The parser for JSON files allows parsing Intel style JSON event files. This
allows to use an Intel event list directly with perf. The Intel event lists
can be quite large and are too big to store in unswappable kernel memory.
The conversion from JSON to C-style is straight forward. The parser knows
(very little) Intel specific information, and can be easily extended to
handle fields for other CPUs.
The parser code is partially shared with an independent parsing library,
which is 2-clause BSD licensed. To avoid any conflicts I marked those
files as BSD licensed too. As part of perf they become GPLv2.
Committer notes:
Fixes:
1) Limit maxfds to 512 to avoid nftd() segfaulting on alloca() with a
big rlim_max, as in docker containers - acme
2) Make jevents a hostprog, supporting cross compilation - jolsa
3) Use HOSTCC for jevents final step - acme
4) Define _GNU_SOURCE for asprintf, as we can't use CC's EXTRA_CFLAGS,
that has to have --sysroot on the Android NDK 24 - acme
5) Removed $(srctree)/tools/perf/pmu-events/pmu-events.c from the
'clean' target, it is generated on $(OUTPUT)pmu-events/pmu-events.c,
which is already taken care of in the original patch - acme
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Jiri Olsa <jolsa@redhat.com>
Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Acked-by: Ingo Molnar <mingo@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Cc: linuxppc-dev@lists.ozlabs.org
Link: http://lkml.kernel.org/r/1473978296-20712-3-git-send-email-sukadev@linux.vnet.ibm.com
Link: http://lkml.kernel.org/r/20160927141846.GA6589@krava
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-19 20:39:33 +00:00
|
|
|
|
|
|
|
field = tok + j;
|
|
|
|
EXPECT(field->type == JSMN_STRING, tok + j,
|
|
|
|
"Expected field name");
|
|
|
|
val = tok + j + 1;
|
|
|
|
EXPECT(val->type == JSMN_STRING, tok + j + 1,
|
|
|
|
"Expected string value");
|
|
|
|
|
|
|
|
nz = !json_streq(map, val, "0");
|
|
|
|
if (match_field(map, field, nz, &event, val)) {
|
|
|
|
/* ok */
|
2017-01-28 02:03:36 +00:00
|
|
|
} else if (json_streq(map, field, "EventCode")) {
|
|
|
|
char *code = NULL;
|
|
|
|
addfield(map, &code, "", "", val);
|
|
|
|
eventcode |= strtoul(code, NULL, 0);
|
|
|
|
free(code);
|
2017-01-28 02:03:37 +00:00
|
|
|
} else if (json_streq(map, field, "ExtSel")) {
|
|
|
|
char *code = NULL;
|
|
|
|
addfield(map, &code, "", "", val);
|
|
|
|
eventcode |= strtoul(code, NULL, 0) << 21;
|
|
|
|
free(code);
|
perf jevents: Program to convert JSON file
This is a modified version of an earlier patch by Andi Kleen.
We expect architectures to create JSON files describing the performance
monitoring (PMU) events that each CPU model/family of the architecture
supports.
Following is an example of the JSON file entry for an x86 event:
[
...
{
"EventCode": "0x00",
"UMask": "0x01",
"EventName": "INST_RETIRED.ANY",
"BriefDescription": "Instructions retired from execution.",
"PublicDescription": "Instructions retired from execution.",
"Counter": "Fixed counter 1",
"CounterHTOff": "Fixed counter 1",
"SampleAfterValue": "2000003",
"SampleAfterValue": "2000003",
"MSRIndex": "0",
"MSRValue": "0",
"TakenAlone": "0",
"CounterMask": "0",
"Invert": "0",
"AnyThread": "0",
"EdgeDetect": "0",
"PEBS": "0",
"PRECISE_STORE": "0",
"Errata": "null",
"Offcore": "0"
},
...
]
All the PMU events supported by a CPU model/family must be grouped into
"topics" such as "Pipelining", "Floating-point", "Virtual-memory" etc.
All events belonging to a topic must be placed in a separate JSON file
(eg: "Pipelining.json") and all the topic JSON files for a CPU model must
be in a separate directory.
Eg: for the CPU model "Silvermont_core":
$ ls tools/perf/pmu-events/arch/x86/Silvermont_core
Floating-point.json
Memory.json
Other.json
Pipelining.json
Virtualmemory.json
Finally, to allow multiple CPU models to share a single set of JSON files,
architectures must provide a mapping between a model and its set of events:
$ grep Silvermont tools/perf/pmu-events/arch/x86/mapfile.csv
GenuineIntel-6-4D,V13,Silvermont_core,core
GenuineIntel-6-4C,V13,Silvermont_core,core
which maps each CPU, identified by [vendor, family, model, version, type]
to a directory of JSON files. Thus two (or more) CPU models support the
set of PMU events listed in the directory.
tools/perf/pmu-events/arch/x86/Silvermont_core/
Given this organization of files, the program, jevents:
- locates all JSON files for each CPU-model of the architecture,
- parses all JSON files for the CPU-model and generates a C-style
"PMU-events table" (pmu-events.c) for the model
- locates a mapfile for the architecture
- builds a global table, mapping each model of CPU to the corresponding
PMU-events table.
The 'pmu-events.c' is generated when building perf and added to libperf.a.
The global table pmu_events_map[] table in this pmu-events.c will be used
in perf in a follow-on patch.
If the architecture does not have any JSON files or there is an error in
processing them, an empty mapping file is created. This would allow the
build of perf to proceed even if we are not able to provide aliases for
events.
The parser for JSON files allows parsing Intel style JSON event files. This
allows to use an Intel event list directly with perf. The Intel event lists
can be quite large and are too big to store in unswappable kernel memory.
The conversion from JSON to C-style is straight forward. The parser knows
(very little) Intel specific information, and can be easily extended to
handle fields for other CPUs.
The parser code is partially shared with an independent parsing library,
which is 2-clause BSD licensed. To avoid any conflicts I marked those
files as BSD licensed too. As part of perf they become GPLv2.
Committer notes:
Fixes:
1) Limit maxfds to 512 to avoid nftd() segfaulting on alloca() with a
big rlim_max, as in docker containers - acme
2) Make jevents a hostprog, supporting cross compilation - jolsa
3) Use HOSTCC for jevents final step - acme
4) Define _GNU_SOURCE for asprintf, as we can't use CC's EXTRA_CFLAGS,
that has to have --sysroot on the Android NDK 24 - acme
5) Removed $(srctree)/tools/perf/pmu-events/pmu-events.c from the
'clean' target, it is generated on $(OUTPUT)pmu-events/pmu-events.c,
which is already taken care of in the original patch - acme
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Jiri Olsa <jolsa@redhat.com>
Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Acked-by: Ingo Molnar <mingo@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Cc: linuxppc-dev@lists.ozlabs.org
Link: http://lkml.kernel.org/r/1473978296-20712-3-git-send-email-sukadev@linux.vnet.ibm.com
Link: http://lkml.kernel.org/r/20160927141846.GA6589@krava
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-19 20:39:33 +00:00
|
|
|
} else if (json_streq(map, field, "EventName")) {
|
2020-09-07 06:41:30 +00:00
|
|
|
addfield(map, &je.name, "", "", val);
|
perf jevents: Add support for system events tables
Process the JSONs to find support for "system" events, which are not
tied to a specific CPUID.
A "COMPAT" property is now used to match against the namespace ID from
the kernel PMU driver.
The generated pmu-events.c will now have 2 tables:
a. CPU events, as before.
b. New pmu_sys_event_tables[] table, which will have events matched to
specific SoCs.
It will look like this:
struct pmu_event pme_hisilicon_hip09_sys[] = {
{
.name = "cycles",
.compat = "0x00030736",
.event = "event=0",
.desc = "Clock cycles",
.topic = "smmu v3 pmcg",
.long_desc = "Clock cycles",
},
{
.name = "smmuv3_pmcg.l1_tlb",
.compat = "0x00030736",
.event = "event=0x8a",
.desc = "SMMUv3 PMCG l1_tlb. Unit: smmuv3_pmcg ",
.topic = "smmu v3 pmcg",
.long_desc = "SMMUv3 PMCG l1_tlb",
.pmu = "smmuv3_pmcg",
},
...
};
struct pmu_event pme_arm_cortex_a53[] = {
{
.name = "ext_mem_req",
.event = "event=0xc0",
.desc = "External memory request",
.topic = "memory",
},
{
.name = "ext_mem_req_nc",
.event = "event=0xc1",
.desc = "Non-cacheable external memory request",
.topic = "memory",
},
...
};
struct pmu_event pme_hisilicon_hip09_cpu[] = {
{
.name = "l2d_cache_refill_wr",
.event = "event=0x53",
.desc = "L2D cache refill, write",
.topic = "core imp def",
.long_desc = "Attributable Level 2 data cache refill, write",
},
...
};
struct pmu_events_map pmu_events_map[] = {
{
.cpuid = "0x00000000410fd030",
.version = "v1",
.type = "core",
.table = pme_arm_cortex_a53
},
{
.cpuid = "0x00000000480fd010",
.version = "v1",
.type = "core",
.table = pme_hisilicon_hip09_cpu
},
{
.table = 0
},
};
struct pmu_event pme_hisilicon_hip09_cpu[] = {
{
.name = "uncore_hisi_l3c.rd_cpipe",
.event = "event=0",
.desc = "Total read accesses. Unit: hisi_sccl,l3c ",
.topic = "uncore l3c",
.long_desc = "Total read accesses",
.pmu = "hisi_sccl,l3c",
},
{
.name = "uncore_hisi_l3c.wr_cpipe",
.event = "event=0x1",
.desc = "Total write accesses. Unit: hisi_sccl,l3c ",
.topic = "uncore l3c",
.long_desc = "Total write accesses",
.pmu = "hisi_sccl,l3c",
},
...
};
struct pmu_sys_events pmu_sys_event_tables[] = {
{
.table = pme_hisilicon_hip09_sys,
},
...
};
Committer notes:
Added the fix for architectures without PMU events, provided by John
after I reported the build failing in such systems.
Link: https://lore.kernel.org/lkml/650baaf2-36b6-a9e2-ff49-963ef864c1f3@huawei.com/
Signed-off-by: John Garry <john.garry@huawei.com>
Acked-by: Kajol Jain <kjain@linux.ibm.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Ian Rogers <irogers@google.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Joakim Zhang <qiangqing.zhang@nxp.com>
Cc: Kan Liang <kan.liang@linux.intel.com>
Cc: Kim Phillips <kim.phillips@amd.com>
Cc: Leo Yan <leo.yan@linaro.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Shaokun Zhang <zhangshaokun@hisilicon.com>
Cc: Will Deacon <will@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linuxarm@huawei.com
Link: http://lore.kernel.org/lkml/1607080216-36968-3-git-send-email-john.garry@huawei.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2020-12-04 11:10:08 +00:00
|
|
|
} else if (json_streq(map, field, "Compat")) {
|
|
|
|
addfield(map, &je.compat, "", "", val);
|
perf jevents: Program to convert JSON file
This is a modified version of an earlier patch by Andi Kleen.
We expect architectures to create JSON files describing the performance
monitoring (PMU) events that each CPU model/family of the architecture
supports.
Following is an example of the JSON file entry for an x86 event:
[
...
{
"EventCode": "0x00",
"UMask": "0x01",
"EventName": "INST_RETIRED.ANY",
"BriefDescription": "Instructions retired from execution.",
"PublicDescription": "Instructions retired from execution.",
"Counter": "Fixed counter 1",
"CounterHTOff": "Fixed counter 1",
"SampleAfterValue": "2000003",
"SampleAfterValue": "2000003",
"MSRIndex": "0",
"MSRValue": "0",
"TakenAlone": "0",
"CounterMask": "0",
"Invert": "0",
"AnyThread": "0",
"EdgeDetect": "0",
"PEBS": "0",
"PRECISE_STORE": "0",
"Errata": "null",
"Offcore": "0"
},
...
]
All the PMU events supported by a CPU model/family must be grouped into
"topics" such as "Pipelining", "Floating-point", "Virtual-memory" etc.
All events belonging to a topic must be placed in a separate JSON file
(eg: "Pipelining.json") and all the topic JSON files for a CPU model must
be in a separate directory.
Eg: for the CPU model "Silvermont_core":
$ ls tools/perf/pmu-events/arch/x86/Silvermont_core
Floating-point.json
Memory.json
Other.json
Pipelining.json
Virtualmemory.json
Finally, to allow multiple CPU models to share a single set of JSON files,
architectures must provide a mapping between a model and its set of events:
$ grep Silvermont tools/perf/pmu-events/arch/x86/mapfile.csv
GenuineIntel-6-4D,V13,Silvermont_core,core
GenuineIntel-6-4C,V13,Silvermont_core,core
which maps each CPU, identified by [vendor, family, model, version, type]
to a directory of JSON files. Thus two (or more) CPU models support the
set of PMU events listed in the directory.
tools/perf/pmu-events/arch/x86/Silvermont_core/
Given this organization of files, the program, jevents:
- locates all JSON files for each CPU-model of the architecture,
- parses all JSON files for the CPU-model and generates a C-style
"PMU-events table" (pmu-events.c) for the model
- locates a mapfile for the architecture
- builds a global table, mapping each model of CPU to the corresponding
PMU-events table.
The 'pmu-events.c' is generated when building perf and added to libperf.a.
The global table pmu_events_map[] table in this pmu-events.c will be used
in perf in a follow-on patch.
If the architecture does not have any JSON files or there is an error in
processing them, an empty mapping file is created. This would allow the
build of perf to proceed even if we are not able to provide aliases for
events.
The parser for JSON files allows parsing Intel style JSON event files. This
allows to use an Intel event list directly with perf. The Intel event lists
can be quite large and are too big to store in unswappable kernel memory.
The conversion from JSON to C-style is straight forward. The parser knows
(very little) Intel specific information, and can be easily extended to
handle fields for other CPUs.
The parser code is partially shared with an independent parsing library,
which is 2-clause BSD licensed. To avoid any conflicts I marked those
files as BSD licensed too. As part of perf they become GPLv2.
Committer notes:
Fixes:
1) Limit maxfds to 512 to avoid nftd() segfaulting on alloca() with a
big rlim_max, as in docker containers - acme
2) Make jevents a hostprog, supporting cross compilation - jolsa
3) Use HOSTCC for jevents final step - acme
4) Define _GNU_SOURCE for asprintf, as we can't use CC's EXTRA_CFLAGS,
that has to have --sysroot on the Android NDK 24 - acme
5) Removed $(srctree)/tools/perf/pmu-events/pmu-events.c from the
'clean' target, it is generated on $(OUTPUT)pmu-events/pmu-events.c,
which is already taken care of in the original patch - acme
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Jiri Olsa <jolsa@redhat.com>
Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Acked-by: Ingo Molnar <mingo@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Cc: linuxppc-dev@lists.ozlabs.org
Link: http://lkml.kernel.org/r/1473978296-20712-3-git-send-email-sukadev@linux.vnet.ibm.com
Link: http://lkml.kernel.org/r/20160927141846.GA6589@krava
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-19 20:39:33 +00:00
|
|
|
} else if (json_streq(map, field, "BriefDescription")) {
|
2020-09-07 06:41:30 +00:00
|
|
|
addfield(map, &je.desc, "", "", val);
|
|
|
|
fixdesc(je.desc);
|
2016-09-15 22:24:47 +00:00
|
|
|
} else if (json_streq(map, field,
|
|
|
|
"PublicDescription")) {
|
2020-09-07 06:41:30 +00:00
|
|
|
addfield(map, &je.long_desc, "", "", val);
|
|
|
|
fixdesc(je.long_desc);
|
perf jevents: Program to convert JSON file
This is a modified version of an earlier patch by Andi Kleen.
We expect architectures to create JSON files describing the performance
monitoring (PMU) events that each CPU model/family of the architecture
supports.
Following is an example of the JSON file entry for an x86 event:
[
...
{
"EventCode": "0x00",
"UMask": "0x01",
"EventName": "INST_RETIRED.ANY",
"BriefDescription": "Instructions retired from execution.",
"PublicDescription": "Instructions retired from execution.",
"Counter": "Fixed counter 1",
"CounterHTOff": "Fixed counter 1",
"SampleAfterValue": "2000003",
"SampleAfterValue": "2000003",
"MSRIndex": "0",
"MSRValue": "0",
"TakenAlone": "0",
"CounterMask": "0",
"Invert": "0",
"AnyThread": "0",
"EdgeDetect": "0",
"PEBS": "0",
"PRECISE_STORE": "0",
"Errata": "null",
"Offcore": "0"
},
...
]
All the PMU events supported by a CPU model/family must be grouped into
"topics" such as "Pipelining", "Floating-point", "Virtual-memory" etc.
All events belonging to a topic must be placed in a separate JSON file
(eg: "Pipelining.json") and all the topic JSON files for a CPU model must
be in a separate directory.
Eg: for the CPU model "Silvermont_core":
$ ls tools/perf/pmu-events/arch/x86/Silvermont_core
Floating-point.json
Memory.json
Other.json
Pipelining.json
Virtualmemory.json
Finally, to allow multiple CPU models to share a single set of JSON files,
architectures must provide a mapping between a model and its set of events:
$ grep Silvermont tools/perf/pmu-events/arch/x86/mapfile.csv
GenuineIntel-6-4D,V13,Silvermont_core,core
GenuineIntel-6-4C,V13,Silvermont_core,core
which maps each CPU, identified by [vendor, family, model, version, type]
to a directory of JSON files. Thus two (or more) CPU models support the
set of PMU events listed in the directory.
tools/perf/pmu-events/arch/x86/Silvermont_core/
Given this organization of files, the program, jevents:
- locates all JSON files for each CPU-model of the architecture,
- parses all JSON files for the CPU-model and generates a C-style
"PMU-events table" (pmu-events.c) for the model
- locates a mapfile for the architecture
- builds a global table, mapping each model of CPU to the corresponding
PMU-events table.
The 'pmu-events.c' is generated when building perf and added to libperf.a.
The global table pmu_events_map[] table in this pmu-events.c will be used
in perf in a follow-on patch.
If the architecture does not have any JSON files or there is an error in
processing them, an empty mapping file is created. This would allow the
build of perf to proceed even if we are not able to provide aliases for
events.
The parser for JSON files allows parsing Intel style JSON event files. This
allows to use an Intel event list directly with perf. The Intel event lists
can be quite large and are too big to store in unswappable kernel memory.
The conversion from JSON to C-style is straight forward. The parser knows
(very little) Intel specific information, and can be easily extended to
handle fields for other CPUs.
The parser code is partially shared with an independent parsing library,
which is 2-clause BSD licensed. To avoid any conflicts I marked those
files as BSD licensed too. As part of perf they become GPLv2.
Committer notes:
Fixes:
1) Limit maxfds to 512 to avoid nftd() segfaulting on alloca() with a
big rlim_max, as in docker containers - acme
2) Make jevents a hostprog, supporting cross compilation - jolsa
3) Use HOSTCC for jevents final step - acme
4) Define _GNU_SOURCE for asprintf, as we can't use CC's EXTRA_CFLAGS,
that has to have --sysroot on the Android NDK 24 - acme
5) Removed $(srctree)/tools/perf/pmu-events/pmu-events.c from the
'clean' target, it is generated on $(OUTPUT)pmu-events/pmu-events.c,
which is already taken care of in the original patch - acme
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Jiri Olsa <jolsa@redhat.com>
Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Acked-by: Ingo Molnar <mingo@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Cc: linuxppc-dev@lists.ozlabs.org
Link: http://lkml.kernel.org/r/1473978296-20712-3-git-send-email-sukadev@linux.vnet.ibm.com
Link: http://lkml.kernel.org/r/20160927141846.GA6589@krava
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-19 20:39:33 +00:00
|
|
|
} else if (json_streq(map, field, "PEBS") && nz) {
|
|
|
|
precise = val;
|
|
|
|
} else if (json_streq(map, field, "MSRIndex") && nz) {
|
|
|
|
msr = lookup_msr(map, val);
|
|
|
|
} else if (json_streq(map, field, "MSRValue")) {
|
|
|
|
msrval = val;
|
|
|
|
} else if (json_streq(map, field, "Errata") &&
|
|
|
|
!json_streq(map, val, "null")) {
|
2016-09-15 22:24:47 +00:00
|
|
|
addfield(map, &extra_desc, ". ",
|
perf jevents: Program to convert JSON file
This is a modified version of an earlier patch by Andi Kleen.
We expect architectures to create JSON files describing the performance
monitoring (PMU) events that each CPU model/family of the architecture
supports.
Following is an example of the JSON file entry for an x86 event:
[
...
{
"EventCode": "0x00",
"UMask": "0x01",
"EventName": "INST_RETIRED.ANY",
"BriefDescription": "Instructions retired from execution.",
"PublicDescription": "Instructions retired from execution.",
"Counter": "Fixed counter 1",
"CounterHTOff": "Fixed counter 1",
"SampleAfterValue": "2000003",
"SampleAfterValue": "2000003",
"MSRIndex": "0",
"MSRValue": "0",
"TakenAlone": "0",
"CounterMask": "0",
"Invert": "0",
"AnyThread": "0",
"EdgeDetect": "0",
"PEBS": "0",
"PRECISE_STORE": "0",
"Errata": "null",
"Offcore": "0"
},
...
]
All the PMU events supported by a CPU model/family must be grouped into
"topics" such as "Pipelining", "Floating-point", "Virtual-memory" etc.
All events belonging to a topic must be placed in a separate JSON file
(eg: "Pipelining.json") and all the topic JSON files for a CPU model must
be in a separate directory.
Eg: for the CPU model "Silvermont_core":
$ ls tools/perf/pmu-events/arch/x86/Silvermont_core
Floating-point.json
Memory.json
Other.json
Pipelining.json
Virtualmemory.json
Finally, to allow multiple CPU models to share a single set of JSON files,
architectures must provide a mapping between a model and its set of events:
$ grep Silvermont tools/perf/pmu-events/arch/x86/mapfile.csv
GenuineIntel-6-4D,V13,Silvermont_core,core
GenuineIntel-6-4C,V13,Silvermont_core,core
which maps each CPU, identified by [vendor, family, model, version, type]
to a directory of JSON files. Thus two (or more) CPU models support the
set of PMU events listed in the directory.
tools/perf/pmu-events/arch/x86/Silvermont_core/
Given this organization of files, the program, jevents:
- locates all JSON files for each CPU-model of the architecture,
- parses all JSON files for the CPU-model and generates a C-style
"PMU-events table" (pmu-events.c) for the model
- locates a mapfile for the architecture
- builds a global table, mapping each model of CPU to the corresponding
PMU-events table.
The 'pmu-events.c' is generated when building perf and added to libperf.a.
The global table pmu_events_map[] table in this pmu-events.c will be used
in perf in a follow-on patch.
If the architecture does not have any JSON files or there is an error in
processing them, an empty mapping file is created. This would allow the
build of perf to proceed even if we are not able to provide aliases for
events.
The parser for JSON files allows parsing Intel style JSON event files. This
allows to use an Intel event list directly with perf. The Intel event lists
can be quite large and are too big to store in unswappable kernel memory.
The conversion from JSON to C-style is straight forward. The parser knows
(very little) Intel specific information, and can be easily extended to
handle fields for other CPUs.
The parser code is partially shared with an independent parsing library,
which is 2-clause BSD licensed. To avoid any conflicts I marked those
files as BSD licensed too. As part of perf they become GPLv2.
Committer notes:
Fixes:
1) Limit maxfds to 512 to avoid nftd() segfaulting on alloca() with a
big rlim_max, as in docker containers - acme
2) Make jevents a hostprog, supporting cross compilation - jolsa
3) Use HOSTCC for jevents final step - acme
4) Define _GNU_SOURCE for asprintf, as we can't use CC's EXTRA_CFLAGS,
that has to have --sysroot on the Android NDK 24 - acme
5) Removed $(srctree)/tools/perf/pmu-events/pmu-events.c from the
'clean' target, it is generated on $(OUTPUT)pmu-events/pmu-events.c,
which is already taken care of in the original patch - acme
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Jiri Olsa <jolsa@redhat.com>
Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Acked-by: Ingo Molnar <mingo@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Cc: linuxppc-dev@lists.ozlabs.org
Link: http://lkml.kernel.org/r/1473978296-20712-3-git-send-email-sukadev@linux.vnet.ibm.com
Link: http://lkml.kernel.org/r/20160927141846.GA6589@krava
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-19 20:39:33 +00:00
|
|
|
" Spec update: ", val);
|
|
|
|
} else if (json_streq(map, field, "Data_LA") && nz) {
|
2016-09-15 22:24:47 +00:00
|
|
|
addfield(map, &extra_desc, ". ",
|
perf jevents: Program to convert JSON file
This is a modified version of an earlier patch by Andi Kleen.
We expect architectures to create JSON files describing the performance
monitoring (PMU) events that each CPU model/family of the architecture
supports.
Following is an example of the JSON file entry for an x86 event:
[
...
{
"EventCode": "0x00",
"UMask": "0x01",
"EventName": "INST_RETIRED.ANY",
"BriefDescription": "Instructions retired from execution.",
"PublicDescription": "Instructions retired from execution.",
"Counter": "Fixed counter 1",
"CounterHTOff": "Fixed counter 1",
"SampleAfterValue": "2000003",
"SampleAfterValue": "2000003",
"MSRIndex": "0",
"MSRValue": "0",
"TakenAlone": "0",
"CounterMask": "0",
"Invert": "0",
"AnyThread": "0",
"EdgeDetect": "0",
"PEBS": "0",
"PRECISE_STORE": "0",
"Errata": "null",
"Offcore": "0"
},
...
]
All the PMU events supported by a CPU model/family must be grouped into
"topics" such as "Pipelining", "Floating-point", "Virtual-memory" etc.
All events belonging to a topic must be placed in a separate JSON file
(eg: "Pipelining.json") and all the topic JSON files for a CPU model must
be in a separate directory.
Eg: for the CPU model "Silvermont_core":
$ ls tools/perf/pmu-events/arch/x86/Silvermont_core
Floating-point.json
Memory.json
Other.json
Pipelining.json
Virtualmemory.json
Finally, to allow multiple CPU models to share a single set of JSON files,
architectures must provide a mapping between a model and its set of events:
$ grep Silvermont tools/perf/pmu-events/arch/x86/mapfile.csv
GenuineIntel-6-4D,V13,Silvermont_core,core
GenuineIntel-6-4C,V13,Silvermont_core,core
which maps each CPU, identified by [vendor, family, model, version, type]
to a directory of JSON files. Thus two (or more) CPU models support the
set of PMU events listed in the directory.
tools/perf/pmu-events/arch/x86/Silvermont_core/
Given this organization of files, the program, jevents:
- locates all JSON files for each CPU-model of the architecture,
- parses all JSON files for the CPU-model and generates a C-style
"PMU-events table" (pmu-events.c) for the model
- locates a mapfile for the architecture
- builds a global table, mapping each model of CPU to the corresponding
PMU-events table.
The 'pmu-events.c' is generated when building perf and added to libperf.a.
The global table pmu_events_map[] table in this pmu-events.c will be used
in perf in a follow-on patch.
If the architecture does not have any JSON files or there is an error in
processing them, an empty mapping file is created. This would allow the
build of perf to proceed even if we are not able to provide aliases for
events.
The parser for JSON files allows parsing Intel style JSON event files. This
allows to use an Intel event list directly with perf. The Intel event lists
can be quite large and are too big to store in unswappable kernel memory.
The conversion from JSON to C-style is straight forward. The parser knows
(very little) Intel specific information, and can be easily extended to
handle fields for other CPUs.
The parser code is partially shared with an independent parsing library,
which is 2-clause BSD licensed. To avoid any conflicts I marked those
files as BSD licensed too. As part of perf they become GPLv2.
Committer notes:
Fixes:
1) Limit maxfds to 512 to avoid nftd() segfaulting on alloca() with a
big rlim_max, as in docker containers - acme
2) Make jevents a hostprog, supporting cross compilation - jolsa
3) Use HOSTCC for jevents final step - acme
4) Define _GNU_SOURCE for asprintf, as we can't use CC's EXTRA_CFLAGS,
that has to have --sysroot on the Android NDK 24 - acme
5) Removed $(srctree)/tools/perf/pmu-events/pmu-events.c from the
'clean' target, it is generated on $(OUTPUT)pmu-events/pmu-events.c,
which is already taken care of in the original patch - acme
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Jiri Olsa <jolsa@redhat.com>
Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Acked-by: Ingo Molnar <mingo@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Cc: linuxppc-dev@lists.ozlabs.org
Link: http://lkml.kernel.org/r/1473978296-20712-3-git-send-email-sukadev@linux.vnet.ibm.com
Link: http://lkml.kernel.org/r/20160927141846.GA6589@krava
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-19 20:39:33 +00:00
|
|
|
" Supports address when precise",
|
|
|
|
NULL);
|
2017-01-28 02:03:37 +00:00
|
|
|
} else if (json_streq(map, field, "Unit")) {
|
|
|
|
const char *ppmu;
|
|
|
|
|
|
|
|
ppmu = field_to_perf(unit_to_pmu, map, val);
|
|
|
|
if (ppmu) {
|
2020-09-07 06:41:30 +00:00
|
|
|
je.pmu = strdup(ppmu);
|
2017-01-28 02:03:37 +00:00
|
|
|
} else {
|
2020-09-07 06:41:30 +00:00
|
|
|
if (!je.pmu)
|
|
|
|
je.pmu = strdup("uncore_");
|
|
|
|
addfield(map, &je.pmu, "", "", val);
|
|
|
|
for (s = je.pmu; *s; s++)
|
2017-01-28 02:03:37 +00:00
|
|
|
*s = tolower(*s);
|
|
|
|
}
|
2020-09-07 06:41:30 +00:00
|
|
|
addfield(map, &je.desc, ". ", "Unit: ", NULL);
|
|
|
|
addfield(map, &je.desc, "", je.pmu, NULL);
|
|
|
|
addfield(map, &je.desc, "", " ", NULL);
|
2017-01-28 02:03:37 +00:00
|
|
|
} else if (json_streq(map, field, "Filter")) {
|
|
|
|
addfield(map, &filter, "", "", val);
|
|
|
|
} else if (json_streq(map, field, "ScaleUnit")) {
|
2020-09-07 06:41:30 +00:00
|
|
|
addfield(map, &je.unit, "", "", val);
|
2017-01-28 02:03:37 +00:00
|
|
|
} else if (json_streq(map, field, "PerPkg")) {
|
2020-09-07 06:41:30 +00:00
|
|
|
addfield(map, &je.perpkg, "", "", val);
|
2020-09-07 06:41:31 +00:00
|
|
|
} else if (json_streq(map, field, "AggregationMode")) {
|
|
|
|
addfield(map, &je.aggr_mode, "", "", val);
|
2019-10-15 02:53:57 +00:00
|
|
|
} else if (json_streq(map, field, "Deprecated")) {
|
2020-09-07 06:41:30 +00:00
|
|
|
addfield(map, &je.deprecated, "", "", val);
|
2017-03-20 20:17:10 +00:00
|
|
|
} else if (json_streq(map, field, "MetricName")) {
|
2020-09-07 06:41:30 +00:00
|
|
|
addfield(map, &je.metric_name, "", "", val);
|
2017-08-31 19:40:27 +00:00
|
|
|
} else if (json_streq(map, field, "MetricGroup")) {
|
2020-09-07 06:41:30 +00:00
|
|
|
addfield(map, &je.metric_group, "", "", val);
|
2020-02-24 21:59:20 +00:00
|
|
|
} else if (json_streq(map, field, "MetricConstraint")) {
|
2020-09-07 06:41:30 +00:00
|
|
|
addfield(map, &je.metric_constraint, "", "", val);
|
2017-03-20 20:17:07 +00:00
|
|
|
} else if (json_streq(map, field, "MetricExpr")) {
|
2020-09-07 06:41:30 +00:00
|
|
|
addfield(map, &je.metric_expr, "", "", val);
|
|
|
|
for (s = je.metric_expr; *s; s++)
|
2017-03-20 20:17:07 +00:00
|
|
|
*s = tolower(*s);
|
perf vendor events: Add support for arch standard events
For some architectures (like arm), there are architecture- defined
events. Sometimes these events may be "recommended" according to the
architecture standard, in that the implementer is free ignore the
"recommendation" and create its custom event.
This patch adds support for parsing standard events from arch-defined
JSONs, and fixing up vendor events when they have implemented these
events as standard.
Support is also ensured that the vendor may implement their own custom
events.
A new step is added to the pmu events parsing to fix up the vendor
events with the arch-standard events.
The arch-defined JSONs must be placed in the arch root folder for
preprocessing prior to tree JSON processing.
In the vendor JSON, to specify that the arch event is supported, the
keyword "ArchStdEvent" should be used, like this:
[
{
"ArchStdEvent": "L1D_CACHE_WR",
},
]
Matching is based on the "EventName" field in the architecture JSON.
No other JSON objects are strictly required. However, for other objects
added, these take precedence over architecture defined standard events,
thus supporting separate events which have the same event code.
Signed-off-by: John Garry <john.garry@huawei.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Ganapatrao Kulkarni <ganapatrao.kulkarni@cavium.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Shaokun Zhang <zhangshaokun@hisilicon.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: William Cohen <wcohen@redhat.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linuxarm@huawei.com
Link: http://lkml.kernel.org/r/1520506716-197429-8-git-send-email-john.garry@huawei.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2018-03-08 10:58:32 +00:00
|
|
|
} else if (json_streq(map, field, "ArchStdEvent")) {
|
|
|
|
addfield(map, &arch_std, "", "", val);
|
|
|
|
for (s = arch_std; *s; s++)
|
|
|
|
*s = tolower(*s);
|
perf jevents: Program to convert JSON file
This is a modified version of an earlier patch by Andi Kleen.
We expect architectures to create JSON files describing the performance
monitoring (PMU) events that each CPU model/family of the architecture
supports.
Following is an example of the JSON file entry for an x86 event:
[
...
{
"EventCode": "0x00",
"UMask": "0x01",
"EventName": "INST_RETIRED.ANY",
"BriefDescription": "Instructions retired from execution.",
"PublicDescription": "Instructions retired from execution.",
"Counter": "Fixed counter 1",
"CounterHTOff": "Fixed counter 1",
"SampleAfterValue": "2000003",
"SampleAfterValue": "2000003",
"MSRIndex": "0",
"MSRValue": "0",
"TakenAlone": "0",
"CounterMask": "0",
"Invert": "0",
"AnyThread": "0",
"EdgeDetect": "0",
"PEBS": "0",
"PRECISE_STORE": "0",
"Errata": "null",
"Offcore": "0"
},
...
]
All the PMU events supported by a CPU model/family must be grouped into
"topics" such as "Pipelining", "Floating-point", "Virtual-memory" etc.
All events belonging to a topic must be placed in a separate JSON file
(eg: "Pipelining.json") and all the topic JSON files for a CPU model must
be in a separate directory.
Eg: for the CPU model "Silvermont_core":
$ ls tools/perf/pmu-events/arch/x86/Silvermont_core
Floating-point.json
Memory.json
Other.json
Pipelining.json
Virtualmemory.json
Finally, to allow multiple CPU models to share a single set of JSON files,
architectures must provide a mapping between a model and its set of events:
$ grep Silvermont tools/perf/pmu-events/arch/x86/mapfile.csv
GenuineIntel-6-4D,V13,Silvermont_core,core
GenuineIntel-6-4C,V13,Silvermont_core,core
which maps each CPU, identified by [vendor, family, model, version, type]
to a directory of JSON files. Thus two (or more) CPU models support the
set of PMU events listed in the directory.
tools/perf/pmu-events/arch/x86/Silvermont_core/
Given this organization of files, the program, jevents:
- locates all JSON files for each CPU-model of the architecture,
- parses all JSON files for the CPU-model and generates a C-style
"PMU-events table" (pmu-events.c) for the model
- locates a mapfile for the architecture
- builds a global table, mapping each model of CPU to the corresponding
PMU-events table.
The 'pmu-events.c' is generated when building perf and added to libperf.a.
The global table pmu_events_map[] table in this pmu-events.c will be used
in perf in a follow-on patch.
If the architecture does not have any JSON files or there is an error in
processing them, an empty mapping file is created. This would allow the
build of perf to proceed even if we are not able to provide aliases for
events.
The parser for JSON files allows parsing Intel style JSON event files. This
allows to use an Intel event list directly with perf. The Intel event lists
can be quite large and are too big to store in unswappable kernel memory.
The conversion from JSON to C-style is straight forward. The parser knows
(very little) Intel specific information, and can be easily extended to
handle fields for other CPUs.
The parser code is partially shared with an independent parsing library,
which is 2-clause BSD licensed. To avoid any conflicts I marked those
files as BSD licensed too. As part of perf they become GPLv2.
Committer notes:
Fixes:
1) Limit maxfds to 512 to avoid nftd() segfaulting on alloca() with a
big rlim_max, as in docker containers - acme
2) Make jevents a hostprog, supporting cross compilation - jolsa
3) Use HOSTCC for jevents final step - acme
4) Define _GNU_SOURCE for asprintf, as we can't use CC's EXTRA_CFLAGS,
that has to have --sysroot on the Android NDK 24 - acme
5) Removed $(srctree)/tools/perf/pmu-events/pmu-events.c from the
'clean' target, it is generated on $(OUTPUT)pmu-events/pmu-events.c,
which is already taken care of in the original patch - acme
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Jiri Olsa <jolsa@redhat.com>
Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Acked-by: Ingo Molnar <mingo@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Cc: linuxppc-dev@lists.ozlabs.org
Link: http://lkml.kernel.org/r/1473978296-20712-3-git-send-email-sukadev@linux.vnet.ibm.com
Link: http://lkml.kernel.org/r/20160927141846.GA6589@krava
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-19 20:39:33 +00:00
|
|
|
}
|
|
|
|
/* ignore unknown fields */
|
|
|
|
}
|
2020-09-07 06:41:30 +00:00
|
|
|
if (precise && je.desc && !strstr(je.desc, "(Precise Event)")) {
|
perf jevents: Program to convert JSON file
This is a modified version of an earlier patch by Andi Kleen.
We expect architectures to create JSON files describing the performance
monitoring (PMU) events that each CPU model/family of the architecture
supports.
Following is an example of the JSON file entry for an x86 event:
[
...
{
"EventCode": "0x00",
"UMask": "0x01",
"EventName": "INST_RETIRED.ANY",
"BriefDescription": "Instructions retired from execution.",
"PublicDescription": "Instructions retired from execution.",
"Counter": "Fixed counter 1",
"CounterHTOff": "Fixed counter 1",
"SampleAfterValue": "2000003",
"SampleAfterValue": "2000003",
"MSRIndex": "0",
"MSRValue": "0",
"TakenAlone": "0",
"CounterMask": "0",
"Invert": "0",
"AnyThread": "0",
"EdgeDetect": "0",
"PEBS": "0",
"PRECISE_STORE": "0",
"Errata": "null",
"Offcore": "0"
},
...
]
All the PMU events supported by a CPU model/family must be grouped into
"topics" such as "Pipelining", "Floating-point", "Virtual-memory" etc.
All events belonging to a topic must be placed in a separate JSON file
(eg: "Pipelining.json") and all the topic JSON files for a CPU model must
be in a separate directory.
Eg: for the CPU model "Silvermont_core":
$ ls tools/perf/pmu-events/arch/x86/Silvermont_core
Floating-point.json
Memory.json
Other.json
Pipelining.json
Virtualmemory.json
Finally, to allow multiple CPU models to share a single set of JSON files,
architectures must provide a mapping between a model and its set of events:
$ grep Silvermont tools/perf/pmu-events/arch/x86/mapfile.csv
GenuineIntel-6-4D,V13,Silvermont_core,core
GenuineIntel-6-4C,V13,Silvermont_core,core
which maps each CPU, identified by [vendor, family, model, version, type]
to a directory of JSON files. Thus two (or more) CPU models support the
set of PMU events listed in the directory.
tools/perf/pmu-events/arch/x86/Silvermont_core/
Given this organization of files, the program, jevents:
- locates all JSON files for each CPU-model of the architecture,
- parses all JSON files for the CPU-model and generates a C-style
"PMU-events table" (pmu-events.c) for the model
- locates a mapfile for the architecture
- builds a global table, mapping each model of CPU to the corresponding
PMU-events table.
The 'pmu-events.c' is generated when building perf and added to libperf.a.
The global table pmu_events_map[] table in this pmu-events.c will be used
in perf in a follow-on patch.
If the architecture does not have any JSON files or there is an error in
processing them, an empty mapping file is created. This would allow the
build of perf to proceed even if we are not able to provide aliases for
events.
The parser for JSON files allows parsing Intel style JSON event files. This
allows to use an Intel event list directly with perf. The Intel event lists
can be quite large and are too big to store in unswappable kernel memory.
The conversion from JSON to C-style is straight forward. The parser knows
(very little) Intel specific information, and can be easily extended to
handle fields for other CPUs.
The parser code is partially shared with an independent parsing library,
which is 2-clause BSD licensed. To avoid any conflicts I marked those
files as BSD licensed too. As part of perf they become GPLv2.
Committer notes:
Fixes:
1) Limit maxfds to 512 to avoid nftd() segfaulting on alloca() with a
big rlim_max, as in docker containers - acme
2) Make jevents a hostprog, supporting cross compilation - jolsa
3) Use HOSTCC for jevents final step - acme
4) Define _GNU_SOURCE for asprintf, as we can't use CC's EXTRA_CFLAGS,
that has to have --sysroot on the Android NDK 24 - acme
5) Removed $(srctree)/tools/perf/pmu-events/pmu-events.c from the
'clean' target, it is generated on $(OUTPUT)pmu-events/pmu-events.c,
which is already taken care of in the original patch - acme
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Jiri Olsa <jolsa@redhat.com>
Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Acked-by: Ingo Molnar <mingo@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Cc: linuxppc-dev@lists.ozlabs.org
Link: http://lkml.kernel.org/r/1473978296-20712-3-git-send-email-sukadev@linux.vnet.ibm.com
Link: http://lkml.kernel.org/r/20160927141846.GA6589@krava
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-19 20:39:33 +00:00
|
|
|
if (json_streq(map, precise, "2"))
|
2016-09-15 22:24:47 +00:00
|
|
|
addfield(map, &extra_desc, " ",
|
|
|
|
"(Must be precise)", NULL);
|
perf jevents: Program to convert JSON file
This is a modified version of an earlier patch by Andi Kleen.
We expect architectures to create JSON files describing the performance
monitoring (PMU) events that each CPU model/family of the architecture
supports.
Following is an example of the JSON file entry for an x86 event:
[
...
{
"EventCode": "0x00",
"UMask": "0x01",
"EventName": "INST_RETIRED.ANY",
"BriefDescription": "Instructions retired from execution.",
"PublicDescription": "Instructions retired from execution.",
"Counter": "Fixed counter 1",
"CounterHTOff": "Fixed counter 1",
"SampleAfterValue": "2000003",
"SampleAfterValue": "2000003",
"MSRIndex": "0",
"MSRValue": "0",
"TakenAlone": "0",
"CounterMask": "0",
"Invert": "0",
"AnyThread": "0",
"EdgeDetect": "0",
"PEBS": "0",
"PRECISE_STORE": "0",
"Errata": "null",
"Offcore": "0"
},
...
]
All the PMU events supported by a CPU model/family must be grouped into
"topics" such as "Pipelining", "Floating-point", "Virtual-memory" etc.
All events belonging to a topic must be placed in a separate JSON file
(eg: "Pipelining.json") and all the topic JSON files for a CPU model must
be in a separate directory.
Eg: for the CPU model "Silvermont_core":
$ ls tools/perf/pmu-events/arch/x86/Silvermont_core
Floating-point.json
Memory.json
Other.json
Pipelining.json
Virtualmemory.json
Finally, to allow multiple CPU models to share a single set of JSON files,
architectures must provide a mapping between a model and its set of events:
$ grep Silvermont tools/perf/pmu-events/arch/x86/mapfile.csv
GenuineIntel-6-4D,V13,Silvermont_core,core
GenuineIntel-6-4C,V13,Silvermont_core,core
which maps each CPU, identified by [vendor, family, model, version, type]
to a directory of JSON files. Thus two (or more) CPU models support the
set of PMU events listed in the directory.
tools/perf/pmu-events/arch/x86/Silvermont_core/
Given this organization of files, the program, jevents:
- locates all JSON files for each CPU-model of the architecture,
- parses all JSON files for the CPU-model and generates a C-style
"PMU-events table" (pmu-events.c) for the model
- locates a mapfile for the architecture
- builds a global table, mapping each model of CPU to the corresponding
PMU-events table.
The 'pmu-events.c' is generated when building perf and added to libperf.a.
The global table pmu_events_map[] table in this pmu-events.c will be used
in perf in a follow-on patch.
If the architecture does not have any JSON files or there is an error in
processing them, an empty mapping file is created. This would allow the
build of perf to proceed even if we are not able to provide aliases for
events.
The parser for JSON files allows parsing Intel style JSON event files. This
allows to use an Intel event list directly with perf. The Intel event lists
can be quite large and are too big to store in unswappable kernel memory.
The conversion from JSON to C-style is straight forward. The parser knows
(very little) Intel specific information, and can be easily extended to
handle fields for other CPUs.
The parser code is partially shared with an independent parsing library,
which is 2-clause BSD licensed. To avoid any conflicts I marked those
files as BSD licensed too. As part of perf they become GPLv2.
Committer notes:
Fixes:
1) Limit maxfds to 512 to avoid nftd() segfaulting on alloca() with a
big rlim_max, as in docker containers - acme
2) Make jevents a hostprog, supporting cross compilation - jolsa
3) Use HOSTCC for jevents final step - acme
4) Define _GNU_SOURCE for asprintf, as we can't use CC's EXTRA_CFLAGS,
that has to have --sysroot on the Android NDK 24 - acme
5) Removed $(srctree)/tools/perf/pmu-events/pmu-events.c from the
'clean' target, it is generated on $(OUTPUT)pmu-events/pmu-events.c,
which is already taken care of in the original patch - acme
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Jiri Olsa <jolsa@redhat.com>
Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Acked-by: Ingo Molnar <mingo@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Cc: linuxppc-dev@lists.ozlabs.org
Link: http://lkml.kernel.org/r/1473978296-20712-3-git-send-email-sukadev@linux.vnet.ibm.com
Link: http://lkml.kernel.org/r/20160927141846.GA6589@krava
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-19 20:39:33 +00:00
|
|
|
else
|
2016-09-15 22:24:47 +00:00
|
|
|
addfield(map, &extra_desc, " ",
|
perf jevents: Program to convert JSON file
This is a modified version of an earlier patch by Andi Kleen.
We expect architectures to create JSON files describing the performance
monitoring (PMU) events that each CPU model/family of the architecture
supports.
Following is an example of the JSON file entry for an x86 event:
[
...
{
"EventCode": "0x00",
"UMask": "0x01",
"EventName": "INST_RETIRED.ANY",
"BriefDescription": "Instructions retired from execution.",
"PublicDescription": "Instructions retired from execution.",
"Counter": "Fixed counter 1",
"CounterHTOff": "Fixed counter 1",
"SampleAfterValue": "2000003",
"SampleAfterValue": "2000003",
"MSRIndex": "0",
"MSRValue": "0",
"TakenAlone": "0",
"CounterMask": "0",
"Invert": "0",
"AnyThread": "0",
"EdgeDetect": "0",
"PEBS": "0",
"PRECISE_STORE": "0",
"Errata": "null",
"Offcore": "0"
},
...
]
All the PMU events supported by a CPU model/family must be grouped into
"topics" such as "Pipelining", "Floating-point", "Virtual-memory" etc.
All events belonging to a topic must be placed in a separate JSON file
(eg: "Pipelining.json") and all the topic JSON files for a CPU model must
be in a separate directory.
Eg: for the CPU model "Silvermont_core":
$ ls tools/perf/pmu-events/arch/x86/Silvermont_core
Floating-point.json
Memory.json
Other.json
Pipelining.json
Virtualmemory.json
Finally, to allow multiple CPU models to share a single set of JSON files,
architectures must provide a mapping between a model and its set of events:
$ grep Silvermont tools/perf/pmu-events/arch/x86/mapfile.csv
GenuineIntel-6-4D,V13,Silvermont_core,core
GenuineIntel-6-4C,V13,Silvermont_core,core
which maps each CPU, identified by [vendor, family, model, version, type]
to a directory of JSON files. Thus two (or more) CPU models support the
set of PMU events listed in the directory.
tools/perf/pmu-events/arch/x86/Silvermont_core/
Given this organization of files, the program, jevents:
- locates all JSON files for each CPU-model of the architecture,
- parses all JSON files for the CPU-model and generates a C-style
"PMU-events table" (pmu-events.c) for the model
- locates a mapfile for the architecture
- builds a global table, mapping each model of CPU to the corresponding
PMU-events table.
The 'pmu-events.c' is generated when building perf and added to libperf.a.
The global table pmu_events_map[] table in this pmu-events.c will be used
in perf in a follow-on patch.
If the architecture does not have any JSON files or there is an error in
processing them, an empty mapping file is created. This would allow the
build of perf to proceed even if we are not able to provide aliases for
events.
The parser for JSON files allows parsing Intel style JSON event files. This
allows to use an Intel event list directly with perf. The Intel event lists
can be quite large and are too big to store in unswappable kernel memory.
The conversion from JSON to C-style is straight forward. The parser knows
(very little) Intel specific information, and can be easily extended to
handle fields for other CPUs.
The parser code is partially shared with an independent parsing library,
which is 2-clause BSD licensed. To avoid any conflicts I marked those
files as BSD licensed too. As part of perf they become GPLv2.
Committer notes:
Fixes:
1) Limit maxfds to 512 to avoid nftd() segfaulting on alloca() with a
big rlim_max, as in docker containers - acme
2) Make jevents a hostprog, supporting cross compilation - jolsa
3) Use HOSTCC for jevents final step - acme
4) Define _GNU_SOURCE for asprintf, as we can't use CC's EXTRA_CFLAGS,
that has to have --sysroot on the Android NDK 24 - acme
5) Removed $(srctree)/tools/perf/pmu-events/pmu-events.c from the
'clean' target, it is generated on $(OUTPUT)pmu-events/pmu-events.c,
which is already taken care of in the original patch - acme
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Jiri Olsa <jolsa@redhat.com>
Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Acked-by: Ingo Molnar <mingo@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Cc: linuxppc-dev@lists.ozlabs.org
Link: http://lkml.kernel.org/r/1473978296-20712-3-git-send-email-sukadev@linux.vnet.ibm.com
Link: http://lkml.kernel.org/r/20160927141846.GA6589@krava
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-19 20:39:33 +00:00
|
|
|
"(Precise event)", NULL);
|
|
|
|
}
|
2017-01-28 02:03:36 +00:00
|
|
|
snprintf(buf, sizeof buf, "event=%#llx", eventcode);
|
|
|
|
addfield(map, &event, ",", buf, NULL);
|
2020-09-07 06:41:30 +00:00
|
|
|
if (je.desc && extra_desc)
|
|
|
|
addfield(map, &je.desc, " ", extra_desc, NULL);
|
|
|
|
if (je.long_desc && extra_desc)
|
|
|
|
addfield(map, &je.long_desc, " ", extra_desc, NULL);
|
2017-01-28 02:03:37 +00:00
|
|
|
if (filter)
|
|
|
|
addfield(map, &event, ",", filter, NULL);
|
perf jevents: Program to convert JSON file
This is a modified version of an earlier patch by Andi Kleen.
We expect architectures to create JSON files describing the performance
monitoring (PMU) events that each CPU model/family of the architecture
supports.
Following is an example of the JSON file entry for an x86 event:
[
...
{
"EventCode": "0x00",
"UMask": "0x01",
"EventName": "INST_RETIRED.ANY",
"BriefDescription": "Instructions retired from execution.",
"PublicDescription": "Instructions retired from execution.",
"Counter": "Fixed counter 1",
"CounterHTOff": "Fixed counter 1",
"SampleAfterValue": "2000003",
"SampleAfterValue": "2000003",
"MSRIndex": "0",
"MSRValue": "0",
"TakenAlone": "0",
"CounterMask": "0",
"Invert": "0",
"AnyThread": "0",
"EdgeDetect": "0",
"PEBS": "0",
"PRECISE_STORE": "0",
"Errata": "null",
"Offcore": "0"
},
...
]
All the PMU events supported by a CPU model/family must be grouped into
"topics" such as "Pipelining", "Floating-point", "Virtual-memory" etc.
All events belonging to a topic must be placed in a separate JSON file
(eg: "Pipelining.json") and all the topic JSON files for a CPU model must
be in a separate directory.
Eg: for the CPU model "Silvermont_core":
$ ls tools/perf/pmu-events/arch/x86/Silvermont_core
Floating-point.json
Memory.json
Other.json
Pipelining.json
Virtualmemory.json
Finally, to allow multiple CPU models to share a single set of JSON files,
architectures must provide a mapping between a model and its set of events:
$ grep Silvermont tools/perf/pmu-events/arch/x86/mapfile.csv
GenuineIntel-6-4D,V13,Silvermont_core,core
GenuineIntel-6-4C,V13,Silvermont_core,core
which maps each CPU, identified by [vendor, family, model, version, type]
to a directory of JSON files. Thus two (or more) CPU models support the
set of PMU events listed in the directory.
tools/perf/pmu-events/arch/x86/Silvermont_core/
Given this organization of files, the program, jevents:
- locates all JSON files for each CPU-model of the architecture,
- parses all JSON files for the CPU-model and generates a C-style
"PMU-events table" (pmu-events.c) for the model
- locates a mapfile for the architecture
- builds a global table, mapping each model of CPU to the corresponding
PMU-events table.
The 'pmu-events.c' is generated when building perf and added to libperf.a.
The global table pmu_events_map[] table in this pmu-events.c will be used
in perf in a follow-on patch.
If the architecture does not have any JSON files or there is an error in
processing them, an empty mapping file is created. This would allow the
build of perf to proceed even if we are not able to provide aliases for
events.
The parser for JSON files allows parsing Intel style JSON event files. This
allows to use an Intel event list directly with perf. The Intel event lists
can be quite large and are too big to store in unswappable kernel memory.
The conversion from JSON to C-style is straight forward. The parser knows
(very little) Intel specific information, and can be easily extended to
handle fields for other CPUs.
The parser code is partially shared with an independent parsing library,
which is 2-clause BSD licensed. To avoid any conflicts I marked those
files as BSD licensed too. As part of perf they become GPLv2.
Committer notes:
Fixes:
1) Limit maxfds to 512 to avoid nftd() segfaulting on alloca() with a
big rlim_max, as in docker containers - acme
2) Make jevents a hostprog, supporting cross compilation - jolsa
3) Use HOSTCC for jevents final step - acme
4) Define _GNU_SOURCE for asprintf, as we can't use CC's EXTRA_CFLAGS,
that has to have --sysroot on the Android NDK 24 - acme
5) Removed $(srctree)/tools/perf/pmu-events/pmu-events.c from the
'clean' target, it is generated on $(OUTPUT)pmu-events/pmu-events.c,
which is already taken care of in the original patch - acme
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Jiri Olsa <jolsa@redhat.com>
Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Acked-by: Ingo Molnar <mingo@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Cc: linuxppc-dev@lists.ozlabs.org
Link: http://lkml.kernel.org/r/1473978296-20712-3-git-send-email-sukadev@linux.vnet.ibm.com
Link: http://lkml.kernel.org/r/20160927141846.GA6589@krava
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-19 20:39:33 +00:00
|
|
|
if (msr != NULL)
|
|
|
|
addfield(map, &event, ",", msr->pname, msrval);
|
2020-09-07 06:41:30 +00:00
|
|
|
if (je.name)
|
|
|
|
fixname(je.name);
|
2016-09-15 22:24:47 +00:00
|
|
|
|
perf vendor events: Add support for arch standard events
For some architectures (like arm), there are architecture- defined
events. Sometimes these events may be "recommended" according to the
architecture standard, in that the implementer is free ignore the
"recommendation" and create its custom event.
This patch adds support for parsing standard events from arch-defined
JSONs, and fixing up vendor events when they have implemented these
events as standard.
Support is also ensured that the vendor may implement their own custom
events.
A new step is added to the pmu events parsing to fix up the vendor
events with the arch-standard events.
The arch-defined JSONs must be placed in the arch root folder for
preprocessing prior to tree JSON processing.
In the vendor JSON, to specify that the arch event is supported, the
keyword "ArchStdEvent" should be used, like this:
[
{
"ArchStdEvent": "L1D_CACHE_WR",
},
]
Matching is based on the "EventName" field in the architecture JSON.
No other JSON objects are strictly required. However, for other objects
added, these take precedence over architecture defined standard events,
thus supporting separate events which have the same event code.
Signed-off-by: John Garry <john.garry@huawei.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Ganapatrao Kulkarni <ganapatrao.kulkarni@cavium.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Shaokun Zhang <zhangshaokun@hisilicon.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: William Cohen <wcohen@redhat.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linuxarm@huawei.com
Link: http://lkml.kernel.org/r/1520506716-197429-8-git-send-email-john.garry@huawei.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2018-03-08 10:58:32 +00:00
|
|
|
if (arch_std) {
|
|
|
|
/*
|
|
|
|
* An arch standard event is referenced, so try to
|
|
|
|
* fixup any unassigned values.
|
|
|
|
*/
|
2020-10-08 15:19:28 +00:00
|
|
|
err = try_fixup(fn, arch_std, &je, &event);
|
perf vendor events: Add support for arch standard events
For some architectures (like arm), there are architecture- defined
events. Sometimes these events may be "recommended" according to the
architecture standard, in that the implementer is free ignore the
"recommendation" and create its custom event.
This patch adds support for parsing standard events from arch-defined
JSONs, and fixing up vendor events when they have implemented these
events as standard.
Support is also ensured that the vendor may implement their own custom
events.
A new step is added to the pmu events parsing to fix up the vendor
events with the arch-standard events.
The arch-defined JSONs must be placed in the arch root folder for
preprocessing prior to tree JSON processing.
In the vendor JSON, to specify that the arch event is supported, the
keyword "ArchStdEvent" should be used, like this:
[
{
"ArchStdEvent": "L1D_CACHE_WR",
},
]
Matching is based on the "EventName" field in the architecture JSON.
No other JSON objects are strictly required. However, for other objects
added, these take precedence over architecture defined standard events,
thus supporting separate events which have the same event code.
Signed-off-by: John Garry <john.garry@huawei.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Ganapatrao Kulkarni <ganapatrao.kulkarni@cavium.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Shaokun Zhang <zhangshaokun@hisilicon.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: William Cohen <wcohen@redhat.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linuxarm@huawei.com
Link: http://lkml.kernel.org/r/1520506716-197429-8-git-send-email-john.garry@huawei.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2018-03-08 10:58:32 +00:00
|
|
|
if (err)
|
|
|
|
goto free_strings;
|
|
|
|
}
|
2020-09-07 06:41:30 +00:00
|
|
|
je.event = real_event(je.name, event);
|
|
|
|
err = func(data, &je);
|
perf vendor events: Add support for arch standard events
For some architectures (like arm), there are architecture- defined
events. Sometimes these events may be "recommended" according to the
architecture standard, in that the implementer is free ignore the
"recommendation" and create its custom event.
This patch adds support for parsing standard events from arch-defined
JSONs, and fixing up vendor events when they have implemented these
events as standard.
Support is also ensured that the vendor may implement their own custom
events.
A new step is added to the pmu events parsing to fix up the vendor
events with the arch-standard events.
The arch-defined JSONs must be placed in the arch root folder for
preprocessing prior to tree JSON processing.
In the vendor JSON, to specify that the arch event is supported, the
keyword "ArchStdEvent" should be used, like this:
[
{
"ArchStdEvent": "L1D_CACHE_WR",
},
]
Matching is based on the "EventName" field in the architecture JSON.
No other JSON objects are strictly required. However, for other objects
added, these take precedence over architecture defined standard events,
thus supporting separate events which have the same event code.
Signed-off-by: John Garry <john.garry@huawei.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Ganapatrao Kulkarni <ganapatrao.kulkarni@cavium.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Shaokun Zhang <zhangshaokun@hisilicon.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: William Cohen <wcohen@redhat.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linuxarm@huawei.com
Link: http://lkml.kernel.org/r/1520506716-197429-8-git-send-email-john.garry@huawei.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2018-03-08 10:58:32 +00:00
|
|
|
free_strings:
|
perf jevents: Program to convert JSON file
This is a modified version of an earlier patch by Andi Kleen.
We expect architectures to create JSON files describing the performance
monitoring (PMU) events that each CPU model/family of the architecture
supports.
Following is an example of the JSON file entry for an x86 event:
[
...
{
"EventCode": "0x00",
"UMask": "0x01",
"EventName": "INST_RETIRED.ANY",
"BriefDescription": "Instructions retired from execution.",
"PublicDescription": "Instructions retired from execution.",
"Counter": "Fixed counter 1",
"CounterHTOff": "Fixed counter 1",
"SampleAfterValue": "2000003",
"SampleAfterValue": "2000003",
"MSRIndex": "0",
"MSRValue": "0",
"TakenAlone": "0",
"CounterMask": "0",
"Invert": "0",
"AnyThread": "0",
"EdgeDetect": "0",
"PEBS": "0",
"PRECISE_STORE": "0",
"Errata": "null",
"Offcore": "0"
},
...
]
All the PMU events supported by a CPU model/family must be grouped into
"topics" such as "Pipelining", "Floating-point", "Virtual-memory" etc.
All events belonging to a topic must be placed in a separate JSON file
(eg: "Pipelining.json") and all the topic JSON files for a CPU model must
be in a separate directory.
Eg: for the CPU model "Silvermont_core":
$ ls tools/perf/pmu-events/arch/x86/Silvermont_core
Floating-point.json
Memory.json
Other.json
Pipelining.json
Virtualmemory.json
Finally, to allow multiple CPU models to share a single set of JSON files,
architectures must provide a mapping between a model and its set of events:
$ grep Silvermont tools/perf/pmu-events/arch/x86/mapfile.csv
GenuineIntel-6-4D,V13,Silvermont_core,core
GenuineIntel-6-4C,V13,Silvermont_core,core
which maps each CPU, identified by [vendor, family, model, version, type]
to a directory of JSON files. Thus two (or more) CPU models support the
set of PMU events listed in the directory.
tools/perf/pmu-events/arch/x86/Silvermont_core/
Given this organization of files, the program, jevents:
- locates all JSON files for each CPU-model of the architecture,
- parses all JSON files for the CPU-model and generates a C-style
"PMU-events table" (pmu-events.c) for the model
- locates a mapfile for the architecture
- builds a global table, mapping each model of CPU to the corresponding
PMU-events table.
The 'pmu-events.c' is generated when building perf and added to libperf.a.
The global table pmu_events_map[] table in this pmu-events.c will be used
in perf in a follow-on patch.
If the architecture does not have any JSON files or there is an error in
processing them, an empty mapping file is created. This would allow the
build of perf to proceed even if we are not able to provide aliases for
events.
The parser for JSON files allows parsing Intel style JSON event files. This
allows to use an Intel event list directly with perf. The Intel event lists
can be quite large and are too big to store in unswappable kernel memory.
The conversion from JSON to C-style is straight forward. The parser knows
(very little) Intel specific information, and can be easily extended to
handle fields for other CPUs.
The parser code is partially shared with an independent parsing library,
which is 2-clause BSD licensed. To avoid any conflicts I marked those
files as BSD licensed too. As part of perf they become GPLv2.
Committer notes:
Fixes:
1) Limit maxfds to 512 to avoid nftd() segfaulting on alloca() with a
big rlim_max, as in docker containers - acme
2) Make jevents a hostprog, supporting cross compilation - jolsa
3) Use HOSTCC for jevents final step - acme
4) Define _GNU_SOURCE for asprintf, as we can't use CC's EXTRA_CFLAGS,
that has to have --sysroot on the Android NDK 24 - acme
5) Removed $(srctree)/tools/perf/pmu-events/pmu-events.c from the
'clean' target, it is generated on $(OUTPUT)pmu-events/pmu-events.c,
which is already taken care of in the original patch - acme
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Jiri Olsa <jolsa@redhat.com>
Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Acked-by: Ingo Molnar <mingo@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Cc: linuxppc-dev@lists.ozlabs.org
Link: http://lkml.kernel.org/r/1473978296-20712-3-git-send-email-sukadev@linux.vnet.ibm.com
Link: http://lkml.kernel.org/r/20160927141846.GA6589@krava
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-19 20:39:33 +00:00
|
|
|
free(event);
|
2020-09-07 06:41:30 +00:00
|
|
|
free(je.desc);
|
|
|
|
free(je.name);
|
perf jevents: Add support for system events tables
Process the JSONs to find support for "system" events, which are not
tied to a specific CPUID.
A "COMPAT" property is now used to match against the namespace ID from
the kernel PMU driver.
The generated pmu-events.c will now have 2 tables:
a. CPU events, as before.
b. New pmu_sys_event_tables[] table, which will have events matched to
specific SoCs.
It will look like this:
struct pmu_event pme_hisilicon_hip09_sys[] = {
{
.name = "cycles",
.compat = "0x00030736",
.event = "event=0",
.desc = "Clock cycles",
.topic = "smmu v3 pmcg",
.long_desc = "Clock cycles",
},
{
.name = "smmuv3_pmcg.l1_tlb",
.compat = "0x00030736",
.event = "event=0x8a",
.desc = "SMMUv3 PMCG l1_tlb. Unit: smmuv3_pmcg ",
.topic = "smmu v3 pmcg",
.long_desc = "SMMUv3 PMCG l1_tlb",
.pmu = "smmuv3_pmcg",
},
...
};
struct pmu_event pme_arm_cortex_a53[] = {
{
.name = "ext_mem_req",
.event = "event=0xc0",
.desc = "External memory request",
.topic = "memory",
},
{
.name = "ext_mem_req_nc",
.event = "event=0xc1",
.desc = "Non-cacheable external memory request",
.topic = "memory",
},
...
};
struct pmu_event pme_hisilicon_hip09_cpu[] = {
{
.name = "l2d_cache_refill_wr",
.event = "event=0x53",
.desc = "L2D cache refill, write",
.topic = "core imp def",
.long_desc = "Attributable Level 2 data cache refill, write",
},
...
};
struct pmu_events_map pmu_events_map[] = {
{
.cpuid = "0x00000000410fd030",
.version = "v1",
.type = "core",
.table = pme_arm_cortex_a53
},
{
.cpuid = "0x00000000480fd010",
.version = "v1",
.type = "core",
.table = pme_hisilicon_hip09_cpu
},
{
.table = 0
},
};
struct pmu_event pme_hisilicon_hip09_cpu[] = {
{
.name = "uncore_hisi_l3c.rd_cpipe",
.event = "event=0",
.desc = "Total read accesses. Unit: hisi_sccl,l3c ",
.topic = "uncore l3c",
.long_desc = "Total read accesses",
.pmu = "hisi_sccl,l3c",
},
{
.name = "uncore_hisi_l3c.wr_cpipe",
.event = "event=0x1",
.desc = "Total write accesses. Unit: hisi_sccl,l3c ",
.topic = "uncore l3c",
.long_desc = "Total write accesses",
.pmu = "hisi_sccl,l3c",
},
...
};
struct pmu_sys_events pmu_sys_event_tables[] = {
{
.table = pme_hisilicon_hip09_sys,
},
...
};
Committer notes:
Added the fix for architectures without PMU events, provided by John
after I reported the build failing in such systems.
Link: https://lore.kernel.org/lkml/650baaf2-36b6-a9e2-ff49-963ef864c1f3@huawei.com/
Signed-off-by: John Garry <john.garry@huawei.com>
Acked-by: Kajol Jain <kjain@linux.ibm.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Ian Rogers <irogers@google.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Joakim Zhang <qiangqing.zhang@nxp.com>
Cc: Kan Liang <kan.liang@linux.intel.com>
Cc: Kim Phillips <kim.phillips@amd.com>
Cc: Leo Yan <leo.yan@linaro.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Shaokun Zhang <zhangshaokun@hisilicon.com>
Cc: Will Deacon <will@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linuxarm@huawei.com
Link: http://lore.kernel.org/lkml/1607080216-36968-3-git-send-email-john.garry@huawei.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2020-12-04 11:10:08 +00:00
|
|
|
free(je.compat);
|
2020-09-07 06:41:30 +00:00
|
|
|
free(je.long_desc);
|
2016-09-15 22:24:47 +00:00
|
|
|
free(extra_desc);
|
2020-09-07 06:41:30 +00:00
|
|
|
free(je.pmu);
|
2017-01-28 02:03:37 +00:00
|
|
|
free(filter);
|
2020-09-07 06:41:30 +00:00
|
|
|
free(je.perpkg);
|
2020-09-07 06:41:31 +00:00
|
|
|
free(je.aggr_mode);
|
2020-09-07 06:41:30 +00:00
|
|
|
free(je.deprecated);
|
|
|
|
free(je.unit);
|
|
|
|
free(je.metric_expr);
|
|
|
|
free(je.metric_name);
|
|
|
|
free(je.metric_group);
|
|
|
|
free(je.metric_constraint);
|
perf vendor events: Add support for arch standard events
For some architectures (like arm), there are architecture- defined
events. Sometimes these events may be "recommended" according to the
architecture standard, in that the implementer is free ignore the
"recommendation" and create its custom event.
This patch adds support for parsing standard events from arch-defined
JSONs, and fixing up vendor events when they have implemented these
events as standard.
Support is also ensured that the vendor may implement their own custom
events.
A new step is added to the pmu events parsing to fix up the vendor
events with the arch-standard events.
The arch-defined JSONs must be placed in the arch root folder for
preprocessing prior to tree JSON processing.
In the vendor JSON, to specify that the arch event is supported, the
keyword "ArchStdEvent" should be used, like this:
[
{
"ArchStdEvent": "L1D_CACHE_WR",
},
]
Matching is based on the "EventName" field in the architecture JSON.
No other JSON objects are strictly required. However, for other objects
added, these take precedence over architecture defined standard events,
thus supporting separate events which have the same event code.
Signed-off-by: John Garry <john.garry@huawei.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Ganapatrao Kulkarni <ganapatrao.kulkarni@cavium.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Shaokun Zhang <zhangshaokun@hisilicon.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: William Cohen <wcohen@redhat.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linuxarm@huawei.com
Link: http://lkml.kernel.org/r/1520506716-197429-8-git-send-email-john.garry@huawei.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2018-03-08 10:58:32 +00:00
|
|
|
free(arch_std);
|
|
|
|
|
perf jevents: Program to convert JSON file
This is a modified version of an earlier patch by Andi Kleen.
We expect architectures to create JSON files describing the performance
monitoring (PMU) events that each CPU model/family of the architecture
supports.
Following is an example of the JSON file entry for an x86 event:
[
...
{
"EventCode": "0x00",
"UMask": "0x01",
"EventName": "INST_RETIRED.ANY",
"BriefDescription": "Instructions retired from execution.",
"PublicDescription": "Instructions retired from execution.",
"Counter": "Fixed counter 1",
"CounterHTOff": "Fixed counter 1",
"SampleAfterValue": "2000003",
"SampleAfterValue": "2000003",
"MSRIndex": "0",
"MSRValue": "0",
"TakenAlone": "0",
"CounterMask": "0",
"Invert": "0",
"AnyThread": "0",
"EdgeDetect": "0",
"PEBS": "0",
"PRECISE_STORE": "0",
"Errata": "null",
"Offcore": "0"
},
...
]
All the PMU events supported by a CPU model/family must be grouped into
"topics" such as "Pipelining", "Floating-point", "Virtual-memory" etc.
All events belonging to a topic must be placed in a separate JSON file
(eg: "Pipelining.json") and all the topic JSON files for a CPU model must
be in a separate directory.
Eg: for the CPU model "Silvermont_core":
$ ls tools/perf/pmu-events/arch/x86/Silvermont_core
Floating-point.json
Memory.json
Other.json
Pipelining.json
Virtualmemory.json
Finally, to allow multiple CPU models to share a single set of JSON files,
architectures must provide a mapping between a model and its set of events:
$ grep Silvermont tools/perf/pmu-events/arch/x86/mapfile.csv
GenuineIntel-6-4D,V13,Silvermont_core,core
GenuineIntel-6-4C,V13,Silvermont_core,core
which maps each CPU, identified by [vendor, family, model, version, type]
to a directory of JSON files. Thus two (or more) CPU models support the
set of PMU events listed in the directory.
tools/perf/pmu-events/arch/x86/Silvermont_core/
Given this organization of files, the program, jevents:
- locates all JSON files for each CPU-model of the architecture,
- parses all JSON files for the CPU-model and generates a C-style
"PMU-events table" (pmu-events.c) for the model
- locates a mapfile for the architecture
- builds a global table, mapping each model of CPU to the corresponding
PMU-events table.
The 'pmu-events.c' is generated when building perf and added to libperf.a.
The global table pmu_events_map[] table in this pmu-events.c will be used
in perf in a follow-on patch.
If the architecture does not have any JSON files or there is an error in
processing them, an empty mapping file is created. This would allow the
build of perf to proceed even if we are not able to provide aliases for
events.
The parser for JSON files allows parsing Intel style JSON event files. This
allows to use an Intel event list directly with perf. The Intel event lists
can be quite large and are too big to store in unswappable kernel memory.
The conversion from JSON to C-style is straight forward. The parser knows
(very little) Intel specific information, and can be easily extended to
handle fields for other CPUs.
The parser code is partially shared with an independent parsing library,
which is 2-clause BSD licensed. To avoid any conflicts I marked those
files as BSD licensed too. As part of perf they become GPLv2.
Committer notes:
Fixes:
1) Limit maxfds to 512 to avoid nftd() segfaulting on alloca() with a
big rlim_max, as in docker containers - acme
2) Make jevents a hostprog, supporting cross compilation - jolsa
3) Use HOSTCC for jevents final step - acme
4) Define _GNU_SOURCE for asprintf, as we can't use CC's EXTRA_CFLAGS,
that has to have --sysroot on the Android NDK 24 - acme
5) Removed $(srctree)/tools/perf/pmu-events/pmu-events.c from the
'clean' target, it is generated on $(OUTPUT)pmu-events/pmu-events.c,
which is already taken care of in the original patch - acme
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Jiri Olsa <jolsa@redhat.com>
Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Acked-by: Ingo Molnar <mingo@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Cc: linuxppc-dev@lists.ozlabs.org
Link: http://lkml.kernel.org/r/1473978296-20712-3-git-send-email-sukadev@linux.vnet.ibm.com
Link: http://lkml.kernel.org/r/20160927141846.GA6589@krava
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-19 20:39:33 +00:00
|
|
|
if (err)
|
|
|
|
break;
|
|
|
|
tok += j;
|
|
|
|
}
|
|
|
|
EXPECT(tok - tokens == len, tok, "unexpected objects at end");
|
|
|
|
err = 0;
|
|
|
|
out_free:
|
|
|
|
free_json(map, size, tokens);
|
|
|
|
return err;
|
|
|
|
}
|
|
|
|
|
|
|
|
static char *file_name_to_table_name(char *fname)
|
|
|
|
{
|
|
|
|
unsigned int i;
|
|
|
|
int n;
|
|
|
|
int c;
|
|
|
|
char *tblname;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Ensure tablename starts with alphabetic character.
|
|
|
|
* Derive rest of table name from basename of the JSON file,
|
|
|
|
* replacing hyphens and stripping out .json suffix.
|
|
|
|
*/
|
perf vendor events: Add support for pmu events vendor subdirectory
For some architectures (like arm), it is required to support a vendor
subdirectory and not locate all the JSONs for a specific vendor in the
same folder.
This is because all the events for the same vendor will be placed in the
same pmu events table, which may cause conflict. This conflict would be
in the instance that a vendor's custom implemented events do have the
same meaning on different platforms, so events in the pmu table would
conflict. In addition, per list command may show events which are not
even supported for a given platform.
This patch adds support for a arch/vendor/platform directory hierarchy,
while maintaining backwards-compatibility for existing arch/platform
structure. In this, each platform would always have its own pmu events
table.
In generated file pmu_events.c, each platform table name is in the
format pme{_vendor}_platform, like this:
struct pmu_events_map pmu_events_map[] = {
{
.cpuid = "0x00000000420f5160",
.version = "v1",
.type = "core",
.table = pme_cavium_thunderx2
},
{
.cpuid = 0,
.version = 0,
.type = 0,
.table = 0,
},
};
Signed-off-by: John Garry <john.garry@huawei.com>
Acked-by: Jiri Olsa <jolsa@kernel.org>
Tested-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Ganapatrao Kulkarni <ganapatrao.kulkarni@cavium.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Shaokun Zhang <zhangshaokun@hisilicon.com>
Cc: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: William Cohen <wcohen@redhat.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linuxarm@huawei.com
Link: http://lkml.kernel.org/r/1520506716-197429-5-git-send-email-john.garry@huawei.com
Link: http://lkml.kernel.org/r/1521047452-28565-1-git-send-email-john.garry@huawei.com
[ Add missing limits.h include, fixing the build on at least all Alpine Linux versions tested (3.4 to 3.7 + edge), ]
[ Applied a patch to fix reading ./.. directories in XFS, see second Link tag ]
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2018-03-08 10:58:29 +00:00
|
|
|
n = asprintf(&tblname, "pme_%s", fname);
|
perf jevents: Program to convert JSON file
This is a modified version of an earlier patch by Andi Kleen.
We expect architectures to create JSON files describing the performance
monitoring (PMU) events that each CPU model/family of the architecture
supports.
Following is an example of the JSON file entry for an x86 event:
[
...
{
"EventCode": "0x00",
"UMask": "0x01",
"EventName": "INST_RETIRED.ANY",
"BriefDescription": "Instructions retired from execution.",
"PublicDescription": "Instructions retired from execution.",
"Counter": "Fixed counter 1",
"CounterHTOff": "Fixed counter 1",
"SampleAfterValue": "2000003",
"SampleAfterValue": "2000003",
"MSRIndex": "0",
"MSRValue": "0",
"TakenAlone": "0",
"CounterMask": "0",
"Invert": "0",
"AnyThread": "0",
"EdgeDetect": "0",
"PEBS": "0",
"PRECISE_STORE": "0",
"Errata": "null",
"Offcore": "0"
},
...
]
All the PMU events supported by a CPU model/family must be grouped into
"topics" such as "Pipelining", "Floating-point", "Virtual-memory" etc.
All events belonging to a topic must be placed in a separate JSON file
(eg: "Pipelining.json") and all the topic JSON files for a CPU model must
be in a separate directory.
Eg: for the CPU model "Silvermont_core":
$ ls tools/perf/pmu-events/arch/x86/Silvermont_core
Floating-point.json
Memory.json
Other.json
Pipelining.json
Virtualmemory.json
Finally, to allow multiple CPU models to share a single set of JSON files,
architectures must provide a mapping between a model and its set of events:
$ grep Silvermont tools/perf/pmu-events/arch/x86/mapfile.csv
GenuineIntel-6-4D,V13,Silvermont_core,core
GenuineIntel-6-4C,V13,Silvermont_core,core
which maps each CPU, identified by [vendor, family, model, version, type]
to a directory of JSON files. Thus two (or more) CPU models support the
set of PMU events listed in the directory.
tools/perf/pmu-events/arch/x86/Silvermont_core/
Given this organization of files, the program, jevents:
- locates all JSON files for each CPU-model of the architecture,
- parses all JSON files for the CPU-model and generates a C-style
"PMU-events table" (pmu-events.c) for the model
- locates a mapfile for the architecture
- builds a global table, mapping each model of CPU to the corresponding
PMU-events table.
The 'pmu-events.c' is generated when building perf and added to libperf.a.
The global table pmu_events_map[] table in this pmu-events.c will be used
in perf in a follow-on patch.
If the architecture does not have any JSON files or there is an error in
processing them, an empty mapping file is created. This would allow the
build of perf to proceed even if we are not able to provide aliases for
events.
The parser for JSON files allows parsing Intel style JSON event files. This
allows to use an Intel event list directly with perf. The Intel event lists
can be quite large and are too big to store in unswappable kernel memory.
The conversion from JSON to C-style is straight forward. The parser knows
(very little) Intel specific information, and can be easily extended to
handle fields for other CPUs.
The parser code is partially shared with an independent parsing library,
which is 2-clause BSD licensed. To avoid any conflicts I marked those
files as BSD licensed too. As part of perf they become GPLv2.
Committer notes:
Fixes:
1) Limit maxfds to 512 to avoid nftd() segfaulting on alloca() with a
big rlim_max, as in docker containers - acme
2) Make jevents a hostprog, supporting cross compilation - jolsa
3) Use HOSTCC for jevents final step - acme
4) Define _GNU_SOURCE for asprintf, as we can't use CC's EXTRA_CFLAGS,
that has to have --sysroot on the Android NDK 24 - acme
5) Removed $(srctree)/tools/perf/pmu-events/pmu-events.c from the
'clean' target, it is generated on $(OUTPUT)pmu-events/pmu-events.c,
which is already taken care of in the original patch - acme
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Jiri Olsa <jolsa@redhat.com>
Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Acked-by: Ingo Molnar <mingo@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Cc: linuxppc-dev@lists.ozlabs.org
Link: http://lkml.kernel.org/r/1473978296-20712-3-git-send-email-sukadev@linux.vnet.ibm.com
Link: http://lkml.kernel.org/r/20160927141846.GA6589@krava
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-19 20:39:33 +00:00
|
|
|
if (n < 0) {
|
|
|
|
pr_info("%s: asprintf() error %s for file %s\n", prog,
|
|
|
|
strerror(errno), fname);
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
for (i = 0; i < strlen(tblname); i++) {
|
|
|
|
c = tblname[i];
|
|
|
|
|
perf vendor events: Add support for pmu events vendor subdirectory
For some architectures (like arm), it is required to support a vendor
subdirectory and not locate all the JSONs for a specific vendor in the
same folder.
This is because all the events for the same vendor will be placed in the
same pmu events table, which may cause conflict. This conflict would be
in the instance that a vendor's custom implemented events do have the
same meaning on different platforms, so events in the pmu table would
conflict. In addition, per list command may show events which are not
even supported for a given platform.
This patch adds support for a arch/vendor/platform directory hierarchy,
while maintaining backwards-compatibility for existing arch/platform
structure. In this, each platform would always have its own pmu events
table.
In generated file pmu_events.c, each platform table name is in the
format pme{_vendor}_platform, like this:
struct pmu_events_map pmu_events_map[] = {
{
.cpuid = "0x00000000420f5160",
.version = "v1",
.type = "core",
.table = pme_cavium_thunderx2
},
{
.cpuid = 0,
.version = 0,
.type = 0,
.table = 0,
},
};
Signed-off-by: John Garry <john.garry@huawei.com>
Acked-by: Jiri Olsa <jolsa@kernel.org>
Tested-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Ganapatrao Kulkarni <ganapatrao.kulkarni@cavium.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Shaokun Zhang <zhangshaokun@hisilicon.com>
Cc: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: William Cohen <wcohen@redhat.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linuxarm@huawei.com
Link: http://lkml.kernel.org/r/1520506716-197429-5-git-send-email-john.garry@huawei.com
Link: http://lkml.kernel.org/r/1521047452-28565-1-git-send-email-john.garry@huawei.com
[ Add missing limits.h include, fixing the build on at least all Alpine Linux versions tested (3.4 to 3.7 + edge), ]
[ Applied a patch to fix reading ./.. directories in XFS, see second Link tag ]
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2018-03-08 10:58:29 +00:00
|
|
|
if (c == '-' || c == '/')
|
perf jevents: Program to convert JSON file
This is a modified version of an earlier patch by Andi Kleen.
We expect architectures to create JSON files describing the performance
monitoring (PMU) events that each CPU model/family of the architecture
supports.
Following is an example of the JSON file entry for an x86 event:
[
...
{
"EventCode": "0x00",
"UMask": "0x01",
"EventName": "INST_RETIRED.ANY",
"BriefDescription": "Instructions retired from execution.",
"PublicDescription": "Instructions retired from execution.",
"Counter": "Fixed counter 1",
"CounterHTOff": "Fixed counter 1",
"SampleAfterValue": "2000003",
"SampleAfterValue": "2000003",
"MSRIndex": "0",
"MSRValue": "0",
"TakenAlone": "0",
"CounterMask": "0",
"Invert": "0",
"AnyThread": "0",
"EdgeDetect": "0",
"PEBS": "0",
"PRECISE_STORE": "0",
"Errata": "null",
"Offcore": "0"
},
...
]
All the PMU events supported by a CPU model/family must be grouped into
"topics" such as "Pipelining", "Floating-point", "Virtual-memory" etc.
All events belonging to a topic must be placed in a separate JSON file
(eg: "Pipelining.json") and all the topic JSON files for a CPU model must
be in a separate directory.
Eg: for the CPU model "Silvermont_core":
$ ls tools/perf/pmu-events/arch/x86/Silvermont_core
Floating-point.json
Memory.json
Other.json
Pipelining.json
Virtualmemory.json
Finally, to allow multiple CPU models to share a single set of JSON files,
architectures must provide a mapping between a model and its set of events:
$ grep Silvermont tools/perf/pmu-events/arch/x86/mapfile.csv
GenuineIntel-6-4D,V13,Silvermont_core,core
GenuineIntel-6-4C,V13,Silvermont_core,core
which maps each CPU, identified by [vendor, family, model, version, type]
to a directory of JSON files. Thus two (or more) CPU models support the
set of PMU events listed in the directory.
tools/perf/pmu-events/arch/x86/Silvermont_core/
Given this organization of files, the program, jevents:
- locates all JSON files for each CPU-model of the architecture,
- parses all JSON files for the CPU-model and generates a C-style
"PMU-events table" (pmu-events.c) for the model
- locates a mapfile for the architecture
- builds a global table, mapping each model of CPU to the corresponding
PMU-events table.
The 'pmu-events.c' is generated when building perf and added to libperf.a.
The global table pmu_events_map[] table in this pmu-events.c will be used
in perf in a follow-on patch.
If the architecture does not have any JSON files or there is an error in
processing them, an empty mapping file is created. This would allow the
build of perf to proceed even if we are not able to provide aliases for
events.
The parser for JSON files allows parsing Intel style JSON event files. This
allows to use an Intel event list directly with perf. The Intel event lists
can be quite large and are too big to store in unswappable kernel memory.
The conversion from JSON to C-style is straight forward. The parser knows
(very little) Intel specific information, and can be easily extended to
handle fields for other CPUs.
The parser code is partially shared with an independent parsing library,
which is 2-clause BSD licensed. To avoid any conflicts I marked those
files as BSD licensed too. As part of perf they become GPLv2.
Committer notes:
Fixes:
1) Limit maxfds to 512 to avoid nftd() segfaulting on alloca() with a
big rlim_max, as in docker containers - acme
2) Make jevents a hostprog, supporting cross compilation - jolsa
3) Use HOSTCC for jevents final step - acme
4) Define _GNU_SOURCE for asprintf, as we can't use CC's EXTRA_CFLAGS,
that has to have --sysroot on the Android NDK 24 - acme
5) Removed $(srctree)/tools/perf/pmu-events/pmu-events.c from the
'clean' target, it is generated on $(OUTPUT)pmu-events/pmu-events.c,
which is already taken care of in the original patch - acme
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Jiri Olsa <jolsa@redhat.com>
Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Acked-by: Ingo Molnar <mingo@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Cc: linuxppc-dev@lists.ozlabs.org
Link: http://lkml.kernel.org/r/1473978296-20712-3-git-send-email-sukadev@linux.vnet.ibm.com
Link: http://lkml.kernel.org/r/20160927141846.GA6589@krava
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-19 20:39:33 +00:00
|
|
|
tblname[i] = '_';
|
|
|
|
else if (c == '.') {
|
|
|
|
tblname[i] = '\0';
|
|
|
|
break;
|
|
|
|
} else if (!isalnum(c) && c != '_') {
|
|
|
|
pr_err("%s: Invalid character '%c' in file name %s\n",
|
|
|
|
prog, c, basename(fname));
|
|
|
|
free(tblname);
|
|
|
|
tblname = NULL;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
return tblname;
|
|
|
|
}
|
|
|
|
|
perf jevents: Add support for system events tables
Process the JSONs to find support for "system" events, which are not
tied to a specific CPUID.
A "COMPAT" property is now used to match against the namespace ID from
the kernel PMU driver.
The generated pmu-events.c will now have 2 tables:
a. CPU events, as before.
b. New pmu_sys_event_tables[] table, which will have events matched to
specific SoCs.
It will look like this:
struct pmu_event pme_hisilicon_hip09_sys[] = {
{
.name = "cycles",
.compat = "0x00030736",
.event = "event=0",
.desc = "Clock cycles",
.topic = "smmu v3 pmcg",
.long_desc = "Clock cycles",
},
{
.name = "smmuv3_pmcg.l1_tlb",
.compat = "0x00030736",
.event = "event=0x8a",
.desc = "SMMUv3 PMCG l1_tlb. Unit: smmuv3_pmcg ",
.topic = "smmu v3 pmcg",
.long_desc = "SMMUv3 PMCG l1_tlb",
.pmu = "smmuv3_pmcg",
},
...
};
struct pmu_event pme_arm_cortex_a53[] = {
{
.name = "ext_mem_req",
.event = "event=0xc0",
.desc = "External memory request",
.topic = "memory",
},
{
.name = "ext_mem_req_nc",
.event = "event=0xc1",
.desc = "Non-cacheable external memory request",
.topic = "memory",
},
...
};
struct pmu_event pme_hisilicon_hip09_cpu[] = {
{
.name = "l2d_cache_refill_wr",
.event = "event=0x53",
.desc = "L2D cache refill, write",
.topic = "core imp def",
.long_desc = "Attributable Level 2 data cache refill, write",
},
...
};
struct pmu_events_map pmu_events_map[] = {
{
.cpuid = "0x00000000410fd030",
.version = "v1",
.type = "core",
.table = pme_arm_cortex_a53
},
{
.cpuid = "0x00000000480fd010",
.version = "v1",
.type = "core",
.table = pme_hisilicon_hip09_cpu
},
{
.table = 0
},
};
struct pmu_event pme_hisilicon_hip09_cpu[] = {
{
.name = "uncore_hisi_l3c.rd_cpipe",
.event = "event=0",
.desc = "Total read accesses. Unit: hisi_sccl,l3c ",
.topic = "uncore l3c",
.long_desc = "Total read accesses",
.pmu = "hisi_sccl,l3c",
},
{
.name = "uncore_hisi_l3c.wr_cpipe",
.event = "event=0x1",
.desc = "Total write accesses. Unit: hisi_sccl,l3c ",
.topic = "uncore l3c",
.long_desc = "Total write accesses",
.pmu = "hisi_sccl,l3c",
},
...
};
struct pmu_sys_events pmu_sys_event_tables[] = {
{
.table = pme_hisilicon_hip09_sys,
},
...
};
Committer notes:
Added the fix for architectures without PMU events, provided by John
after I reported the build failing in such systems.
Link: https://lore.kernel.org/lkml/650baaf2-36b6-a9e2-ff49-963ef864c1f3@huawei.com/
Signed-off-by: John Garry <john.garry@huawei.com>
Acked-by: Kajol Jain <kjain@linux.ibm.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Ian Rogers <irogers@google.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Joakim Zhang <qiangqing.zhang@nxp.com>
Cc: Kan Liang <kan.liang@linux.intel.com>
Cc: Kim Phillips <kim.phillips@amd.com>
Cc: Leo Yan <leo.yan@linaro.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Shaokun Zhang <zhangshaokun@hisilicon.com>
Cc: Will Deacon <will@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linuxarm@huawei.com
Link: http://lore.kernel.org/lkml/1607080216-36968-3-git-send-email-john.garry@huawei.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2020-12-04 11:10:08 +00:00
|
|
|
static bool is_sys_dir(char *fname)
|
|
|
|
{
|
|
|
|
size_t len = strlen(fname), len2 = strlen("/sys");
|
|
|
|
|
|
|
|
if (len2 > len)
|
|
|
|
return false;
|
|
|
|
return !strcmp(fname+len-len2, "/sys");
|
|
|
|
}
|
|
|
|
|
perf jevents: Program to convert JSON file
This is a modified version of an earlier patch by Andi Kleen.
We expect architectures to create JSON files describing the performance
monitoring (PMU) events that each CPU model/family of the architecture
supports.
Following is an example of the JSON file entry for an x86 event:
[
...
{
"EventCode": "0x00",
"UMask": "0x01",
"EventName": "INST_RETIRED.ANY",
"BriefDescription": "Instructions retired from execution.",
"PublicDescription": "Instructions retired from execution.",
"Counter": "Fixed counter 1",
"CounterHTOff": "Fixed counter 1",
"SampleAfterValue": "2000003",
"SampleAfterValue": "2000003",
"MSRIndex": "0",
"MSRValue": "0",
"TakenAlone": "0",
"CounterMask": "0",
"Invert": "0",
"AnyThread": "0",
"EdgeDetect": "0",
"PEBS": "0",
"PRECISE_STORE": "0",
"Errata": "null",
"Offcore": "0"
},
...
]
All the PMU events supported by a CPU model/family must be grouped into
"topics" such as "Pipelining", "Floating-point", "Virtual-memory" etc.
All events belonging to a topic must be placed in a separate JSON file
(eg: "Pipelining.json") and all the topic JSON files for a CPU model must
be in a separate directory.
Eg: for the CPU model "Silvermont_core":
$ ls tools/perf/pmu-events/arch/x86/Silvermont_core
Floating-point.json
Memory.json
Other.json
Pipelining.json
Virtualmemory.json
Finally, to allow multiple CPU models to share a single set of JSON files,
architectures must provide a mapping between a model and its set of events:
$ grep Silvermont tools/perf/pmu-events/arch/x86/mapfile.csv
GenuineIntel-6-4D,V13,Silvermont_core,core
GenuineIntel-6-4C,V13,Silvermont_core,core
which maps each CPU, identified by [vendor, family, model, version, type]
to a directory of JSON files. Thus two (or more) CPU models support the
set of PMU events listed in the directory.
tools/perf/pmu-events/arch/x86/Silvermont_core/
Given this organization of files, the program, jevents:
- locates all JSON files for each CPU-model of the architecture,
- parses all JSON files for the CPU-model and generates a C-style
"PMU-events table" (pmu-events.c) for the model
- locates a mapfile for the architecture
- builds a global table, mapping each model of CPU to the corresponding
PMU-events table.
The 'pmu-events.c' is generated when building perf and added to libperf.a.
The global table pmu_events_map[] table in this pmu-events.c will be used
in perf in a follow-on patch.
If the architecture does not have any JSON files or there is an error in
processing them, an empty mapping file is created. This would allow the
build of perf to proceed even if we are not able to provide aliases for
events.
The parser for JSON files allows parsing Intel style JSON event files. This
allows to use an Intel event list directly with perf. The Intel event lists
can be quite large and are too big to store in unswappable kernel memory.
The conversion from JSON to C-style is straight forward. The parser knows
(very little) Intel specific information, and can be easily extended to
handle fields for other CPUs.
The parser code is partially shared with an independent parsing library,
which is 2-clause BSD licensed. To avoid any conflicts I marked those
files as BSD licensed too. As part of perf they become GPLv2.
Committer notes:
Fixes:
1) Limit maxfds to 512 to avoid nftd() segfaulting on alloca() with a
big rlim_max, as in docker containers - acme
2) Make jevents a hostprog, supporting cross compilation - jolsa
3) Use HOSTCC for jevents final step - acme
4) Define _GNU_SOURCE for asprintf, as we can't use CC's EXTRA_CFLAGS,
that has to have --sysroot on the Android NDK 24 - acme
5) Removed $(srctree)/tools/perf/pmu-events/pmu-events.c from the
'clean' target, it is generated on $(OUTPUT)pmu-events/pmu-events.c,
which is already taken care of in the original patch - acme
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Jiri Olsa <jolsa@redhat.com>
Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Acked-by: Ingo Molnar <mingo@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Cc: linuxppc-dev@lists.ozlabs.org
Link: http://lkml.kernel.org/r/1473978296-20712-3-git-send-email-sukadev@linux.vnet.ibm.com
Link: http://lkml.kernel.org/r/20160927141846.GA6589@krava
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-19 20:39:33 +00:00
|
|
|
static void print_mapping_table_prefix(FILE *outfp)
|
|
|
|
{
|
|
|
|
fprintf(outfp, "struct pmu_events_map pmu_events_map[] = {\n");
|
|
|
|
}
|
|
|
|
|
|
|
|
static void print_mapping_table_suffix(FILE *outfp)
|
|
|
|
{
|
|
|
|
/*
|
|
|
|
* Print the terminating, NULL entry.
|
|
|
|
*/
|
|
|
|
fprintf(outfp, "{\n");
|
|
|
|
fprintf(outfp, "\t.cpuid = 0,\n");
|
|
|
|
fprintf(outfp, "\t.version = 0,\n");
|
|
|
|
fprintf(outfp, "\t.type = 0,\n");
|
|
|
|
fprintf(outfp, "\t.table = 0,\n");
|
|
|
|
fprintf(outfp, "},\n");
|
|
|
|
|
|
|
|
/* and finally, the closing curly bracket for the struct */
|
|
|
|
fprintf(outfp, "};\n");
|
|
|
|
}
|
|
|
|
|
perf jevents: Support test events folder
With the goal of supporting pmu-events test case, introduce support for
a test events folder.
These test events can be used for testing generation of pmu-event tables
and alias creation for any arch.
When running the pmu-events test case, these test events will be used as
the platform-agnostic events, so aliases can be created per-PMU and
validated against known expected values.
To support the test events, add a "testcpu" entry in pmu_events_map[].
The pmu-events test will be able to lookup the events map for "testcpu",
to verify the generated tables against expected values.
The resultant generated pmu-events.c will now look like the following:
struct pmu_event pme_ampere_emag[] = {
{
.name = "ldrex_spec",
.event = "event=0x6c",
.desc = "Exclusive operation spe...",
.topic = "intrinsic",
.long_desc = "Exclusive operation ...",
},
...
};
struct pmu_event pme_test_cpu[] = {
{
.name = "uncore_hisi_ddrc.flux_wcmd",
.event = "event=0x2",
.desc = "DDRC write commands. Unit: hisi_sccl,ddrc ",
.topic = "uncore",
.long_desc = "DDRC write commands",
.pmu = "hisi_sccl,ddrc",
},
{
.name = "unc_cbo_xsnp_response.miss_eviction",
.event = "umask=0x81,event=0x22",
.desc = "Unit: uncore_cbox A cross-core snoop resulted ...",
.topic = "uncore",
.long_desc = "A cross-core snoop resulted from L3 ...",
.pmu = "uncore_cbox",
},
{
.name = "eist_trans",
.event = "umask=0x0,period=200000,event=0x3a",
.desc = "Number of Enhanced Intel SpeedStep(R) ...",
.topic = "other",
},
{
.name = 0,
},
};
struct pmu_events_map pmu_events_map[] = {
...
{
.cpuid = "0x00000000500f0000",
.version = "v1",
.type = "core",
.table = pme_ampere_emag
},
...
{
.cpuid = "testcpu",
.version = "v1",
.type = "core",
.table = pme_test_cpu,
},
{
.cpuid = 0,
.version = 0,
.type = 0,
.table = 0,
},
};
Signed-off-by: John Garry <john.garry@huawei.com>
Acked-by: Jiri Olsa <jolsa@redhat.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: James Clark <james.clark@arm.com>
Cc: Joakim Zhang <qiangqing.zhang@nxp.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Will Deacon <will@kernel.org>
Cc: linuxarm@huawei.com
Link: http://lore.kernel.org/lkml/1584442939-8911-3-git-send-email-john.garry@huawei.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2020-03-17 11:02:14 +00:00
|
|
|
static void print_mapping_test_table(FILE *outfp)
|
|
|
|
{
|
|
|
|
/*
|
|
|
|
* Print the terminating, NULL entry.
|
|
|
|
*/
|
|
|
|
fprintf(outfp, "{\n");
|
|
|
|
fprintf(outfp, "\t.cpuid = \"testcpu\",\n");
|
|
|
|
fprintf(outfp, "\t.version = \"v1\",\n");
|
|
|
|
fprintf(outfp, "\t.type = \"core\",\n");
|
|
|
|
fprintf(outfp, "\t.table = pme_test_cpu,\n");
|
|
|
|
fprintf(outfp, "},\n");
|
|
|
|
}
|
|
|
|
|
perf jevents: Add support for system events tables
Process the JSONs to find support for "system" events, which are not
tied to a specific CPUID.
A "COMPAT" property is now used to match against the namespace ID from
the kernel PMU driver.
The generated pmu-events.c will now have 2 tables:
a. CPU events, as before.
b. New pmu_sys_event_tables[] table, which will have events matched to
specific SoCs.
It will look like this:
struct pmu_event pme_hisilicon_hip09_sys[] = {
{
.name = "cycles",
.compat = "0x00030736",
.event = "event=0",
.desc = "Clock cycles",
.topic = "smmu v3 pmcg",
.long_desc = "Clock cycles",
},
{
.name = "smmuv3_pmcg.l1_tlb",
.compat = "0x00030736",
.event = "event=0x8a",
.desc = "SMMUv3 PMCG l1_tlb. Unit: smmuv3_pmcg ",
.topic = "smmu v3 pmcg",
.long_desc = "SMMUv3 PMCG l1_tlb",
.pmu = "smmuv3_pmcg",
},
...
};
struct pmu_event pme_arm_cortex_a53[] = {
{
.name = "ext_mem_req",
.event = "event=0xc0",
.desc = "External memory request",
.topic = "memory",
},
{
.name = "ext_mem_req_nc",
.event = "event=0xc1",
.desc = "Non-cacheable external memory request",
.topic = "memory",
},
...
};
struct pmu_event pme_hisilicon_hip09_cpu[] = {
{
.name = "l2d_cache_refill_wr",
.event = "event=0x53",
.desc = "L2D cache refill, write",
.topic = "core imp def",
.long_desc = "Attributable Level 2 data cache refill, write",
},
...
};
struct pmu_events_map pmu_events_map[] = {
{
.cpuid = "0x00000000410fd030",
.version = "v1",
.type = "core",
.table = pme_arm_cortex_a53
},
{
.cpuid = "0x00000000480fd010",
.version = "v1",
.type = "core",
.table = pme_hisilicon_hip09_cpu
},
{
.table = 0
},
};
struct pmu_event pme_hisilicon_hip09_cpu[] = {
{
.name = "uncore_hisi_l3c.rd_cpipe",
.event = "event=0",
.desc = "Total read accesses. Unit: hisi_sccl,l3c ",
.topic = "uncore l3c",
.long_desc = "Total read accesses",
.pmu = "hisi_sccl,l3c",
},
{
.name = "uncore_hisi_l3c.wr_cpipe",
.event = "event=0x1",
.desc = "Total write accesses. Unit: hisi_sccl,l3c ",
.topic = "uncore l3c",
.long_desc = "Total write accesses",
.pmu = "hisi_sccl,l3c",
},
...
};
struct pmu_sys_events pmu_sys_event_tables[] = {
{
.table = pme_hisilicon_hip09_sys,
},
...
};
Committer notes:
Added the fix for architectures without PMU events, provided by John
after I reported the build failing in such systems.
Link: https://lore.kernel.org/lkml/650baaf2-36b6-a9e2-ff49-963ef864c1f3@huawei.com/
Signed-off-by: John Garry <john.garry@huawei.com>
Acked-by: Kajol Jain <kjain@linux.ibm.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Ian Rogers <irogers@google.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Joakim Zhang <qiangqing.zhang@nxp.com>
Cc: Kan Liang <kan.liang@linux.intel.com>
Cc: Kim Phillips <kim.phillips@amd.com>
Cc: Leo Yan <leo.yan@linaro.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Shaokun Zhang <zhangshaokun@hisilicon.com>
Cc: Will Deacon <will@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linuxarm@huawei.com
Link: http://lore.kernel.org/lkml/1607080216-36968-3-git-send-email-john.garry@huawei.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2020-12-04 11:10:08 +00:00
|
|
|
static void print_system_event_mapping_table_prefix(FILE *outfp)
|
|
|
|
{
|
|
|
|
fprintf(outfp, "\nstruct pmu_sys_events pmu_sys_event_tables[] = {");
|
|
|
|
}
|
|
|
|
|
|
|
|
static void print_system_event_mapping_table_suffix(FILE *outfp)
|
|
|
|
{
|
|
|
|
fprintf(outfp, "\n\t{\n\t\t.table = 0\n\t},");
|
|
|
|
fprintf(outfp, "\n};\n");
|
|
|
|
}
|
|
|
|
|
|
|
|
static int process_system_event_tables(FILE *outfp)
|
|
|
|
{
|
|
|
|
struct sys_event_table *sys_event_table;
|
|
|
|
|
|
|
|
print_system_event_mapping_table_prefix(outfp);
|
|
|
|
|
|
|
|
list_for_each_entry(sys_event_table, &sys_event_tables, list) {
|
|
|
|
fprintf(outfp, "\n\t{\n\t\t.table = %s,\n\t},",
|
|
|
|
sys_event_table->soc_id);
|
|
|
|
}
|
|
|
|
|
|
|
|
print_system_event_mapping_table_suffix(outfp);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
perf jevents: Program to convert JSON file
This is a modified version of an earlier patch by Andi Kleen.
We expect architectures to create JSON files describing the performance
monitoring (PMU) events that each CPU model/family of the architecture
supports.
Following is an example of the JSON file entry for an x86 event:
[
...
{
"EventCode": "0x00",
"UMask": "0x01",
"EventName": "INST_RETIRED.ANY",
"BriefDescription": "Instructions retired from execution.",
"PublicDescription": "Instructions retired from execution.",
"Counter": "Fixed counter 1",
"CounterHTOff": "Fixed counter 1",
"SampleAfterValue": "2000003",
"SampleAfterValue": "2000003",
"MSRIndex": "0",
"MSRValue": "0",
"TakenAlone": "0",
"CounterMask": "0",
"Invert": "0",
"AnyThread": "0",
"EdgeDetect": "0",
"PEBS": "0",
"PRECISE_STORE": "0",
"Errata": "null",
"Offcore": "0"
},
...
]
All the PMU events supported by a CPU model/family must be grouped into
"topics" such as "Pipelining", "Floating-point", "Virtual-memory" etc.
All events belonging to a topic must be placed in a separate JSON file
(eg: "Pipelining.json") and all the topic JSON files for a CPU model must
be in a separate directory.
Eg: for the CPU model "Silvermont_core":
$ ls tools/perf/pmu-events/arch/x86/Silvermont_core
Floating-point.json
Memory.json
Other.json
Pipelining.json
Virtualmemory.json
Finally, to allow multiple CPU models to share a single set of JSON files,
architectures must provide a mapping between a model and its set of events:
$ grep Silvermont tools/perf/pmu-events/arch/x86/mapfile.csv
GenuineIntel-6-4D,V13,Silvermont_core,core
GenuineIntel-6-4C,V13,Silvermont_core,core
which maps each CPU, identified by [vendor, family, model, version, type]
to a directory of JSON files. Thus two (or more) CPU models support the
set of PMU events listed in the directory.
tools/perf/pmu-events/arch/x86/Silvermont_core/
Given this organization of files, the program, jevents:
- locates all JSON files for each CPU-model of the architecture,
- parses all JSON files for the CPU-model and generates a C-style
"PMU-events table" (pmu-events.c) for the model
- locates a mapfile for the architecture
- builds a global table, mapping each model of CPU to the corresponding
PMU-events table.
The 'pmu-events.c' is generated when building perf and added to libperf.a.
The global table pmu_events_map[] table in this pmu-events.c will be used
in perf in a follow-on patch.
If the architecture does not have any JSON files or there is an error in
processing them, an empty mapping file is created. This would allow the
build of perf to proceed even if we are not able to provide aliases for
events.
The parser for JSON files allows parsing Intel style JSON event files. This
allows to use an Intel event list directly with perf. The Intel event lists
can be quite large and are too big to store in unswappable kernel memory.
The conversion from JSON to C-style is straight forward. The parser knows
(very little) Intel specific information, and can be easily extended to
handle fields for other CPUs.
The parser code is partially shared with an independent parsing library,
which is 2-clause BSD licensed. To avoid any conflicts I marked those
files as BSD licensed too. As part of perf they become GPLv2.
Committer notes:
Fixes:
1) Limit maxfds to 512 to avoid nftd() segfaulting on alloca() with a
big rlim_max, as in docker containers - acme
2) Make jevents a hostprog, supporting cross compilation - jolsa
3) Use HOSTCC for jevents final step - acme
4) Define _GNU_SOURCE for asprintf, as we can't use CC's EXTRA_CFLAGS,
that has to have --sysroot on the Android NDK 24 - acme
5) Removed $(srctree)/tools/perf/pmu-events/pmu-events.c from the
'clean' target, it is generated on $(OUTPUT)pmu-events/pmu-events.c,
which is already taken care of in the original patch - acme
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Jiri Olsa <jolsa@redhat.com>
Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Acked-by: Ingo Molnar <mingo@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Cc: linuxppc-dev@lists.ozlabs.org
Link: http://lkml.kernel.org/r/1473978296-20712-3-git-send-email-sukadev@linux.vnet.ibm.com
Link: http://lkml.kernel.org/r/20160927141846.GA6589@krava
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-19 20:39:33 +00:00
|
|
|
static int process_mapfile(FILE *outfp, char *fpath)
|
|
|
|
{
|
|
|
|
int n = 16384;
|
|
|
|
FILE *mapfp;
|
|
|
|
char *save = NULL;
|
|
|
|
char *line, *p;
|
|
|
|
int line_num;
|
|
|
|
char *tblname;
|
2019-10-16 13:50:17 +00:00
|
|
|
int ret = 0;
|
perf jevents: Program to convert JSON file
This is a modified version of an earlier patch by Andi Kleen.
We expect architectures to create JSON files describing the performance
monitoring (PMU) events that each CPU model/family of the architecture
supports.
Following is an example of the JSON file entry for an x86 event:
[
...
{
"EventCode": "0x00",
"UMask": "0x01",
"EventName": "INST_RETIRED.ANY",
"BriefDescription": "Instructions retired from execution.",
"PublicDescription": "Instructions retired from execution.",
"Counter": "Fixed counter 1",
"CounterHTOff": "Fixed counter 1",
"SampleAfterValue": "2000003",
"SampleAfterValue": "2000003",
"MSRIndex": "0",
"MSRValue": "0",
"TakenAlone": "0",
"CounterMask": "0",
"Invert": "0",
"AnyThread": "0",
"EdgeDetect": "0",
"PEBS": "0",
"PRECISE_STORE": "0",
"Errata": "null",
"Offcore": "0"
},
...
]
All the PMU events supported by a CPU model/family must be grouped into
"topics" such as "Pipelining", "Floating-point", "Virtual-memory" etc.
All events belonging to a topic must be placed in a separate JSON file
(eg: "Pipelining.json") and all the topic JSON files for a CPU model must
be in a separate directory.
Eg: for the CPU model "Silvermont_core":
$ ls tools/perf/pmu-events/arch/x86/Silvermont_core
Floating-point.json
Memory.json
Other.json
Pipelining.json
Virtualmemory.json
Finally, to allow multiple CPU models to share a single set of JSON files,
architectures must provide a mapping between a model and its set of events:
$ grep Silvermont tools/perf/pmu-events/arch/x86/mapfile.csv
GenuineIntel-6-4D,V13,Silvermont_core,core
GenuineIntel-6-4C,V13,Silvermont_core,core
which maps each CPU, identified by [vendor, family, model, version, type]
to a directory of JSON files. Thus two (or more) CPU models support the
set of PMU events listed in the directory.
tools/perf/pmu-events/arch/x86/Silvermont_core/
Given this organization of files, the program, jevents:
- locates all JSON files for each CPU-model of the architecture,
- parses all JSON files for the CPU-model and generates a C-style
"PMU-events table" (pmu-events.c) for the model
- locates a mapfile for the architecture
- builds a global table, mapping each model of CPU to the corresponding
PMU-events table.
The 'pmu-events.c' is generated when building perf and added to libperf.a.
The global table pmu_events_map[] table in this pmu-events.c will be used
in perf in a follow-on patch.
If the architecture does not have any JSON files or there is an error in
processing them, an empty mapping file is created. This would allow the
build of perf to proceed even if we are not able to provide aliases for
events.
The parser for JSON files allows parsing Intel style JSON event files. This
allows to use an Intel event list directly with perf. The Intel event lists
can be quite large and are too big to store in unswappable kernel memory.
The conversion from JSON to C-style is straight forward. The parser knows
(very little) Intel specific information, and can be easily extended to
handle fields for other CPUs.
The parser code is partially shared with an independent parsing library,
which is 2-clause BSD licensed. To avoid any conflicts I marked those
files as BSD licensed too. As part of perf they become GPLv2.
Committer notes:
Fixes:
1) Limit maxfds to 512 to avoid nftd() segfaulting on alloca() with a
big rlim_max, as in docker containers - acme
2) Make jevents a hostprog, supporting cross compilation - jolsa
3) Use HOSTCC for jevents final step - acme
4) Define _GNU_SOURCE for asprintf, as we can't use CC's EXTRA_CFLAGS,
that has to have --sysroot on the Android NDK 24 - acme
5) Removed $(srctree)/tools/perf/pmu-events/pmu-events.c from the
'clean' target, it is generated on $(OUTPUT)pmu-events/pmu-events.c,
which is already taken care of in the original patch - acme
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Jiri Olsa <jolsa@redhat.com>
Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Acked-by: Ingo Molnar <mingo@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Cc: linuxppc-dev@lists.ozlabs.org
Link: http://lkml.kernel.org/r/1473978296-20712-3-git-send-email-sukadev@linux.vnet.ibm.com
Link: http://lkml.kernel.org/r/20160927141846.GA6589@krava
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-19 20:39:33 +00:00
|
|
|
|
|
|
|
pr_info("%s: Processing mapfile %s\n", prog, fpath);
|
|
|
|
|
|
|
|
line = malloc(n);
|
|
|
|
if (!line)
|
|
|
|
return -1;
|
|
|
|
|
|
|
|
mapfp = fopen(fpath, "r");
|
|
|
|
if (!mapfp) {
|
|
|
|
pr_info("%s: Error %s opening %s\n", prog, strerror(errno),
|
|
|
|
fpath);
|
2019-10-16 13:50:17 +00:00
|
|
|
free(line);
|
perf jevents: Program to convert JSON file
This is a modified version of an earlier patch by Andi Kleen.
We expect architectures to create JSON files describing the performance
monitoring (PMU) events that each CPU model/family of the architecture
supports.
Following is an example of the JSON file entry for an x86 event:
[
...
{
"EventCode": "0x00",
"UMask": "0x01",
"EventName": "INST_RETIRED.ANY",
"BriefDescription": "Instructions retired from execution.",
"PublicDescription": "Instructions retired from execution.",
"Counter": "Fixed counter 1",
"CounterHTOff": "Fixed counter 1",
"SampleAfterValue": "2000003",
"SampleAfterValue": "2000003",
"MSRIndex": "0",
"MSRValue": "0",
"TakenAlone": "0",
"CounterMask": "0",
"Invert": "0",
"AnyThread": "0",
"EdgeDetect": "0",
"PEBS": "0",
"PRECISE_STORE": "0",
"Errata": "null",
"Offcore": "0"
},
...
]
All the PMU events supported by a CPU model/family must be grouped into
"topics" such as "Pipelining", "Floating-point", "Virtual-memory" etc.
All events belonging to a topic must be placed in a separate JSON file
(eg: "Pipelining.json") and all the topic JSON files for a CPU model must
be in a separate directory.
Eg: for the CPU model "Silvermont_core":
$ ls tools/perf/pmu-events/arch/x86/Silvermont_core
Floating-point.json
Memory.json
Other.json
Pipelining.json
Virtualmemory.json
Finally, to allow multiple CPU models to share a single set of JSON files,
architectures must provide a mapping between a model and its set of events:
$ grep Silvermont tools/perf/pmu-events/arch/x86/mapfile.csv
GenuineIntel-6-4D,V13,Silvermont_core,core
GenuineIntel-6-4C,V13,Silvermont_core,core
which maps each CPU, identified by [vendor, family, model, version, type]
to a directory of JSON files. Thus two (or more) CPU models support the
set of PMU events listed in the directory.
tools/perf/pmu-events/arch/x86/Silvermont_core/
Given this organization of files, the program, jevents:
- locates all JSON files for each CPU-model of the architecture,
- parses all JSON files for the CPU-model and generates a C-style
"PMU-events table" (pmu-events.c) for the model
- locates a mapfile for the architecture
- builds a global table, mapping each model of CPU to the corresponding
PMU-events table.
The 'pmu-events.c' is generated when building perf and added to libperf.a.
The global table pmu_events_map[] table in this pmu-events.c will be used
in perf in a follow-on patch.
If the architecture does not have any JSON files or there is an error in
processing them, an empty mapping file is created. This would allow the
build of perf to proceed even if we are not able to provide aliases for
events.
The parser for JSON files allows parsing Intel style JSON event files. This
allows to use an Intel event list directly with perf. The Intel event lists
can be quite large and are too big to store in unswappable kernel memory.
The conversion from JSON to C-style is straight forward. The parser knows
(very little) Intel specific information, and can be easily extended to
handle fields for other CPUs.
The parser code is partially shared with an independent parsing library,
which is 2-clause BSD licensed. To avoid any conflicts I marked those
files as BSD licensed too. As part of perf they become GPLv2.
Committer notes:
Fixes:
1) Limit maxfds to 512 to avoid nftd() segfaulting on alloca() with a
big rlim_max, as in docker containers - acme
2) Make jevents a hostprog, supporting cross compilation - jolsa
3) Use HOSTCC for jevents final step - acme
4) Define _GNU_SOURCE for asprintf, as we can't use CC's EXTRA_CFLAGS,
that has to have --sysroot on the Android NDK 24 - acme
5) Removed $(srctree)/tools/perf/pmu-events/pmu-events.c from the
'clean' target, it is generated on $(OUTPUT)pmu-events/pmu-events.c,
which is already taken care of in the original patch - acme
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Jiri Olsa <jolsa@redhat.com>
Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Acked-by: Ingo Molnar <mingo@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Cc: linuxppc-dev@lists.ozlabs.org
Link: http://lkml.kernel.org/r/1473978296-20712-3-git-send-email-sukadev@linux.vnet.ibm.com
Link: http://lkml.kernel.org/r/20160927141846.GA6589@krava
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-19 20:39:33 +00:00
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
|
|
|
|
print_mapping_table_prefix(outfp);
|
|
|
|
|
2016-09-15 22:24:51 +00:00
|
|
|
/* Skip first line (header) */
|
|
|
|
p = fgets(line, n, mapfp);
|
|
|
|
if (!p)
|
|
|
|
goto out;
|
|
|
|
|
|
|
|
line_num = 1;
|
perf jevents: Program to convert JSON file
This is a modified version of an earlier patch by Andi Kleen.
We expect architectures to create JSON files describing the performance
monitoring (PMU) events that each CPU model/family of the architecture
supports.
Following is an example of the JSON file entry for an x86 event:
[
...
{
"EventCode": "0x00",
"UMask": "0x01",
"EventName": "INST_RETIRED.ANY",
"BriefDescription": "Instructions retired from execution.",
"PublicDescription": "Instructions retired from execution.",
"Counter": "Fixed counter 1",
"CounterHTOff": "Fixed counter 1",
"SampleAfterValue": "2000003",
"SampleAfterValue": "2000003",
"MSRIndex": "0",
"MSRValue": "0",
"TakenAlone": "0",
"CounterMask": "0",
"Invert": "0",
"AnyThread": "0",
"EdgeDetect": "0",
"PEBS": "0",
"PRECISE_STORE": "0",
"Errata": "null",
"Offcore": "0"
},
...
]
All the PMU events supported by a CPU model/family must be grouped into
"topics" such as "Pipelining", "Floating-point", "Virtual-memory" etc.
All events belonging to a topic must be placed in a separate JSON file
(eg: "Pipelining.json") and all the topic JSON files for a CPU model must
be in a separate directory.
Eg: for the CPU model "Silvermont_core":
$ ls tools/perf/pmu-events/arch/x86/Silvermont_core
Floating-point.json
Memory.json
Other.json
Pipelining.json
Virtualmemory.json
Finally, to allow multiple CPU models to share a single set of JSON files,
architectures must provide a mapping between a model and its set of events:
$ grep Silvermont tools/perf/pmu-events/arch/x86/mapfile.csv
GenuineIntel-6-4D,V13,Silvermont_core,core
GenuineIntel-6-4C,V13,Silvermont_core,core
which maps each CPU, identified by [vendor, family, model, version, type]
to a directory of JSON files. Thus two (or more) CPU models support the
set of PMU events listed in the directory.
tools/perf/pmu-events/arch/x86/Silvermont_core/
Given this organization of files, the program, jevents:
- locates all JSON files for each CPU-model of the architecture,
- parses all JSON files for the CPU-model and generates a C-style
"PMU-events table" (pmu-events.c) for the model
- locates a mapfile for the architecture
- builds a global table, mapping each model of CPU to the corresponding
PMU-events table.
The 'pmu-events.c' is generated when building perf and added to libperf.a.
The global table pmu_events_map[] table in this pmu-events.c will be used
in perf in a follow-on patch.
If the architecture does not have any JSON files or there is an error in
processing them, an empty mapping file is created. This would allow the
build of perf to proceed even if we are not able to provide aliases for
events.
The parser for JSON files allows parsing Intel style JSON event files. This
allows to use an Intel event list directly with perf. The Intel event lists
can be quite large and are too big to store in unswappable kernel memory.
The conversion from JSON to C-style is straight forward. The parser knows
(very little) Intel specific information, and can be easily extended to
handle fields for other CPUs.
The parser code is partially shared with an independent parsing library,
which is 2-clause BSD licensed. To avoid any conflicts I marked those
files as BSD licensed too. As part of perf they become GPLv2.
Committer notes:
Fixes:
1) Limit maxfds to 512 to avoid nftd() segfaulting on alloca() with a
big rlim_max, as in docker containers - acme
2) Make jevents a hostprog, supporting cross compilation - jolsa
3) Use HOSTCC for jevents final step - acme
4) Define _GNU_SOURCE for asprintf, as we can't use CC's EXTRA_CFLAGS,
that has to have --sysroot on the Android NDK 24 - acme
5) Removed $(srctree)/tools/perf/pmu-events/pmu-events.c from the
'clean' target, it is generated on $(OUTPUT)pmu-events/pmu-events.c,
which is already taken care of in the original patch - acme
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Jiri Olsa <jolsa@redhat.com>
Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Acked-by: Ingo Molnar <mingo@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Cc: linuxppc-dev@lists.ozlabs.org
Link: http://lkml.kernel.org/r/1473978296-20712-3-git-send-email-sukadev@linux.vnet.ibm.com
Link: http://lkml.kernel.org/r/20160927141846.GA6589@krava
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-19 20:39:33 +00:00
|
|
|
while (1) {
|
|
|
|
char *cpuid, *version, *type, *fname;
|
|
|
|
|
|
|
|
line_num++;
|
|
|
|
p = fgets(line, n, mapfp);
|
|
|
|
if (!p)
|
|
|
|
break;
|
|
|
|
|
|
|
|
if (line[0] == '#' || line[0] == '\n')
|
|
|
|
continue;
|
|
|
|
|
|
|
|
if (line[strlen(line)-1] != '\n') {
|
|
|
|
/* TODO Deal with lines longer than 16K */
|
|
|
|
pr_info("%s: Mapfile %s: line %d too long, aborting\n",
|
|
|
|
prog, fpath, line_num);
|
2019-10-16 13:50:17 +00:00
|
|
|
ret = -1;
|
|
|
|
goto out;
|
perf jevents: Program to convert JSON file
This is a modified version of an earlier patch by Andi Kleen.
We expect architectures to create JSON files describing the performance
monitoring (PMU) events that each CPU model/family of the architecture
supports.
Following is an example of the JSON file entry for an x86 event:
[
...
{
"EventCode": "0x00",
"UMask": "0x01",
"EventName": "INST_RETIRED.ANY",
"BriefDescription": "Instructions retired from execution.",
"PublicDescription": "Instructions retired from execution.",
"Counter": "Fixed counter 1",
"CounterHTOff": "Fixed counter 1",
"SampleAfterValue": "2000003",
"SampleAfterValue": "2000003",
"MSRIndex": "0",
"MSRValue": "0",
"TakenAlone": "0",
"CounterMask": "0",
"Invert": "0",
"AnyThread": "0",
"EdgeDetect": "0",
"PEBS": "0",
"PRECISE_STORE": "0",
"Errata": "null",
"Offcore": "0"
},
...
]
All the PMU events supported by a CPU model/family must be grouped into
"topics" such as "Pipelining", "Floating-point", "Virtual-memory" etc.
All events belonging to a topic must be placed in a separate JSON file
(eg: "Pipelining.json") and all the topic JSON files for a CPU model must
be in a separate directory.
Eg: for the CPU model "Silvermont_core":
$ ls tools/perf/pmu-events/arch/x86/Silvermont_core
Floating-point.json
Memory.json
Other.json
Pipelining.json
Virtualmemory.json
Finally, to allow multiple CPU models to share a single set of JSON files,
architectures must provide a mapping between a model and its set of events:
$ grep Silvermont tools/perf/pmu-events/arch/x86/mapfile.csv
GenuineIntel-6-4D,V13,Silvermont_core,core
GenuineIntel-6-4C,V13,Silvermont_core,core
which maps each CPU, identified by [vendor, family, model, version, type]
to a directory of JSON files. Thus two (or more) CPU models support the
set of PMU events listed in the directory.
tools/perf/pmu-events/arch/x86/Silvermont_core/
Given this organization of files, the program, jevents:
- locates all JSON files for each CPU-model of the architecture,
- parses all JSON files for the CPU-model and generates a C-style
"PMU-events table" (pmu-events.c) for the model
- locates a mapfile for the architecture
- builds a global table, mapping each model of CPU to the corresponding
PMU-events table.
The 'pmu-events.c' is generated when building perf and added to libperf.a.
The global table pmu_events_map[] table in this pmu-events.c will be used
in perf in a follow-on patch.
If the architecture does not have any JSON files or there is an error in
processing them, an empty mapping file is created. This would allow the
build of perf to proceed even if we are not able to provide aliases for
events.
The parser for JSON files allows parsing Intel style JSON event files. This
allows to use an Intel event list directly with perf. The Intel event lists
can be quite large and are too big to store in unswappable kernel memory.
The conversion from JSON to C-style is straight forward. The parser knows
(very little) Intel specific information, and can be easily extended to
handle fields for other CPUs.
The parser code is partially shared with an independent parsing library,
which is 2-clause BSD licensed. To avoid any conflicts I marked those
files as BSD licensed too. As part of perf they become GPLv2.
Committer notes:
Fixes:
1) Limit maxfds to 512 to avoid nftd() segfaulting on alloca() with a
big rlim_max, as in docker containers - acme
2) Make jevents a hostprog, supporting cross compilation - jolsa
3) Use HOSTCC for jevents final step - acme
4) Define _GNU_SOURCE for asprintf, as we can't use CC's EXTRA_CFLAGS,
that has to have --sysroot on the Android NDK 24 - acme
5) Removed $(srctree)/tools/perf/pmu-events/pmu-events.c from the
'clean' target, it is generated on $(OUTPUT)pmu-events/pmu-events.c,
which is already taken care of in the original patch - acme
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Jiri Olsa <jolsa@redhat.com>
Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Acked-by: Ingo Molnar <mingo@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Cc: linuxppc-dev@lists.ozlabs.org
Link: http://lkml.kernel.org/r/1473978296-20712-3-git-send-email-sukadev@linux.vnet.ibm.com
Link: http://lkml.kernel.org/r/20160927141846.GA6589@krava
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-19 20:39:33 +00:00
|
|
|
}
|
|
|
|
line[strlen(line)-1] = '\0';
|
|
|
|
|
2017-12-04 14:57:28 +00:00
|
|
|
cpuid = fixregex(strtok_r(p, ",", &save));
|
perf jevents: Program to convert JSON file
This is a modified version of an earlier patch by Andi Kleen.
We expect architectures to create JSON files describing the performance
monitoring (PMU) events that each CPU model/family of the architecture
supports.
Following is an example of the JSON file entry for an x86 event:
[
...
{
"EventCode": "0x00",
"UMask": "0x01",
"EventName": "INST_RETIRED.ANY",
"BriefDescription": "Instructions retired from execution.",
"PublicDescription": "Instructions retired from execution.",
"Counter": "Fixed counter 1",
"CounterHTOff": "Fixed counter 1",
"SampleAfterValue": "2000003",
"SampleAfterValue": "2000003",
"MSRIndex": "0",
"MSRValue": "0",
"TakenAlone": "0",
"CounterMask": "0",
"Invert": "0",
"AnyThread": "0",
"EdgeDetect": "0",
"PEBS": "0",
"PRECISE_STORE": "0",
"Errata": "null",
"Offcore": "0"
},
...
]
All the PMU events supported by a CPU model/family must be grouped into
"topics" such as "Pipelining", "Floating-point", "Virtual-memory" etc.
All events belonging to a topic must be placed in a separate JSON file
(eg: "Pipelining.json") and all the topic JSON files for a CPU model must
be in a separate directory.
Eg: for the CPU model "Silvermont_core":
$ ls tools/perf/pmu-events/arch/x86/Silvermont_core
Floating-point.json
Memory.json
Other.json
Pipelining.json
Virtualmemory.json
Finally, to allow multiple CPU models to share a single set of JSON files,
architectures must provide a mapping between a model and its set of events:
$ grep Silvermont tools/perf/pmu-events/arch/x86/mapfile.csv
GenuineIntel-6-4D,V13,Silvermont_core,core
GenuineIntel-6-4C,V13,Silvermont_core,core
which maps each CPU, identified by [vendor, family, model, version, type]
to a directory of JSON files. Thus two (or more) CPU models support the
set of PMU events listed in the directory.
tools/perf/pmu-events/arch/x86/Silvermont_core/
Given this organization of files, the program, jevents:
- locates all JSON files for each CPU-model of the architecture,
- parses all JSON files for the CPU-model and generates a C-style
"PMU-events table" (pmu-events.c) for the model
- locates a mapfile for the architecture
- builds a global table, mapping each model of CPU to the corresponding
PMU-events table.
The 'pmu-events.c' is generated when building perf and added to libperf.a.
The global table pmu_events_map[] table in this pmu-events.c will be used
in perf in a follow-on patch.
If the architecture does not have any JSON files or there is an error in
processing them, an empty mapping file is created. This would allow the
build of perf to proceed even if we are not able to provide aliases for
events.
The parser for JSON files allows parsing Intel style JSON event files. This
allows to use an Intel event list directly with perf. The Intel event lists
can be quite large and are too big to store in unswappable kernel memory.
The conversion from JSON to C-style is straight forward. The parser knows
(very little) Intel specific information, and can be easily extended to
handle fields for other CPUs.
The parser code is partially shared with an independent parsing library,
which is 2-clause BSD licensed. To avoid any conflicts I marked those
files as BSD licensed too. As part of perf they become GPLv2.
Committer notes:
Fixes:
1) Limit maxfds to 512 to avoid nftd() segfaulting on alloca() with a
big rlim_max, as in docker containers - acme
2) Make jevents a hostprog, supporting cross compilation - jolsa
3) Use HOSTCC for jevents final step - acme
4) Define _GNU_SOURCE for asprintf, as we can't use CC's EXTRA_CFLAGS,
that has to have --sysroot on the Android NDK 24 - acme
5) Removed $(srctree)/tools/perf/pmu-events/pmu-events.c from the
'clean' target, it is generated on $(OUTPUT)pmu-events/pmu-events.c,
which is already taken care of in the original patch - acme
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Jiri Olsa <jolsa@redhat.com>
Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Acked-by: Ingo Molnar <mingo@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Cc: linuxppc-dev@lists.ozlabs.org
Link: http://lkml.kernel.org/r/1473978296-20712-3-git-send-email-sukadev@linux.vnet.ibm.com
Link: http://lkml.kernel.org/r/20160927141846.GA6589@krava
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-19 20:39:33 +00:00
|
|
|
version = strtok_r(NULL, ",", &save);
|
|
|
|
fname = strtok_r(NULL, ",", &save);
|
|
|
|
type = strtok_r(NULL, ",", &save);
|
|
|
|
|
|
|
|
tblname = file_name_to_table_name(fname);
|
|
|
|
fprintf(outfp, "{\n");
|
|
|
|
fprintf(outfp, "\t.cpuid = \"%s\",\n", cpuid);
|
|
|
|
fprintf(outfp, "\t.version = \"%s\",\n", version);
|
|
|
|
fprintf(outfp, "\t.type = \"%s\",\n", type);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* CHECK: We can't use the type (eg "core") field in the
|
|
|
|
* table name. For us to do that, we need to somehow tweak
|
|
|
|
* the other caller of file_name_to_table(), process_json()
|
|
|
|
* to determine the type. process_json() file has no way
|
|
|
|
* of knowing these are "core" events unless file name has
|
|
|
|
* core in it. If filename has core in it, we can safely
|
|
|
|
* ignore the type field here also.
|
|
|
|
*/
|
|
|
|
fprintf(outfp, "\t.table = %s\n", tblname);
|
|
|
|
fprintf(outfp, "},\n");
|
|
|
|
}
|
|
|
|
|
2016-09-15 22:24:51 +00:00
|
|
|
out:
|
perf jevents: Support test events folder
With the goal of supporting pmu-events test case, introduce support for
a test events folder.
These test events can be used for testing generation of pmu-event tables
and alias creation for any arch.
When running the pmu-events test case, these test events will be used as
the platform-agnostic events, so aliases can be created per-PMU and
validated against known expected values.
To support the test events, add a "testcpu" entry in pmu_events_map[].
The pmu-events test will be able to lookup the events map for "testcpu",
to verify the generated tables against expected values.
The resultant generated pmu-events.c will now look like the following:
struct pmu_event pme_ampere_emag[] = {
{
.name = "ldrex_spec",
.event = "event=0x6c",
.desc = "Exclusive operation spe...",
.topic = "intrinsic",
.long_desc = "Exclusive operation ...",
},
...
};
struct pmu_event pme_test_cpu[] = {
{
.name = "uncore_hisi_ddrc.flux_wcmd",
.event = "event=0x2",
.desc = "DDRC write commands. Unit: hisi_sccl,ddrc ",
.topic = "uncore",
.long_desc = "DDRC write commands",
.pmu = "hisi_sccl,ddrc",
},
{
.name = "unc_cbo_xsnp_response.miss_eviction",
.event = "umask=0x81,event=0x22",
.desc = "Unit: uncore_cbox A cross-core snoop resulted ...",
.topic = "uncore",
.long_desc = "A cross-core snoop resulted from L3 ...",
.pmu = "uncore_cbox",
},
{
.name = "eist_trans",
.event = "umask=0x0,period=200000,event=0x3a",
.desc = "Number of Enhanced Intel SpeedStep(R) ...",
.topic = "other",
},
{
.name = 0,
},
};
struct pmu_events_map pmu_events_map[] = {
...
{
.cpuid = "0x00000000500f0000",
.version = "v1",
.type = "core",
.table = pme_ampere_emag
},
...
{
.cpuid = "testcpu",
.version = "v1",
.type = "core",
.table = pme_test_cpu,
},
{
.cpuid = 0,
.version = 0,
.type = 0,
.table = 0,
},
};
Signed-off-by: John Garry <john.garry@huawei.com>
Acked-by: Jiri Olsa <jolsa@redhat.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: James Clark <james.clark@arm.com>
Cc: Joakim Zhang <qiangqing.zhang@nxp.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Will Deacon <will@kernel.org>
Cc: linuxarm@huawei.com
Link: http://lore.kernel.org/lkml/1584442939-8911-3-git-send-email-john.garry@huawei.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2020-03-17 11:02:14 +00:00
|
|
|
print_mapping_test_table(outfp);
|
perf jevents: Program to convert JSON file
This is a modified version of an earlier patch by Andi Kleen.
We expect architectures to create JSON files describing the performance
monitoring (PMU) events that each CPU model/family of the architecture
supports.
Following is an example of the JSON file entry for an x86 event:
[
...
{
"EventCode": "0x00",
"UMask": "0x01",
"EventName": "INST_RETIRED.ANY",
"BriefDescription": "Instructions retired from execution.",
"PublicDescription": "Instructions retired from execution.",
"Counter": "Fixed counter 1",
"CounterHTOff": "Fixed counter 1",
"SampleAfterValue": "2000003",
"SampleAfterValue": "2000003",
"MSRIndex": "0",
"MSRValue": "0",
"TakenAlone": "0",
"CounterMask": "0",
"Invert": "0",
"AnyThread": "0",
"EdgeDetect": "0",
"PEBS": "0",
"PRECISE_STORE": "0",
"Errata": "null",
"Offcore": "0"
},
...
]
All the PMU events supported by a CPU model/family must be grouped into
"topics" such as "Pipelining", "Floating-point", "Virtual-memory" etc.
All events belonging to a topic must be placed in a separate JSON file
(eg: "Pipelining.json") and all the topic JSON files for a CPU model must
be in a separate directory.
Eg: for the CPU model "Silvermont_core":
$ ls tools/perf/pmu-events/arch/x86/Silvermont_core
Floating-point.json
Memory.json
Other.json
Pipelining.json
Virtualmemory.json
Finally, to allow multiple CPU models to share a single set of JSON files,
architectures must provide a mapping between a model and its set of events:
$ grep Silvermont tools/perf/pmu-events/arch/x86/mapfile.csv
GenuineIntel-6-4D,V13,Silvermont_core,core
GenuineIntel-6-4C,V13,Silvermont_core,core
which maps each CPU, identified by [vendor, family, model, version, type]
to a directory of JSON files. Thus two (or more) CPU models support the
set of PMU events listed in the directory.
tools/perf/pmu-events/arch/x86/Silvermont_core/
Given this organization of files, the program, jevents:
- locates all JSON files for each CPU-model of the architecture,
- parses all JSON files for the CPU-model and generates a C-style
"PMU-events table" (pmu-events.c) for the model
- locates a mapfile for the architecture
- builds a global table, mapping each model of CPU to the corresponding
PMU-events table.
The 'pmu-events.c' is generated when building perf and added to libperf.a.
The global table pmu_events_map[] table in this pmu-events.c will be used
in perf in a follow-on patch.
If the architecture does not have any JSON files or there is an error in
processing them, an empty mapping file is created. This would allow the
build of perf to proceed even if we are not able to provide aliases for
events.
The parser for JSON files allows parsing Intel style JSON event files. This
allows to use an Intel event list directly with perf. The Intel event lists
can be quite large and are too big to store in unswappable kernel memory.
The conversion from JSON to C-style is straight forward. The parser knows
(very little) Intel specific information, and can be easily extended to
handle fields for other CPUs.
The parser code is partially shared with an independent parsing library,
which is 2-clause BSD licensed. To avoid any conflicts I marked those
files as BSD licensed too. As part of perf they become GPLv2.
Committer notes:
Fixes:
1) Limit maxfds to 512 to avoid nftd() segfaulting on alloca() with a
big rlim_max, as in docker containers - acme
2) Make jevents a hostprog, supporting cross compilation - jolsa
3) Use HOSTCC for jevents final step - acme
4) Define _GNU_SOURCE for asprintf, as we can't use CC's EXTRA_CFLAGS,
that has to have --sysroot on the Android NDK 24 - acme
5) Removed $(srctree)/tools/perf/pmu-events/pmu-events.c from the
'clean' target, it is generated on $(OUTPUT)pmu-events/pmu-events.c,
which is already taken care of in the original patch - acme
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Jiri Olsa <jolsa@redhat.com>
Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Acked-by: Ingo Molnar <mingo@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Cc: linuxppc-dev@lists.ozlabs.org
Link: http://lkml.kernel.org/r/1473978296-20712-3-git-send-email-sukadev@linux.vnet.ibm.com
Link: http://lkml.kernel.org/r/20160927141846.GA6589@krava
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-19 20:39:33 +00:00
|
|
|
print_mapping_table_suffix(outfp);
|
2019-10-16 13:50:17 +00:00
|
|
|
fclose(mapfp);
|
|
|
|
free(line);
|
|
|
|
return ret;
|
perf jevents: Program to convert JSON file
This is a modified version of an earlier patch by Andi Kleen.
We expect architectures to create JSON files describing the performance
monitoring (PMU) events that each CPU model/family of the architecture
supports.
Following is an example of the JSON file entry for an x86 event:
[
...
{
"EventCode": "0x00",
"UMask": "0x01",
"EventName": "INST_RETIRED.ANY",
"BriefDescription": "Instructions retired from execution.",
"PublicDescription": "Instructions retired from execution.",
"Counter": "Fixed counter 1",
"CounterHTOff": "Fixed counter 1",
"SampleAfterValue": "2000003",
"SampleAfterValue": "2000003",
"MSRIndex": "0",
"MSRValue": "0",
"TakenAlone": "0",
"CounterMask": "0",
"Invert": "0",
"AnyThread": "0",
"EdgeDetect": "0",
"PEBS": "0",
"PRECISE_STORE": "0",
"Errata": "null",
"Offcore": "0"
},
...
]
All the PMU events supported by a CPU model/family must be grouped into
"topics" such as "Pipelining", "Floating-point", "Virtual-memory" etc.
All events belonging to a topic must be placed in a separate JSON file
(eg: "Pipelining.json") and all the topic JSON files for a CPU model must
be in a separate directory.
Eg: for the CPU model "Silvermont_core":
$ ls tools/perf/pmu-events/arch/x86/Silvermont_core
Floating-point.json
Memory.json
Other.json
Pipelining.json
Virtualmemory.json
Finally, to allow multiple CPU models to share a single set of JSON files,
architectures must provide a mapping between a model and its set of events:
$ grep Silvermont tools/perf/pmu-events/arch/x86/mapfile.csv
GenuineIntel-6-4D,V13,Silvermont_core,core
GenuineIntel-6-4C,V13,Silvermont_core,core
which maps each CPU, identified by [vendor, family, model, version, type]
to a directory of JSON files. Thus two (or more) CPU models support the
set of PMU events listed in the directory.
tools/perf/pmu-events/arch/x86/Silvermont_core/
Given this organization of files, the program, jevents:
- locates all JSON files for each CPU-model of the architecture,
- parses all JSON files for the CPU-model and generates a C-style
"PMU-events table" (pmu-events.c) for the model
- locates a mapfile for the architecture
- builds a global table, mapping each model of CPU to the corresponding
PMU-events table.
The 'pmu-events.c' is generated when building perf and added to libperf.a.
The global table pmu_events_map[] table in this pmu-events.c will be used
in perf in a follow-on patch.
If the architecture does not have any JSON files or there is an error in
processing them, an empty mapping file is created. This would allow the
build of perf to proceed even if we are not able to provide aliases for
events.
The parser for JSON files allows parsing Intel style JSON event files. This
allows to use an Intel event list directly with perf. The Intel event lists
can be quite large and are too big to store in unswappable kernel memory.
The conversion from JSON to C-style is straight forward. The parser knows
(very little) Intel specific information, and can be easily extended to
handle fields for other CPUs.
The parser code is partially shared with an independent parsing library,
which is 2-clause BSD licensed. To avoid any conflicts I marked those
files as BSD licensed too. As part of perf they become GPLv2.
Committer notes:
Fixes:
1) Limit maxfds to 512 to avoid nftd() segfaulting on alloca() with a
big rlim_max, as in docker containers - acme
2) Make jevents a hostprog, supporting cross compilation - jolsa
3) Use HOSTCC for jevents final step - acme
4) Define _GNU_SOURCE for asprintf, as we can't use CC's EXTRA_CFLAGS,
that has to have --sysroot on the Android NDK 24 - acme
5) Removed $(srctree)/tools/perf/pmu-events/pmu-events.c from the
'clean' target, it is generated on $(OUTPUT)pmu-events/pmu-events.c,
which is already taken care of in the original patch - acme
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Jiri Olsa <jolsa@redhat.com>
Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Acked-by: Ingo Molnar <mingo@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Cc: linuxppc-dev@lists.ozlabs.org
Link: http://lkml.kernel.org/r/1473978296-20712-3-git-send-email-sukadev@linux.vnet.ibm.com
Link: http://lkml.kernel.org/r/20160927141846.GA6589@krava
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-19 20:39:33 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* If we fail to locate/process JSON and map files, create a NULL mapping
|
|
|
|
* table. This would at least allow perf to build even if we can't find/use
|
|
|
|
* the aliases.
|
|
|
|
*/
|
|
|
|
static void create_empty_mapping(const char *output_file)
|
|
|
|
{
|
|
|
|
FILE *outfp;
|
|
|
|
|
|
|
|
pr_info("%s: Creating empty pmu_events_map[] table\n", prog);
|
|
|
|
|
|
|
|
/* Truncate file to clear any partial writes to it */
|
|
|
|
outfp = fopen(output_file, "w");
|
|
|
|
if (!outfp) {
|
|
|
|
perror("fopen()");
|
|
|
|
_Exit(1);
|
|
|
|
}
|
|
|
|
|
2019-06-25 17:31:22 +00:00
|
|
|
fprintf(outfp, "#include \"pmu-events/pmu-events.h\"\n");
|
perf jevents: Program to convert JSON file
This is a modified version of an earlier patch by Andi Kleen.
We expect architectures to create JSON files describing the performance
monitoring (PMU) events that each CPU model/family of the architecture
supports.
Following is an example of the JSON file entry for an x86 event:
[
...
{
"EventCode": "0x00",
"UMask": "0x01",
"EventName": "INST_RETIRED.ANY",
"BriefDescription": "Instructions retired from execution.",
"PublicDescription": "Instructions retired from execution.",
"Counter": "Fixed counter 1",
"CounterHTOff": "Fixed counter 1",
"SampleAfterValue": "2000003",
"SampleAfterValue": "2000003",
"MSRIndex": "0",
"MSRValue": "0",
"TakenAlone": "0",
"CounterMask": "0",
"Invert": "0",
"AnyThread": "0",
"EdgeDetect": "0",
"PEBS": "0",
"PRECISE_STORE": "0",
"Errata": "null",
"Offcore": "0"
},
...
]
All the PMU events supported by a CPU model/family must be grouped into
"topics" such as "Pipelining", "Floating-point", "Virtual-memory" etc.
All events belonging to a topic must be placed in a separate JSON file
(eg: "Pipelining.json") and all the topic JSON files for a CPU model must
be in a separate directory.
Eg: for the CPU model "Silvermont_core":
$ ls tools/perf/pmu-events/arch/x86/Silvermont_core
Floating-point.json
Memory.json
Other.json
Pipelining.json
Virtualmemory.json
Finally, to allow multiple CPU models to share a single set of JSON files,
architectures must provide a mapping between a model and its set of events:
$ grep Silvermont tools/perf/pmu-events/arch/x86/mapfile.csv
GenuineIntel-6-4D,V13,Silvermont_core,core
GenuineIntel-6-4C,V13,Silvermont_core,core
which maps each CPU, identified by [vendor, family, model, version, type]
to a directory of JSON files. Thus two (or more) CPU models support the
set of PMU events listed in the directory.
tools/perf/pmu-events/arch/x86/Silvermont_core/
Given this organization of files, the program, jevents:
- locates all JSON files for each CPU-model of the architecture,
- parses all JSON files for the CPU-model and generates a C-style
"PMU-events table" (pmu-events.c) for the model
- locates a mapfile for the architecture
- builds a global table, mapping each model of CPU to the corresponding
PMU-events table.
The 'pmu-events.c' is generated when building perf and added to libperf.a.
The global table pmu_events_map[] table in this pmu-events.c will be used
in perf in a follow-on patch.
If the architecture does not have any JSON files or there is an error in
processing them, an empty mapping file is created. This would allow the
build of perf to proceed even if we are not able to provide aliases for
events.
The parser for JSON files allows parsing Intel style JSON event files. This
allows to use an Intel event list directly with perf. The Intel event lists
can be quite large and are too big to store in unswappable kernel memory.
The conversion from JSON to C-style is straight forward. The parser knows
(very little) Intel specific information, and can be easily extended to
handle fields for other CPUs.
The parser code is partially shared with an independent parsing library,
which is 2-clause BSD licensed. To avoid any conflicts I marked those
files as BSD licensed too. As part of perf they become GPLv2.
Committer notes:
Fixes:
1) Limit maxfds to 512 to avoid nftd() segfaulting on alloca() with a
big rlim_max, as in docker containers - acme
2) Make jevents a hostprog, supporting cross compilation - jolsa
3) Use HOSTCC for jevents final step - acme
4) Define _GNU_SOURCE for asprintf, as we can't use CC's EXTRA_CFLAGS,
that has to have --sysroot on the Android NDK 24 - acme
5) Removed $(srctree)/tools/perf/pmu-events/pmu-events.c from the
'clean' target, it is generated on $(OUTPUT)pmu-events/pmu-events.c,
which is already taken care of in the original patch - acme
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Jiri Olsa <jolsa@redhat.com>
Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Acked-by: Ingo Molnar <mingo@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Cc: linuxppc-dev@lists.ozlabs.org
Link: http://lkml.kernel.org/r/1473978296-20712-3-git-send-email-sukadev@linux.vnet.ibm.com
Link: http://lkml.kernel.org/r/20160927141846.GA6589@krava
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-19 20:39:33 +00:00
|
|
|
print_mapping_table_prefix(outfp);
|
|
|
|
print_mapping_table_suffix(outfp);
|
perf jevents: Add support for system events tables
Process the JSONs to find support for "system" events, which are not
tied to a specific CPUID.
A "COMPAT" property is now used to match against the namespace ID from
the kernel PMU driver.
The generated pmu-events.c will now have 2 tables:
a. CPU events, as before.
b. New pmu_sys_event_tables[] table, which will have events matched to
specific SoCs.
It will look like this:
struct pmu_event pme_hisilicon_hip09_sys[] = {
{
.name = "cycles",
.compat = "0x00030736",
.event = "event=0",
.desc = "Clock cycles",
.topic = "smmu v3 pmcg",
.long_desc = "Clock cycles",
},
{
.name = "smmuv3_pmcg.l1_tlb",
.compat = "0x00030736",
.event = "event=0x8a",
.desc = "SMMUv3 PMCG l1_tlb. Unit: smmuv3_pmcg ",
.topic = "smmu v3 pmcg",
.long_desc = "SMMUv3 PMCG l1_tlb",
.pmu = "smmuv3_pmcg",
},
...
};
struct pmu_event pme_arm_cortex_a53[] = {
{
.name = "ext_mem_req",
.event = "event=0xc0",
.desc = "External memory request",
.topic = "memory",
},
{
.name = "ext_mem_req_nc",
.event = "event=0xc1",
.desc = "Non-cacheable external memory request",
.topic = "memory",
},
...
};
struct pmu_event pme_hisilicon_hip09_cpu[] = {
{
.name = "l2d_cache_refill_wr",
.event = "event=0x53",
.desc = "L2D cache refill, write",
.topic = "core imp def",
.long_desc = "Attributable Level 2 data cache refill, write",
},
...
};
struct pmu_events_map pmu_events_map[] = {
{
.cpuid = "0x00000000410fd030",
.version = "v1",
.type = "core",
.table = pme_arm_cortex_a53
},
{
.cpuid = "0x00000000480fd010",
.version = "v1",
.type = "core",
.table = pme_hisilicon_hip09_cpu
},
{
.table = 0
},
};
struct pmu_event pme_hisilicon_hip09_cpu[] = {
{
.name = "uncore_hisi_l3c.rd_cpipe",
.event = "event=0",
.desc = "Total read accesses. Unit: hisi_sccl,l3c ",
.topic = "uncore l3c",
.long_desc = "Total read accesses",
.pmu = "hisi_sccl,l3c",
},
{
.name = "uncore_hisi_l3c.wr_cpipe",
.event = "event=0x1",
.desc = "Total write accesses. Unit: hisi_sccl,l3c ",
.topic = "uncore l3c",
.long_desc = "Total write accesses",
.pmu = "hisi_sccl,l3c",
},
...
};
struct pmu_sys_events pmu_sys_event_tables[] = {
{
.table = pme_hisilicon_hip09_sys,
},
...
};
Committer notes:
Added the fix for architectures without PMU events, provided by John
after I reported the build failing in such systems.
Link: https://lore.kernel.org/lkml/650baaf2-36b6-a9e2-ff49-963ef864c1f3@huawei.com/
Signed-off-by: John Garry <john.garry@huawei.com>
Acked-by: Kajol Jain <kjain@linux.ibm.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Ian Rogers <irogers@google.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Joakim Zhang <qiangqing.zhang@nxp.com>
Cc: Kan Liang <kan.liang@linux.intel.com>
Cc: Kim Phillips <kim.phillips@amd.com>
Cc: Leo Yan <leo.yan@linaro.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Shaokun Zhang <zhangshaokun@hisilicon.com>
Cc: Will Deacon <will@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linuxarm@huawei.com
Link: http://lore.kernel.org/lkml/1607080216-36968-3-git-send-email-john.garry@huawei.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2020-12-04 11:10:08 +00:00
|
|
|
print_system_event_mapping_table_prefix(outfp);
|
|
|
|
print_system_event_mapping_table_suffix(outfp);
|
perf jevents: Program to convert JSON file
This is a modified version of an earlier patch by Andi Kleen.
We expect architectures to create JSON files describing the performance
monitoring (PMU) events that each CPU model/family of the architecture
supports.
Following is an example of the JSON file entry for an x86 event:
[
...
{
"EventCode": "0x00",
"UMask": "0x01",
"EventName": "INST_RETIRED.ANY",
"BriefDescription": "Instructions retired from execution.",
"PublicDescription": "Instructions retired from execution.",
"Counter": "Fixed counter 1",
"CounterHTOff": "Fixed counter 1",
"SampleAfterValue": "2000003",
"SampleAfterValue": "2000003",
"MSRIndex": "0",
"MSRValue": "0",
"TakenAlone": "0",
"CounterMask": "0",
"Invert": "0",
"AnyThread": "0",
"EdgeDetect": "0",
"PEBS": "0",
"PRECISE_STORE": "0",
"Errata": "null",
"Offcore": "0"
},
...
]
All the PMU events supported by a CPU model/family must be grouped into
"topics" such as "Pipelining", "Floating-point", "Virtual-memory" etc.
All events belonging to a topic must be placed in a separate JSON file
(eg: "Pipelining.json") and all the topic JSON files for a CPU model must
be in a separate directory.
Eg: for the CPU model "Silvermont_core":
$ ls tools/perf/pmu-events/arch/x86/Silvermont_core
Floating-point.json
Memory.json
Other.json
Pipelining.json
Virtualmemory.json
Finally, to allow multiple CPU models to share a single set of JSON files,
architectures must provide a mapping between a model and its set of events:
$ grep Silvermont tools/perf/pmu-events/arch/x86/mapfile.csv
GenuineIntel-6-4D,V13,Silvermont_core,core
GenuineIntel-6-4C,V13,Silvermont_core,core
which maps each CPU, identified by [vendor, family, model, version, type]
to a directory of JSON files. Thus two (or more) CPU models support the
set of PMU events listed in the directory.
tools/perf/pmu-events/arch/x86/Silvermont_core/
Given this organization of files, the program, jevents:
- locates all JSON files for each CPU-model of the architecture,
- parses all JSON files for the CPU-model and generates a C-style
"PMU-events table" (pmu-events.c) for the model
- locates a mapfile for the architecture
- builds a global table, mapping each model of CPU to the corresponding
PMU-events table.
The 'pmu-events.c' is generated when building perf and added to libperf.a.
The global table pmu_events_map[] table in this pmu-events.c will be used
in perf in a follow-on patch.
If the architecture does not have any JSON files or there is an error in
processing them, an empty mapping file is created. This would allow the
build of perf to proceed even if we are not able to provide aliases for
events.
The parser for JSON files allows parsing Intel style JSON event files. This
allows to use an Intel event list directly with perf. The Intel event lists
can be quite large and are too big to store in unswappable kernel memory.
The conversion from JSON to C-style is straight forward. The parser knows
(very little) Intel specific information, and can be easily extended to
handle fields for other CPUs.
The parser code is partially shared with an independent parsing library,
which is 2-clause BSD licensed. To avoid any conflicts I marked those
files as BSD licensed too. As part of perf they become GPLv2.
Committer notes:
Fixes:
1) Limit maxfds to 512 to avoid nftd() segfaulting on alloca() with a
big rlim_max, as in docker containers - acme
2) Make jevents a hostprog, supporting cross compilation - jolsa
3) Use HOSTCC for jevents final step - acme
4) Define _GNU_SOURCE for asprintf, as we can't use CC's EXTRA_CFLAGS,
that has to have --sysroot on the Android NDK 24 - acme
5) Removed $(srctree)/tools/perf/pmu-events/pmu-events.c from the
'clean' target, it is generated on $(OUTPUT)pmu-events/pmu-events.c,
which is already taken care of in the original patch - acme
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Jiri Olsa <jolsa@redhat.com>
Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Acked-by: Ingo Molnar <mingo@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Cc: linuxppc-dev@lists.ozlabs.org
Link: http://lkml.kernel.org/r/1473978296-20712-3-git-send-email-sukadev@linux.vnet.ibm.com
Link: http://lkml.kernel.org/r/20160927141846.GA6589@krava
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-19 20:39:33 +00:00
|
|
|
fclose(outfp);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int get_maxfds(void)
|
|
|
|
{
|
|
|
|
struct rlimit rlim;
|
|
|
|
|
|
|
|
if (getrlimit(RLIMIT_NOFILE, &rlim) == 0)
|
|
|
|
return min((int)rlim.rlim_max / 2, 512);
|
|
|
|
|
|
|
|
return 512;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* nftw() doesn't let us pass an argument to the processing function,
|
|
|
|
* so use a global variables.
|
|
|
|
*/
|
|
|
|
static FILE *eventsfp;
|
|
|
|
static char *mapfile;
|
|
|
|
|
perf vendor events: Add support for pmu events vendor subdirectory
For some architectures (like arm), it is required to support a vendor
subdirectory and not locate all the JSONs for a specific vendor in the
same folder.
This is because all the events for the same vendor will be placed in the
same pmu events table, which may cause conflict. This conflict would be
in the instance that a vendor's custom implemented events do have the
same meaning on different platforms, so events in the pmu table would
conflict. In addition, per list command may show events which are not
even supported for a given platform.
This patch adds support for a arch/vendor/platform directory hierarchy,
while maintaining backwards-compatibility for existing arch/platform
structure. In this, each platform would always have its own pmu events
table.
In generated file pmu_events.c, each platform table name is in the
format pme{_vendor}_platform, like this:
struct pmu_events_map pmu_events_map[] = {
{
.cpuid = "0x00000000420f5160",
.version = "v1",
.type = "core",
.table = pme_cavium_thunderx2
},
{
.cpuid = 0,
.version = 0,
.type = 0,
.table = 0,
},
};
Signed-off-by: John Garry <john.garry@huawei.com>
Acked-by: Jiri Olsa <jolsa@kernel.org>
Tested-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Ganapatrao Kulkarni <ganapatrao.kulkarni@cavium.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Shaokun Zhang <zhangshaokun@hisilicon.com>
Cc: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: William Cohen <wcohen@redhat.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linuxarm@huawei.com
Link: http://lkml.kernel.org/r/1520506716-197429-5-git-send-email-john.garry@huawei.com
Link: http://lkml.kernel.org/r/1521047452-28565-1-git-send-email-john.garry@huawei.com
[ Add missing limits.h include, fixing the build on at least all Alpine Linux versions tested (3.4 to 3.7 + edge), ]
[ Applied a patch to fix reading ./.. directories in XFS, see second Link tag ]
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2018-03-08 10:58:29 +00:00
|
|
|
static int is_leaf_dir(const char *fpath)
|
|
|
|
{
|
|
|
|
DIR *d;
|
|
|
|
struct dirent *dir;
|
|
|
|
int res = 1;
|
|
|
|
|
|
|
|
d = opendir(fpath);
|
|
|
|
if (!d)
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
while ((dir = readdir(d)) != NULL) {
|
|
|
|
if (!strcmp(dir->d_name, ".") || !strcmp(dir->d_name, ".."))
|
|
|
|
continue;
|
|
|
|
|
|
|
|
if (dir->d_type == DT_DIR) {
|
|
|
|
res = 0;
|
|
|
|
break;
|
|
|
|
} else if (dir->d_type == DT_UNKNOWN) {
|
|
|
|
char path[PATH_MAX];
|
|
|
|
struct stat st;
|
|
|
|
|
|
|
|
sprintf(path, "%s/%s", fpath, dir->d_name);
|
|
|
|
if (stat(path, &st))
|
|
|
|
break;
|
|
|
|
|
|
|
|
if (S_ISDIR(st.st_mode)) {
|
|
|
|
res = 0;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
closedir(d);
|
|
|
|
|
|
|
|
return res;
|
|
|
|
}
|
|
|
|
|
perf vendor events: Add support for arch standard events
For some architectures (like arm), there are architecture- defined
events. Sometimes these events may be "recommended" according to the
architecture standard, in that the implementer is free ignore the
"recommendation" and create its custom event.
This patch adds support for parsing standard events from arch-defined
JSONs, and fixing up vendor events when they have implemented these
events as standard.
Support is also ensured that the vendor may implement their own custom
events.
A new step is added to the pmu events parsing to fix up the vendor
events with the arch-standard events.
The arch-defined JSONs must be placed in the arch root folder for
preprocessing prior to tree JSON processing.
In the vendor JSON, to specify that the arch event is supported, the
keyword "ArchStdEvent" should be used, like this:
[
{
"ArchStdEvent": "L1D_CACHE_WR",
},
]
Matching is based on the "EventName" field in the architecture JSON.
No other JSON objects are strictly required. However, for other objects
added, these take precedence over architecture defined standard events,
thus supporting separate events which have the same event code.
Signed-off-by: John Garry <john.garry@huawei.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Ganapatrao Kulkarni <ganapatrao.kulkarni@cavium.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Shaokun Zhang <zhangshaokun@hisilicon.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: William Cohen <wcohen@redhat.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linuxarm@huawei.com
Link: http://lkml.kernel.org/r/1520506716-197429-8-git-send-email-john.garry@huawei.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2018-03-08 10:58:32 +00:00
|
|
|
static int is_json_file(const char *name)
|
|
|
|
{
|
|
|
|
const char *suffix;
|
|
|
|
|
|
|
|
if (strlen(name) < 5)
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
suffix = name + strlen(name) - 5;
|
|
|
|
|
|
|
|
if (strncmp(suffix, ".json", 5) == 0)
|
|
|
|
return 1;
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int preprocess_arch_std_files(const char *fpath, const struct stat *sb,
|
|
|
|
int typeflag, struct FTW *ftwbuf)
|
|
|
|
{
|
|
|
|
int level = ftwbuf->level;
|
|
|
|
int is_file = typeflag == FTW_F;
|
|
|
|
|
|
|
|
if (level == 1 && is_file && is_json_file(fpath))
|
|
|
|
return json_events(fpath, save_arch_std_events, (void *)sb);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
perf jevents: Program to convert JSON file
This is a modified version of an earlier patch by Andi Kleen.
We expect architectures to create JSON files describing the performance
monitoring (PMU) events that each CPU model/family of the architecture
supports.
Following is an example of the JSON file entry for an x86 event:
[
...
{
"EventCode": "0x00",
"UMask": "0x01",
"EventName": "INST_RETIRED.ANY",
"BriefDescription": "Instructions retired from execution.",
"PublicDescription": "Instructions retired from execution.",
"Counter": "Fixed counter 1",
"CounterHTOff": "Fixed counter 1",
"SampleAfterValue": "2000003",
"SampleAfterValue": "2000003",
"MSRIndex": "0",
"MSRValue": "0",
"TakenAlone": "0",
"CounterMask": "0",
"Invert": "0",
"AnyThread": "0",
"EdgeDetect": "0",
"PEBS": "0",
"PRECISE_STORE": "0",
"Errata": "null",
"Offcore": "0"
},
...
]
All the PMU events supported by a CPU model/family must be grouped into
"topics" such as "Pipelining", "Floating-point", "Virtual-memory" etc.
All events belonging to a topic must be placed in a separate JSON file
(eg: "Pipelining.json") and all the topic JSON files for a CPU model must
be in a separate directory.
Eg: for the CPU model "Silvermont_core":
$ ls tools/perf/pmu-events/arch/x86/Silvermont_core
Floating-point.json
Memory.json
Other.json
Pipelining.json
Virtualmemory.json
Finally, to allow multiple CPU models to share a single set of JSON files,
architectures must provide a mapping between a model and its set of events:
$ grep Silvermont tools/perf/pmu-events/arch/x86/mapfile.csv
GenuineIntel-6-4D,V13,Silvermont_core,core
GenuineIntel-6-4C,V13,Silvermont_core,core
which maps each CPU, identified by [vendor, family, model, version, type]
to a directory of JSON files. Thus two (or more) CPU models support the
set of PMU events listed in the directory.
tools/perf/pmu-events/arch/x86/Silvermont_core/
Given this organization of files, the program, jevents:
- locates all JSON files for each CPU-model of the architecture,
- parses all JSON files for the CPU-model and generates a C-style
"PMU-events table" (pmu-events.c) for the model
- locates a mapfile for the architecture
- builds a global table, mapping each model of CPU to the corresponding
PMU-events table.
The 'pmu-events.c' is generated when building perf and added to libperf.a.
The global table pmu_events_map[] table in this pmu-events.c will be used
in perf in a follow-on patch.
If the architecture does not have any JSON files or there is an error in
processing them, an empty mapping file is created. This would allow the
build of perf to proceed even if we are not able to provide aliases for
events.
The parser for JSON files allows parsing Intel style JSON event files. This
allows to use an Intel event list directly with perf. The Intel event lists
can be quite large and are too big to store in unswappable kernel memory.
The conversion from JSON to C-style is straight forward. The parser knows
(very little) Intel specific information, and can be easily extended to
handle fields for other CPUs.
The parser code is partially shared with an independent parsing library,
which is 2-clause BSD licensed. To avoid any conflicts I marked those
files as BSD licensed too. As part of perf they become GPLv2.
Committer notes:
Fixes:
1) Limit maxfds to 512 to avoid nftd() segfaulting on alloca() with a
big rlim_max, as in docker containers - acme
2) Make jevents a hostprog, supporting cross compilation - jolsa
3) Use HOSTCC for jevents final step - acme
4) Define _GNU_SOURCE for asprintf, as we can't use CC's EXTRA_CFLAGS,
that has to have --sysroot on the Android NDK 24 - acme
5) Removed $(srctree)/tools/perf/pmu-events/pmu-events.c from the
'clean' target, it is generated on $(OUTPUT)pmu-events/pmu-events.c,
which is already taken care of in the original patch - acme
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Jiri Olsa <jolsa@redhat.com>
Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Acked-by: Ingo Molnar <mingo@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Cc: linuxppc-dev@lists.ozlabs.org
Link: http://lkml.kernel.org/r/1473978296-20712-3-git-send-email-sukadev@linux.vnet.ibm.com
Link: http://lkml.kernel.org/r/20160927141846.GA6589@krava
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-19 20:39:33 +00:00
|
|
|
static int process_one_file(const char *fpath, const struct stat *sb,
|
|
|
|
int typeflag, struct FTW *ftwbuf)
|
|
|
|
{
|
perf vendor events: Add support for pmu events vendor subdirectory
For some architectures (like arm), it is required to support a vendor
subdirectory and not locate all the JSONs for a specific vendor in the
same folder.
This is because all the events for the same vendor will be placed in the
same pmu events table, which may cause conflict. This conflict would be
in the instance that a vendor's custom implemented events do have the
same meaning on different platforms, so events in the pmu table would
conflict. In addition, per list command may show events which are not
even supported for a given platform.
This patch adds support for a arch/vendor/platform directory hierarchy,
while maintaining backwards-compatibility for existing arch/platform
structure. In this, each platform would always have its own pmu events
table.
In generated file pmu_events.c, each platform table name is in the
format pme{_vendor}_platform, like this:
struct pmu_events_map pmu_events_map[] = {
{
.cpuid = "0x00000000420f5160",
.version = "v1",
.type = "core",
.table = pme_cavium_thunderx2
},
{
.cpuid = 0,
.version = 0,
.type = 0,
.table = 0,
},
};
Signed-off-by: John Garry <john.garry@huawei.com>
Acked-by: Jiri Olsa <jolsa@kernel.org>
Tested-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Ganapatrao Kulkarni <ganapatrao.kulkarni@cavium.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Shaokun Zhang <zhangshaokun@hisilicon.com>
Cc: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: William Cohen <wcohen@redhat.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linuxarm@huawei.com
Link: http://lkml.kernel.org/r/1520506716-197429-5-git-send-email-john.garry@huawei.com
Link: http://lkml.kernel.org/r/1521047452-28565-1-git-send-email-john.garry@huawei.com
[ Add missing limits.h include, fixing the build on at least all Alpine Linux versions tested (3.4 to 3.7 + edge), ]
[ Applied a patch to fix reading ./.. directories in XFS, see second Link tag ]
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2018-03-08 10:58:29 +00:00
|
|
|
char *tblname, *bname;
|
perf jevents: Program to convert JSON file
This is a modified version of an earlier patch by Andi Kleen.
We expect architectures to create JSON files describing the performance
monitoring (PMU) events that each CPU model/family of the architecture
supports.
Following is an example of the JSON file entry for an x86 event:
[
...
{
"EventCode": "0x00",
"UMask": "0x01",
"EventName": "INST_RETIRED.ANY",
"BriefDescription": "Instructions retired from execution.",
"PublicDescription": "Instructions retired from execution.",
"Counter": "Fixed counter 1",
"CounterHTOff": "Fixed counter 1",
"SampleAfterValue": "2000003",
"SampleAfterValue": "2000003",
"MSRIndex": "0",
"MSRValue": "0",
"TakenAlone": "0",
"CounterMask": "0",
"Invert": "0",
"AnyThread": "0",
"EdgeDetect": "0",
"PEBS": "0",
"PRECISE_STORE": "0",
"Errata": "null",
"Offcore": "0"
},
...
]
All the PMU events supported by a CPU model/family must be grouped into
"topics" such as "Pipelining", "Floating-point", "Virtual-memory" etc.
All events belonging to a topic must be placed in a separate JSON file
(eg: "Pipelining.json") and all the topic JSON files for a CPU model must
be in a separate directory.
Eg: for the CPU model "Silvermont_core":
$ ls tools/perf/pmu-events/arch/x86/Silvermont_core
Floating-point.json
Memory.json
Other.json
Pipelining.json
Virtualmemory.json
Finally, to allow multiple CPU models to share a single set of JSON files,
architectures must provide a mapping between a model and its set of events:
$ grep Silvermont tools/perf/pmu-events/arch/x86/mapfile.csv
GenuineIntel-6-4D,V13,Silvermont_core,core
GenuineIntel-6-4C,V13,Silvermont_core,core
which maps each CPU, identified by [vendor, family, model, version, type]
to a directory of JSON files. Thus two (or more) CPU models support the
set of PMU events listed in the directory.
tools/perf/pmu-events/arch/x86/Silvermont_core/
Given this organization of files, the program, jevents:
- locates all JSON files for each CPU-model of the architecture,
- parses all JSON files for the CPU-model and generates a C-style
"PMU-events table" (pmu-events.c) for the model
- locates a mapfile for the architecture
- builds a global table, mapping each model of CPU to the corresponding
PMU-events table.
The 'pmu-events.c' is generated when building perf and added to libperf.a.
The global table pmu_events_map[] table in this pmu-events.c will be used
in perf in a follow-on patch.
If the architecture does not have any JSON files or there is an error in
processing them, an empty mapping file is created. This would allow the
build of perf to proceed even if we are not able to provide aliases for
events.
The parser for JSON files allows parsing Intel style JSON event files. This
allows to use an Intel event list directly with perf. The Intel event lists
can be quite large and are too big to store in unswappable kernel memory.
The conversion from JSON to C-style is straight forward. The parser knows
(very little) Intel specific information, and can be easily extended to
handle fields for other CPUs.
The parser code is partially shared with an independent parsing library,
which is 2-clause BSD licensed. To avoid any conflicts I marked those
files as BSD licensed too. As part of perf they become GPLv2.
Committer notes:
Fixes:
1) Limit maxfds to 512 to avoid nftd() segfaulting on alloca() with a
big rlim_max, as in docker containers - acme
2) Make jevents a hostprog, supporting cross compilation - jolsa
3) Use HOSTCC for jevents final step - acme
4) Define _GNU_SOURCE for asprintf, as we can't use CC's EXTRA_CFLAGS,
that has to have --sysroot on the Android NDK 24 - acme
5) Removed $(srctree)/tools/perf/pmu-events/pmu-events.c from the
'clean' target, it is generated on $(OUTPUT)pmu-events/pmu-events.c,
which is already taken care of in the original patch - acme
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Jiri Olsa <jolsa@redhat.com>
Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Acked-by: Ingo Molnar <mingo@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Cc: linuxppc-dev@lists.ozlabs.org
Link: http://lkml.kernel.org/r/1473978296-20712-3-git-send-email-sukadev@linux.vnet.ibm.com
Link: http://lkml.kernel.org/r/20160927141846.GA6589@krava
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-19 20:39:33 +00:00
|
|
|
int is_dir = typeflag == FTW_D;
|
|
|
|
int is_file = typeflag == FTW_F;
|
|
|
|
int level = ftwbuf->level;
|
|
|
|
int err = 0;
|
|
|
|
|
2020-12-04 11:10:07 +00:00
|
|
|
if (level >= 2 && is_dir) {
|
|
|
|
int count = 0;
|
perf vendor events: Add support for pmu events vendor subdirectory
For some architectures (like arm), it is required to support a vendor
subdirectory and not locate all the JSONs for a specific vendor in the
same folder.
This is because all the events for the same vendor will be placed in the
same pmu events table, which may cause conflict. This conflict would be
in the instance that a vendor's custom implemented events do have the
same meaning on different platforms, so events in the pmu table would
conflict. In addition, per list command may show events which are not
even supported for a given platform.
This patch adds support for a arch/vendor/platform directory hierarchy,
while maintaining backwards-compatibility for existing arch/platform
structure. In this, each platform would always have its own pmu events
table.
In generated file pmu_events.c, each platform table name is in the
format pme{_vendor}_platform, like this:
struct pmu_events_map pmu_events_map[] = {
{
.cpuid = "0x00000000420f5160",
.version = "v1",
.type = "core",
.table = pme_cavium_thunderx2
},
{
.cpuid = 0,
.version = 0,
.type = 0,
.table = 0,
},
};
Signed-off-by: John Garry <john.garry@huawei.com>
Acked-by: Jiri Olsa <jolsa@kernel.org>
Tested-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Ganapatrao Kulkarni <ganapatrao.kulkarni@cavium.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Shaokun Zhang <zhangshaokun@hisilicon.com>
Cc: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: William Cohen <wcohen@redhat.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linuxarm@huawei.com
Link: http://lkml.kernel.org/r/1520506716-197429-5-git-send-email-john.garry@huawei.com
Link: http://lkml.kernel.org/r/1521047452-28565-1-git-send-email-john.garry@huawei.com
[ Add missing limits.h include, fixing the build on at least all Alpine Linux versions tested (3.4 to 3.7 + edge), ]
[ Applied a patch to fix reading ./.. directories in XFS, see second Link tag ]
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2018-03-08 10:58:29 +00:00
|
|
|
/*
|
|
|
|
* For level 2 directory, bname will include parent name,
|
|
|
|
* like vendor/platform. So search back from platform dir
|
|
|
|
* to find this.
|
2020-12-04 11:10:07 +00:00
|
|
|
* Something similar for level 3 directory, but we're a PMU
|
|
|
|
* category folder, like vendor/platform/cpu.
|
perf vendor events: Add support for pmu events vendor subdirectory
For some architectures (like arm), it is required to support a vendor
subdirectory and not locate all the JSONs for a specific vendor in the
same folder.
This is because all the events for the same vendor will be placed in the
same pmu events table, which may cause conflict. This conflict would be
in the instance that a vendor's custom implemented events do have the
same meaning on different platforms, so events in the pmu table would
conflict. In addition, per list command may show events which are not
even supported for a given platform.
This patch adds support for a arch/vendor/platform directory hierarchy,
while maintaining backwards-compatibility for existing arch/platform
structure. In this, each platform would always have its own pmu events
table.
In generated file pmu_events.c, each platform table name is in the
format pme{_vendor}_platform, like this:
struct pmu_events_map pmu_events_map[] = {
{
.cpuid = "0x00000000420f5160",
.version = "v1",
.type = "core",
.table = pme_cavium_thunderx2
},
{
.cpuid = 0,
.version = 0,
.type = 0,
.table = 0,
},
};
Signed-off-by: John Garry <john.garry@huawei.com>
Acked-by: Jiri Olsa <jolsa@kernel.org>
Tested-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Ganapatrao Kulkarni <ganapatrao.kulkarni@cavium.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Shaokun Zhang <zhangshaokun@hisilicon.com>
Cc: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: William Cohen <wcohen@redhat.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linuxarm@huawei.com
Link: http://lkml.kernel.org/r/1520506716-197429-5-git-send-email-john.garry@huawei.com
Link: http://lkml.kernel.org/r/1521047452-28565-1-git-send-email-john.garry@huawei.com
[ Add missing limits.h include, fixing the build on at least all Alpine Linux versions tested (3.4 to 3.7 + edge), ]
[ Applied a patch to fix reading ./.. directories in XFS, see second Link tag ]
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2018-03-08 10:58:29 +00:00
|
|
|
*/
|
|
|
|
bname = (char *) fpath + ftwbuf->base - 2;
|
|
|
|
for (;;) {
|
|
|
|
if (*bname == '/')
|
2020-12-04 11:10:07 +00:00
|
|
|
count++;
|
|
|
|
if (count == level - 1)
|
perf vendor events: Add support for pmu events vendor subdirectory
For some architectures (like arm), it is required to support a vendor
subdirectory and not locate all the JSONs for a specific vendor in the
same folder.
This is because all the events for the same vendor will be placed in the
same pmu events table, which may cause conflict. This conflict would be
in the instance that a vendor's custom implemented events do have the
same meaning on different platforms, so events in the pmu table would
conflict. In addition, per list command may show events which are not
even supported for a given platform.
This patch adds support for a arch/vendor/platform directory hierarchy,
while maintaining backwards-compatibility for existing arch/platform
structure. In this, each platform would always have its own pmu events
table.
In generated file pmu_events.c, each platform table name is in the
format pme{_vendor}_platform, like this:
struct pmu_events_map pmu_events_map[] = {
{
.cpuid = "0x00000000420f5160",
.version = "v1",
.type = "core",
.table = pme_cavium_thunderx2
},
{
.cpuid = 0,
.version = 0,
.type = 0,
.table = 0,
},
};
Signed-off-by: John Garry <john.garry@huawei.com>
Acked-by: Jiri Olsa <jolsa@kernel.org>
Tested-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Ganapatrao Kulkarni <ganapatrao.kulkarni@cavium.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Shaokun Zhang <zhangshaokun@hisilicon.com>
Cc: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: William Cohen <wcohen@redhat.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linuxarm@huawei.com
Link: http://lkml.kernel.org/r/1520506716-197429-5-git-send-email-john.garry@huawei.com
Link: http://lkml.kernel.org/r/1521047452-28565-1-git-send-email-john.garry@huawei.com
[ Add missing limits.h include, fixing the build on at least all Alpine Linux versions tested (3.4 to 3.7 + edge), ]
[ Applied a patch to fix reading ./.. directories in XFS, see second Link tag ]
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2018-03-08 10:58:29 +00:00
|
|
|
break;
|
|
|
|
bname--;
|
|
|
|
}
|
|
|
|
bname++;
|
|
|
|
} else
|
|
|
|
bname = (char *) fpath + ftwbuf->base;
|
|
|
|
|
perf jevents: Program to convert JSON file
This is a modified version of an earlier patch by Andi Kleen.
We expect architectures to create JSON files describing the performance
monitoring (PMU) events that each CPU model/family of the architecture
supports.
Following is an example of the JSON file entry for an x86 event:
[
...
{
"EventCode": "0x00",
"UMask": "0x01",
"EventName": "INST_RETIRED.ANY",
"BriefDescription": "Instructions retired from execution.",
"PublicDescription": "Instructions retired from execution.",
"Counter": "Fixed counter 1",
"CounterHTOff": "Fixed counter 1",
"SampleAfterValue": "2000003",
"SampleAfterValue": "2000003",
"MSRIndex": "0",
"MSRValue": "0",
"TakenAlone": "0",
"CounterMask": "0",
"Invert": "0",
"AnyThread": "0",
"EdgeDetect": "0",
"PEBS": "0",
"PRECISE_STORE": "0",
"Errata": "null",
"Offcore": "0"
},
...
]
All the PMU events supported by a CPU model/family must be grouped into
"topics" such as "Pipelining", "Floating-point", "Virtual-memory" etc.
All events belonging to a topic must be placed in a separate JSON file
(eg: "Pipelining.json") and all the topic JSON files for a CPU model must
be in a separate directory.
Eg: for the CPU model "Silvermont_core":
$ ls tools/perf/pmu-events/arch/x86/Silvermont_core
Floating-point.json
Memory.json
Other.json
Pipelining.json
Virtualmemory.json
Finally, to allow multiple CPU models to share a single set of JSON files,
architectures must provide a mapping between a model and its set of events:
$ grep Silvermont tools/perf/pmu-events/arch/x86/mapfile.csv
GenuineIntel-6-4D,V13,Silvermont_core,core
GenuineIntel-6-4C,V13,Silvermont_core,core
which maps each CPU, identified by [vendor, family, model, version, type]
to a directory of JSON files. Thus two (or more) CPU models support the
set of PMU events listed in the directory.
tools/perf/pmu-events/arch/x86/Silvermont_core/
Given this organization of files, the program, jevents:
- locates all JSON files for each CPU-model of the architecture,
- parses all JSON files for the CPU-model and generates a C-style
"PMU-events table" (pmu-events.c) for the model
- locates a mapfile for the architecture
- builds a global table, mapping each model of CPU to the corresponding
PMU-events table.
The 'pmu-events.c' is generated when building perf and added to libperf.a.
The global table pmu_events_map[] table in this pmu-events.c will be used
in perf in a follow-on patch.
If the architecture does not have any JSON files or there is an error in
processing them, an empty mapping file is created. This would allow the
build of perf to proceed even if we are not able to provide aliases for
events.
The parser for JSON files allows parsing Intel style JSON event files. This
allows to use an Intel event list directly with perf. The Intel event lists
can be quite large and are too big to store in unswappable kernel memory.
The conversion from JSON to C-style is straight forward. The parser knows
(very little) Intel specific information, and can be easily extended to
handle fields for other CPUs.
The parser code is partially shared with an independent parsing library,
which is 2-clause BSD licensed. To avoid any conflicts I marked those
files as BSD licensed too. As part of perf they become GPLv2.
Committer notes:
Fixes:
1) Limit maxfds to 512 to avoid nftd() segfaulting on alloca() with a
big rlim_max, as in docker containers - acme
2) Make jevents a hostprog, supporting cross compilation - jolsa
3) Use HOSTCC for jevents final step - acme
4) Define _GNU_SOURCE for asprintf, as we can't use CC's EXTRA_CFLAGS,
that has to have --sysroot on the Android NDK 24 - acme
5) Removed $(srctree)/tools/perf/pmu-events/pmu-events.c from the
'clean' target, it is generated on $(OUTPUT)pmu-events/pmu-events.c,
which is already taken care of in the original patch - acme
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Jiri Olsa <jolsa@redhat.com>
Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Acked-by: Ingo Molnar <mingo@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Cc: linuxppc-dev@lists.ozlabs.org
Link: http://lkml.kernel.org/r/1473978296-20712-3-git-send-email-sukadev@linux.vnet.ibm.com
Link: http://lkml.kernel.org/r/20160927141846.GA6589@krava
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-19 20:39:33 +00:00
|
|
|
pr_debug("%s %d %7jd %-20s %s\n",
|
|
|
|
is_file ? "f" : is_dir ? "d" : "x",
|
|
|
|
level, sb->st_size, bname, fpath);
|
|
|
|
|
perf vendor events: Add support for pmu events vendor subdirectory
For some architectures (like arm), it is required to support a vendor
subdirectory and not locate all the JSONs for a specific vendor in the
same folder.
This is because all the events for the same vendor will be placed in the
same pmu events table, which may cause conflict. This conflict would be
in the instance that a vendor's custom implemented events do have the
same meaning on different platforms, so events in the pmu table would
conflict. In addition, per list command may show events which are not
even supported for a given platform.
This patch adds support for a arch/vendor/platform directory hierarchy,
while maintaining backwards-compatibility for existing arch/platform
structure. In this, each platform would always have its own pmu events
table.
In generated file pmu_events.c, each platform table name is in the
format pme{_vendor}_platform, like this:
struct pmu_events_map pmu_events_map[] = {
{
.cpuid = "0x00000000420f5160",
.version = "v1",
.type = "core",
.table = pme_cavium_thunderx2
},
{
.cpuid = 0,
.version = 0,
.type = 0,
.table = 0,
},
};
Signed-off-by: John Garry <john.garry@huawei.com>
Acked-by: Jiri Olsa <jolsa@kernel.org>
Tested-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Ganapatrao Kulkarni <ganapatrao.kulkarni@cavium.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Shaokun Zhang <zhangshaokun@hisilicon.com>
Cc: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: William Cohen <wcohen@redhat.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linuxarm@huawei.com
Link: http://lkml.kernel.org/r/1520506716-197429-5-git-send-email-john.garry@huawei.com
Link: http://lkml.kernel.org/r/1521047452-28565-1-git-send-email-john.garry@huawei.com
[ Add missing limits.h include, fixing the build on at least all Alpine Linux versions tested (3.4 to 3.7 + edge), ]
[ Applied a patch to fix reading ./.. directories in XFS, see second Link tag ]
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2018-03-08 10:58:29 +00:00
|
|
|
/* base dir or too deep */
|
2020-12-04 11:10:07 +00:00
|
|
|
if (level == 0 || level > 4)
|
perf jevents: Program to convert JSON file
This is a modified version of an earlier patch by Andi Kleen.
We expect architectures to create JSON files describing the performance
monitoring (PMU) events that each CPU model/family of the architecture
supports.
Following is an example of the JSON file entry for an x86 event:
[
...
{
"EventCode": "0x00",
"UMask": "0x01",
"EventName": "INST_RETIRED.ANY",
"BriefDescription": "Instructions retired from execution.",
"PublicDescription": "Instructions retired from execution.",
"Counter": "Fixed counter 1",
"CounterHTOff": "Fixed counter 1",
"SampleAfterValue": "2000003",
"SampleAfterValue": "2000003",
"MSRIndex": "0",
"MSRValue": "0",
"TakenAlone": "0",
"CounterMask": "0",
"Invert": "0",
"AnyThread": "0",
"EdgeDetect": "0",
"PEBS": "0",
"PRECISE_STORE": "0",
"Errata": "null",
"Offcore": "0"
},
...
]
All the PMU events supported by a CPU model/family must be grouped into
"topics" such as "Pipelining", "Floating-point", "Virtual-memory" etc.
All events belonging to a topic must be placed in a separate JSON file
(eg: "Pipelining.json") and all the topic JSON files for a CPU model must
be in a separate directory.
Eg: for the CPU model "Silvermont_core":
$ ls tools/perf/pmu-events/arch/x86/Silvermont_core
Floating-point.json
Memory.json
Other.json
Pipelining.json
Virtualmemory.json
Finally, to allow multiple CPU models to share a single set of JSON files,
architectures must provide a mapping between a model and its set of events:
$ grep Silvermont tools/perf/pmu-events/arch/x86/mapfile.csv
GenuineIntel-6-4D,V13,Silvermont_core,core
GenuineIntel-6-4C,V13,Silvermont_core,core
which maps each CPU, identified by [vendor, family, model, version, type]
to a directory of JSON files. Thus two (or more) CPU models support the
set of PMU events listed in the directory.
tools/perf/pmu-events/arch/x86/Silvermont_core/
Given this organization of files, the program, jevents:
- locates all JSON files for each CPU-model of the architecture,
- parses all JSON files for the CPU-model and generates a C-style
"PMU-events table" (pmu-events.c) for the model
- locates a mapfile for the architecture
- builds a global table, mapping each model of CPU to the corresponding
PMU-events table.
The 'pmu-events.c' is generated when building perf and added to libperf.a.
The global table pmu_events_map[] table in this pmu-events.c will be used
in perf in a follow-on patch.
If the architecture does not have any JSON files or there is an error in
processing them, an empty mapping file is created. This would allow the
build of perf to proceed even if we are not able to provide aliases for
events.
The parser for JSON files allows parsing Intel style JSON event files. This
allows to use an Intel event list directly with perf. The Intel event lists
can be quite large and are too big to store in unswappable kernel memory.
The conversion from JSON to C-style is straight forward. The parser knows
(very little) Intel specific information, and can be easily extended to
handle fields for other CPUs.
The parser code is partially shared with an independent parsing library,
which is 2-clause BSD licensed. To avoid any conflicts I marked those
files as BSD licensed too. As part of perf they become GPLv2.
Committer notes:
Fixes:
1) Limit maxfds to 512 to avoid nftd() segfaulting on alloca() with a
big rlim_max, as in docker containers - acme
2) Make jevents a hostprog, supporting cross compilation - jolsa
3) Use HOSTCC for jevents final step - acme
4) Define _GNU_SOURCE for asprintf, as we can't use CC's EXTRA_CFLAGS,
that has to have --sysroot on the Android NDK 24 - acme
5) Removed $(srctree)/tools/perf/pmu-events/pmu-events.c from the
'clean' target, it is generated on $(OUTPUT)pmu-events/pmu-events.c,
which is already taken care of in the original patch - acme
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Jiri Olsa <jolsa@redhat.com>
Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Acked-by: Ingo Molnar <mingo@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Cc: linuxppc-dev@lists.ozlabs.org
Link: http://lkml.kernel.org/r/1473978296-20712-3-git-send-email-sukadev@linux.vnet.ibm.com
Link: http://lkml.kernel.org/r/20160927141846.GA6589@krava
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-19 20:39:33 +00:00
|
|
|
return 0;
|
|
|
|
|
perf vendor events: Add support for pmu events vendor subdirectory
For some architectures (like arm), it is required to support a vendor
subdirectory and not locate all the JSONs for a specific vendor in the
same folder.
This is because all the events for the same vendor will be placed in the
same pmu events table, which may cause conflict. This conflict would be
in the instance that a vendor's custom implemented events do have the
same meaning on different platforms, so events in the pmu table would
conflict. In addition, per list command may show events which are not
even supported for a given platform.
This patch adds support for a arch/vendor/platform directory hierarchy,
while maintaining backwards-compatibility for existing arch/platform
structure. In this, each platform would always have its own pmu events
table.
In generated file pmu_events.c, each platform table name is in the
format pme{_vendor}_platform, like this:
struct pmu_events_map pmu_events_map[] = {
{
.cpuid = "0x00000000420f5160",
.version = "v1",
.type = "core",
.table = pme_cavium_thunderx2
},
{
.cpuid = 0,
.version = 0,
.type = 0,
.table = 0,
},
};
Signed-off-by: John Garry <john.garry@huawei.com>
Acked-by: Jiri Olsa <jolsa@kernel.org>
Tested-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Ganapatrao Kulkarni <ganapatrao.kulkarni@cavium.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Shaokun Zhang <zhangshaokun@hisilicon.com>
Cc: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: William Cohen <wcohen@redhat.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linuxarm@huawei.com
Link: http://lkml.kernel.org/r/1520506716-197429-5-git-send-email-john.garry@huawei.com
Link: http://lkml.kernel.org/r/1521047452-28565-1-git-send-email-john.garry@huawei.com
[ Add missing limits.h include, fixing the build on at least all Alpine Linux versions tested (3.4 to 3.7 + edge), ]
[ Applied a patch to fix reading ./.. directories in XFS, see second Link tag ]
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2018-03-08 10:58:29 +00:00
|
|
|
|
perf jevents: Program to convert JSON file
This is a modified version of an earlier patch by Andi Kleen.
We expect architectures to create JSON files describing the performance
monitoring (PMU) events that each CPU model/family of the architecture
supports.
Following is an example of the JSON file entry for an x86 event:
[
...
{
"EventCode": "0x00",
"UMask": "0x01",
"EventName": "INST_RETIRED.ANY",
"BriefDescription": "Instructions retired from execution.",
"PublicDescription": "Instructions retired from execution.",
"Counter": "Fixed counter 1",
"CounterHTOff": "Fixed counter 1",
"SampleAfterValue": "2000003",
"SampleAfterValue": "2000003",
"MSRIndex": "0",
"MSRValue": "0",
"TakenAlone": "0",
"CounterMask": "0",
"Invert": "0",
"AnyThread": "0",
"EdgeDetect": "0",
"PEBS": "0",
"PRECISE_STORE": "0",
"Errata": "null",
"Offcore": "0"
},
...
]
All the PMU events supported by a CPU model/family must be grouped into
"topics" such as "Pipelining", "Floating-point", "Virtual-memory" etc.
All events belonging to a topic must be placed in a separate JSON file
(eg: "Pipelining.json") and all the topic JSON files for a CPU model must
be in a separate directory.
Eg: for the CPU model "Silvermont_core":
$ ls tools/perf/pmu-events/arch/x86/Silvermont_core
Floating-point.json
Memory.json
Other.json
Pipelining.json
Virtualmemory.json
Finally, to allow multiple CPU models to share a single set of JSON files,
architectures must provide a mapping between a model and its set of events:
$ grep Silvermont tools/perf/pmu-events/arch/x86/mapfile.csv
GenuineIntel-6-4D,V13,Silvermont_core,core
GenuineIntel-6-4C,V13,Silvermont_core,core
which maps each CPU, identified by [vendor, family, model, version, type]
to a directory of JSON files. Thus two (or more) CPU models support the
set of PMU events listed in the directory.
tools/perf/pmu-events/arch/x86/Silvermont_core/
Given this organization of files, the program, jevents:
- locates all JSON files for each CPU-model of the architecture,
- parses all JSON files for the CPU-model and generates a C-style
"PMU-events table" (pmu-events.c) for the model
- locates a mapfile for the architecture
- builds a global table, mapping each model of CPU to the corresponding
PMU-events table.
The 'pmu-events.c' is generated when building perf and added to libperf.a.
The global table pmu_events_map[] table in this pmu-events.c will be used
in perf in a follow-on patch.
If the architecture does not have any JSON files or there is an error in
processing them, an empty mapping file is created. This would allow the
build of perf to proceed even if we are not able to provide aliases for
events.
The parser for JSON files allows parsing Intel style JSON event files. This
allows to use an Intel event list directly with perf. The Intel event lists
can be quite large and are too big to store in unswappable kernel memory.
The conversion from JSON to C-style is straight forward. The parser knows
(very little) Intel specific information, and can be easily extended to
handle fields for other CPUs.
The parser code is partially shared with an independent parsing library,
which is 2-clause BSD licensed. To avoid any conflicts I marked those
files as BSD licensed too. As part of perf they become GPLv2.
Committer notes:
Fixes:
1) Limit maxfds to 512 to avoid nftd() segfaulting on alloca() with a
big rlim_max, as in docker containers - acme
2) Make jevents a hostprog, supporting cross compilation - jolsa
3) Use HOSTCC for jevents final step - acme
4) Define _GNU_SOURCE for asprintf, as we can't use CC's EXTRA_CFLAGS,
that has to have --sysroot on the Android NDK 24 - acme
5) Removed $(srctree)/tools/perf/pmu-events/pmu-events.c from the
'clean' target, it is generated on $(OUTPUT)pmu-events/pmu-events.c,
which is already taken care of in the original patch - acme
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Jiri Olsa <jolsa@redhat.com>
Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Acked-by: Ingo Molnar <mingo@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Cc: linuxppc-dev@lists.ozlabs.org
Link: http://lkml.kernel.org/r/1473978296-20712-3-git-send-email-sukadev@linux.vnet.ibm.com
Link: http://lkml.kernel.org/r/20160927141846.GA6589@krava
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-19 20:39:33 +00:00
|
|
|
/* model directory, reset topic */
|
perf vendor events: Add support for pmu events vendor subdirectory
For some architectures (like arm), it is required to support a vendor
subdirectory and not locate all the JSONs for a specific vendor in the
same folder.
This is because all the events for the same vendor will be placed in the
same pmu events table, which may cause conflict. This conflict would be
in the instance that a vendor's custom implemented events do have the
same meaning on different platforms, so events in the pmu table would
conflict. In addition, per list command may show events which are not
even supported for a given platform.
This patch adds support for a arch/vendor/platform directory hierarchy,
while maintaining backwards-compatibility for existing arch/platform
structure. In this, each platform would always have its own pmu events
table.
In generated file pmu_events.c, each platform table name is in the
format pme{_vendor}_platform, like this:
struct pmu_events_map pmu_events_map[] = {
{
.cpuid = "0x00000000420f5160",
.version = "v1",
.type = "core",
.table = pme_cavium_thunderx2
},
{
.cpuid = 0,
.version = 0,
.type = 0,
.table = 0,
},
};
Signed-off-by: John Garry <john.garry@huawei.com>
Acked-by: Jiri Olsa <jolsa@kernel.org>
Tested-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Ganapatrao Kulkarni <ganapatrao.kulkarni@cavium.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Shaokun Zhang <zhangshaokun@hisilicon.com>
Cc: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: William Cohen <wcohen@redhat.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linuxarm@huawei.com
Link: http://lkml.kernel.org/r/1520506716-197429-5-git-send-email-john.garry@huawei.com
Link: http://lkml.kernel.org/r/1521047452-28565-1-git-send-email-john.garry@huawei.com
[ Add missing limits.h include, fixing the build on at least all Alpine Linux versions tested (3.4 to 3.7 + edge), ]
[ Applied a patch to fix reading ./.. directories in XFS, see second Link tag ]
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2018-03-08 10:58:29 +00:00
|
|
|
if ((level == 1 && is_dir && is_leaf_dir(fpath)) ||
|
2020-12-04 11:10:07 +00:00
|
|
|
(level >= 2 && is_dir && is_leaf_dir(fpath))) {
|
perf jevents: Program to convert JSON file
This is a modified version of an earlier patch by Andi Kleen.
We expect architectures to create JSON files describing the performance
monitoring (PMU) events that each CPU model/family of the architecture
supports.
Following is an example of the JSON file entry for an x86 event:
[
...
{
"EventCode": "0x00",
"UMask": "0x01",
"EventName": "INST_RETIRED.ANY",
"BriefDescription": "Instructions retired from execution.",
"PublicDescription": "Instructions retired from execution.",
"Counter": "Fixed counter 1",
"CounterHTOff": "Fixed counter 1",
"SampleAfterValue": "2000003",
"SampleAfterValue": "2000003",
"MSRIndex": "0",
"MSRValue": "0",
"TakenAlone": "0",
"CounterMask": "0",
"Invert": "0",
"AnyThread": "0",
"EdgeDetect": "0",
"PEBS": "0",
"PRECISE_STORE": "0",
"Errata": "null",
"Offcore": "0"
},
...
]
All the PMU events supported by a CPU model/family must be grouped into
"topics" such as "Pipelining", "Floating-point", "Virtual-memory" etc.
All events belonging to a topic must be placed in a separate JSON file
(eg: "Pipelining.json") and all the topic JSON files for a CPU model must
be in a separate directory.
Eg: for the CPU model "Silvermont_core":
$ ls tools/perf/pmu-events/arch/x86/Silvermont_core
Floating-point.json
Memory.json
Other.json
Pipelining.json
Virtualmemory.json
Finally, to allow multiple CPU models to share a single set of JSON files,
architectures must provide a mapping between a model and its set of events:
$ grep Silvermont tools/perf/pmu-events/arch/x86/mapfile.csv
GenuineIntel-6-4D,V13,Silvermont_core,core
GenuineIntel-6-4C,V13,Silvermont_core,core
which maps each CPU, identified by [vendor, family, model, version, type]
to a directory of JSON files. Thus two (or more) CPU models support the
set of PMU events listed in the directory.
tools/perf/pmu-events/arch/x86/Silvermont_core/
Given this organization of files, the program, jevents:
- locates all JSON files for each CPU-model of the architecture,
- parses all JSON files for the CPU-model and generates a C-style
"PMU-events table" (pmu-events.c) for the model
- locates a mapfile for the architecture
- builds a global table, mapping each model of CPU to the corresponding
PMU-events table.
The 'pmu-events.c' is generated when building perf and added to libperf.a.
The global table pmu_events_map[] table in this pmu-events.c will be used
in perf in a follow-on patch.
If the architecture does not have any JSON files or there is an error in
processing them, an empty mapping file is created. This would allow the
build of perf to proceed even if we are not able to provide aliases for
events.
The parser for JSON files allows parsing Intel style JSON event files. This
allows to use an Intel event list directly with perf. The Intel event lists
can be quite large and are too big to store in unswappable kernel memory.
The conversion from JSON to C-style is straight forward. The parser knows
(very little) Intel specific information, and can be easily extended to
handle fields for other CPUs.
The parser code is partially shared with an independent parsing library,
which is 2-clause BSD licensed. To avoid any conflicts I marked those
files as BSD licensed too. As part of perf they become GPLv2.
Committer notes:
Fixes:
1) Limit maxfds to 512 to avoid nftd() segfaulting on alloca() with a
big rlim_max, as in docker containers - acme
2) Make jevents a hostprog, supporting cross compilation - jolsa
3) Use HOSTCC for jevents final step - acme
4) Define _GNU_SOURCE for asprintf, as we can't use CC's EXTRA_CFLAGS,
that has to have --sysroot on the Android NDK 24 - acme
5) Removed $(srctree)/tools/perf/pmu-events/pmu-events.c from the
'clean' target, it is generated on $(OUTPUT)pmu-events/pmu-events.c,
which is already taken care of in the original patch - acme
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Jiri Olsa <jolsa@redhat.com>
Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Acked-by: Ingo Molnar <mingo@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Cc: linuxppc-dev@lists.ozlabs.org
Link: http://lkml.kernel.org/r/1473978296-20712-3-git-send-email-sukadev@linux.vnet.ibm.com
Link: http://lkml.kernel.org/r/20160927141846.GA6589@krava
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-19 20:39:33 +00:00
|
|
|
if (close_table)
|
|
|
|
print_events_table_suffix(eventsfp);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Drop file name suffix. Replace hyphens with underscores.
|
|
|
|
* Fail if file name contains any alphanum characters besides
|
|
|
|
* underscores.
|
|
|
|
*/
|
|
|
|
tblname = file_name_to_table_name(bname);
|
|
|
|
if (!tblname) {
|
|
|
|
pr_info("%s: Error determining table name for %s\n", prog,
|
|
|
|
bname);
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
|
perf jevents: Add support for system events tables
Process the JSONs to find support for "system" events, which are not
tied to a specific CPUID.
A "COMPAT" property is now used to match against the namespace ID from
the kernel PMU driver.
The generated pmu-events.c will now have 2 tables:
a. CPU events, as before.
b. New pmu_sys_event_tables[] table, which will have events matched to
specific SoCs.
It will look like this:
struct pmu_event pme_hisilicon_hip09_sys[] = {
{
.name = "cycles",
.compat = "0x00030736",
.event = "event=0",
.desc = "Clock cycles",
.topic = "smmu v3 pmcg",
.long_desc = "Clock cycles",
},
{
.name = "smmuv3_pmcg.l1_tlb",
.compat = "0x00030736",
.event = "event=0x8a",
.desc = "SMMUv3 PMCG l1_tlb. Unit: smmuv3_pmcg ",
.topic = "smmu v3 pmcg",
.long_desc = "SMMUv3 PMCG l1_tlb",
.pmu = "smmuv3_pmcg",
},
...
};
struct pmu_event pme_arm_cortex_a53[] = {
{
.name = "ext_mem_req",
.event = "event=0xc0",
.desc = "External memory request",
.topic = "memory",
},
{
.name = "ext_mem_req_nc",
.event = "event=0xc1",
.desc = "Non-cacheable external memory request",
.topic = "memory",
},
...
};
struct pmu_event pme_hisilicon_hip09_cpu[] = {
{
.name = "l2d_cache_refill_wr",
.event = "event=0x53",
.desc = "L2D cache refill, write",
.topic = "core imp def",
.long_desc = "Attributable Level 2 data cache refill, write",
},
...
};
struct pmu_events_map pmu_events_map[] = {
{
.cpuid = "0x00000000410fd030",
.version = "v1",
.type = "core",
.table = pme_arm_cortex_a53
},
{
.cpuid = "0x00000000480fd010",
.version = "v1",
.type = "core",
.table = pme_hisilicon_hip09_cpu
},
{
.table = 0
},
};
struct pmu_event pme_hisilicon_hip09_cpu[] = {
{
.name = "uncore_hisi_l3c.rd_cpipe",
.event = "event=0",
.desc = "Total read accesses. Unit: hisi_sccl,l3c ",
.topic = "uncore l3c",
.long_desc = "Total read accesses",
.pmu = "hisi_sccl,l3c",
},
{
.name = "uncore_hisi_l3c.wr_cpipe",
.event = "event=0x1",
.desc = "Total write accesses. Unit: hisi_sccl,l3c ",
.topic = "uncore l3c",
.long_desc = "Total write accesses",
.pmu = "hisi_sccl,l3c",
},
...
};
struct pmu_sys_events pmu_sys_event_tables[] = {
{
.table = pme_hisilicon_hip09_sys,
},
...
};
Committer notes:
Added the fix for architectures without PMU events, provided by John
after I reported the build failing in such systems.
Link: https://lore.kernel.org/lkml/650baaf2-36b6-a9e2-ff49-963ef864c1f3@huawei.com/
Signed-off-by: John Garry <john.garry@huawei.com>
Acked-by: Kajol Jain <kjain@linux.ibm.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Ian Rogers <irogers@google.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Joakim Zhang <qiangqing.zhang@nxp.com>
Cc: Kan Liang <kan.liang@linux.intel.com>
Cc: Kim Phillips <kim.phillips@amd.com>
Cc: Leo Yan <leo.yan@linaro.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Shaokun Zhang <zhangshaokun@hisilicon.com>
Cc: Will Deacon <will@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linuxarm@huawei.com
Link: http://lore.kernel.org/lkml/1607080216-36968-3-git-send-email-john.garry@huawei.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2020-12-04 11:10:08 +00:00
|
|
|
if (is_sys_dir(bname)) {
|
|
|
|
struct sys_event_table *sys_event_table;
|
|
|
|
|
|
|
|
sys_event_table = malloc(sizeof(*sys_event_table));
|
|
|
|
if (!sys_event_table)
|
|
|
|
return -1;
|
|
|
|
|
|
|
|
sys_event_table->soc_id = strdup(tblname);
|
|
|
|
if (!sys_event_table->soc_id) {
|
|
|
|
free(sys_event_table);
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
list_add_tail(&sys_event_table->list,
|
|
|
|
&sys_event_tables);
|
|
|
|
}
|
|
|
|
|
perf jevents: Program to convert JSON file
This is a modified version of an earlier patch by Andi Kleen.
We expect architectures to create JSON files describing the performance
monitoring (PMU) events that each CPU model/family of the architecture
supports.
Following is an example of the JSON file entry for an x86 event:
[
...
{
"EventCode": "0x00",
"UMask": "0x01",
"EventName": "INST_RETIRED.ANY",
"BriefDescription": "Instructions retired from execution.",
"PublicDescription": "Instructions retired from execution.",
"Counter": "Fixed counter 1",
"CounterHTOff": "Fixed counter 1",
"SampleAfterValue": "2000003",
"SampleAfterValue": "2000003",
"MSRIndex": "0",
"MSRValue": "0",
"TakenAlone": "0",
"CounterMask": "0",
"Invert": "0",
"AnyThread": "0",
"EdgeDetect": "0",
"PEBS": "0",
"PRECISE_STORE": "0",
"Errata": "null",
"Offcore": "0"
},
...
]
All the PMU events supported by a CPU model/family must be grouped into
"topics" such as "Pipelining", "Floating-point", "Virtual-memory" etc.
All events belonging to a topic must be placed in a separate JSON file
(eg: "Pipelining.json") and all the topic JSON files for a CPU model must
be in a separate directory.
Eg: for the CPU model "Silvermont_core":
$ ls tools/perf/pmu-events/arch/x86/Silvermont_core
Floating-point.json
Memory.json
Other.json
Pipelining.json
Virtualmemory.json
Finally, to allow multiple CPU models to share a single set of JSON files,
architectures must provide a mapping between a model and its set of events:
$ grep Silvermont tools/perf/pmu-events/arch/x86/mapfile.csv
GenuineIntel-6-4D,V13,Silvermont_core,core
GenuineIntel-6-4C,V13,Silvermont_core,core
which maps each CPU, identified by [vendor, family, model, version, type]
to a directory of JSON files. Thus two (or more) CPU models support the
set of PMU events listed in the directory.
tools/perf/pmu-events/arch/x86/Silvermont_core/
Given this organization of files, the program, jevents:
- locates all JSON files for each CPU-model of the architecture,
- parses all JSON files for the CPU-model and generates a C-style
"PMU-events table" (pmu-events.c) for the model
- locates a mapfile for the architecture
- builds a global table, mapping each model of CPU to the corresponding
PMU-events table.
The 'pmu-events.c' is generated when building perf and added to libperf.a.
The global table pmu_events_map[] table in this pmu-events.c will be used
in perf in a follow-on patch.
If the architecture does not have any JSON files or there is an error in
processing them, an empty mapping file is created. This would allow the
build of perf to proceed even if we are not able to provide aliases for
events.
The parser for JSON files allows parsing Intel style JSON event files. This
allows to use an Intel event list directly with perf. The Intel event lists
can be quite large and are too big to store in unswappable kernel memory.
The conversion from JSON to C-style is straight forward. The parser knows
(very little) Intel specific information, and can be easily extended to
handle fields for other CPUs.
The parser code is partially shared with an independent parsing library,
which is 2-clause BSD licensed. To avoid any conflicts I marked those
files as BSD licensed too. As part of perf they become GPLv2.
Committer notes:
Fixes:
1) Limit maxfds to 512 to avoid nftd() segfaulting on alloca() with a
big rlim_max, as in docker containers - acme
2) Make jevents a hostprog, supporting cross compilation - jolsa
3) Use HOSTCC for jevents final step - acme
4) Define _GNU_SOURCE for asprintf, as we can't use CC's EXTRA_CFLAGS,
that has to have --sysroot on the Android NDK 24 - acme
5) Removed $(srctree)/tools/perf/pmu-events/pmu-events.c from the
'clean' target, it is generated on $(OUTPUT)pmu-events/pmu-events.c,
which is already taken care of in the original patch - acme
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Jiri Olsa <jolsa@redhat.com>
Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Acked-by: Ingo Molnar <mingo@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Cc: linuxppc-dev@lists.ozlabs.org
Link: http://lkml.kernel.org/r/1473978296-20712-3-git-send-email-sukadev@linux.vnet.ibm.com
Link: http://lkml.kernel.org/r/20160927141846.GA6589@krava
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-19 20:39:33 +00:00
|
|
|
print_events_table_prefix(eventsfp, tblname);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Save the mapfile name for now. We will process mapfile
|
|
|
|
* after processing all JSON files (so we can write out the
|
|
|
|
* mapping table after all PMU events tables).
|
|
|
|
*
|
|
|
|
*/
|
|
|
|
if (level == 1 && is_file) {
|
2018-03-08 10:58:26 +00:00
|
|
|
if (!strcmp(bname, "mapfile.csv")) {
|
|
|
|
mapfile = strdup(fpath);
|
perf jevents: Program to convert JSON file
This is a modified version of an earlier patch by Andi Kleen.
We expect architectures to create JSON files describing the performance
monitoring (PMU) events that each CPU model/family of the architecture
supports.
Following is an example of the JSON file entry for an x86 event:
[
...
{
"EventCode": "0x00",
"UMask": "0x01",
"EventName": "INST_RETIRED.ANY",
"BriefDescription": "Instructions retired from execution.",
"PublicDescription": "Instructions retired from execution.",
"Counter": "Fixed counter 1",
"CounterHTOff": "Fixed counter 1",
"SampleAfterValue": "2000003",
"SampleAfterValue": "2000003",
"MSRIndex": "0",
"MSRValue": "0",
"TakenAlone": "0",
"CounterMask": "0",
"Invert": "0",
"AnyThread": "0",
"EdgeDetect": "0",
"PEBS": "0",
"PRECISE_STORE": "0",
"Errata": "null",
"Offcore": "0"
},
...
]
All the PMU events supported by a CPU model/family must be grouped into
"topics" such as "Pipelining", "Floating-point", "Virtual-memory" etc.
All events belonging to a topic must be placed in a separate JSON file
(eg: "Pipelining.json") and all the topic JSON files for a CPU model must
be in a separate directory.
Eg: for the CPU model "Silvermont_core":
$ ls tools/perf/pmu-events/arch/x86/Silvermont_core
Floating-point.json
Memory.json
Other.json
Pipelining.json
Virtualmemory.json
Finally, to allow multiple CPU models to share a single set of JSON files,
architectures must provide a mapping between a model and its set of events:
$ grep Silvermont tools/perf/pmu-events/arch/x86/mapfile.csv
GenuineIntel-6-4D,V13,Silvermont_core,core
GenuineIntel-6-4C,V13,Silvermont_core,core
which maps each CPU, identified by [vendor, family, model, version, type]
to a directory of JSON files. Thus two (or more) CPU models support the
set of PMU events listed in the directory.
tools/perf/pmu-events/arch/x86/Silvermont_core/
Given this organization of files, the program, jevents:
- locates all JSON files for each CPU-model of the architecture,
- parses all JSON files for the CPU-model and generates a C-style
"PMU-events table" (pmu-events.c) for the model
- locates a mapfile for the architecture
- builds a global table, mapping each model of CPU to the corresponding
PMU-events table.
The 'pmu-events.c' is generated when building perf and added to libperf.a.
The global table pmu_events_map[] table in this pmu-events.c will be used
in perf in a follow-on patch.
If the architecture does not have any JSON files or there is an error in
processing them, an empty mapping file is created. This would allow the
build of perf to proceed even if we are not able to provide aliases for
events.
The parser for JSON files allows parsing Intel style JSON event files. This
allows to use an Intel event list directly with perf. The Intel event lists
can be quite large and are too big to store in unswappable kernel memory.
The conversion from JSON to C-style is straight forward. The parser knows
(very little) Intel specific information, and can be easily extended to
handle fields for other CPUs.
The parser code is partially shared with an independent parsing library,
which is 2-clause BSD licensed. To avoid any conflicts I marked those
files as BSD licensed too. As part of perf they become GPLv2.
Committer notes:
Fixes:
1) Limit maxfds to 512 to avoid nftd() segfaulting on alloca() with a
big rlim_max, as in docker containers - acme
2) Make jevents a hostprog, supporting cross compilation - jolsa
3) Use HOSTCC for jevents final step - acme
4) Define _GNU_SOURCE for asprintf, as we can't use CC's EXTRA_CFLAGS,
that has to have --sysroot on the Android NDK 24 - acme
5) Removed $(srctree)/tools/perf/pmu-events/pmu-events.c from the
'clean' target, it is generated on $(OUTPUT)pmu-events/pmu-events.c,
which is already taken care of in the original patch - acme
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Jiri Olsa <jolsa@redhat.com>
Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Acked-by: Ingo Molnar <mingo@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Cc: linuxppc-dev@lists.ozlabs.org
Link: http://lkml.kernel.org/r/1473978296-20712-3-git-send-email-sukadev@linux.vnet.ibm.com
Link: http://lkml.kernel.org/r/20160927141846.GA6589@krava
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-19 20:39:33 +00:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
pr_info("%s: Ignoring file %s\n", prog, fpath);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* If the file name does not have a .json extension,
|
|
|
|
* ignore it. It could be a readme.txt for instance.
|
|
|
|
*/
|
|
|
|
if (is_file) {
|
perf vendor events: Add support for arch standard events
For some architectures (like arm), there are architecture- defined
events. Sometimes these events may be "recommended" according to the
architecture standard, in that the implementer is free ignore the
"recommendation" and create its custom event.
This patch adds support for parsing standard events from arch-defined
JSONs, and fixing up vendor events when they have implemented these
events as standard.
Support is also ensured that the vendor may implement their own custom
events.
A new step is added to the pmu events parsing to fix up the vendor
events with the arch-standard events.
The arch-defined JSONs must be placed in the arch root folder for
preprocessing prior to tree JSON processing.
In the vendor JSON, to specify that the arch event is supported, the
keyword "ArchStdEvent" should be used, like this:
[
{
"ArchStdEvent": "L1D_CACHE_WR",
},
]
Matching is based on the "EventName" field in the architecture JSON.
No other JSON objects are strictly required. However, for other objects
added, these take precedence over architecture defined standard events,
thus supporting separate events which have the same event code.
Signed-off-by: John Garry <john.garry@huawei.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Ganapatrao Kulkarni <ganapatrao.kulkarni@cavium.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Shaokun Zhang <zhangshaokun@hisilicon.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: William Cohen <wcohen@redhat.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linuxarm@huawei.com
Link: http://lkml.kernel.org/r/1520506716-197429-8-git-send-email-john.garry@huawei.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2018-03-08 10:58:32 +00:00
|
|
|
if (!is_json_file(bname)) {
|
perf jevents: Program to convert JSON file
This is a modified version of an earlier patch by Andi Kleen.
We expect architectures to create JSON files describing the performance
monitoring (PMU) events that each CPU model/family of the architecture
supports.
Following is an example of the JSON file entry for an x86 event:
[
...
{
"EventCode": "0x00",
"UMask": "0x01",
"EventName": "INST_RETIRED.ANY",
"BriefDescription": "Instructions retired from execution.",
"PublicDescription": "Instructions retired from execution.",
"Counter": "Fixed counter 1",
"CounterHTOff": "Fixed counter 1",
"SampleAfterValue": "2000003",
"SampleAfterValue": "2000003",
"MSRIndex": "0",
"MSRValue": "0",
"TakenAlone": "0",
"CounterMask": "0",
"Invert": "0",
"AnyThread": "0",
"EdgeDetect": "0",
"PEBS": "0",
"PRECISE_STORE": "0",
"Errata": "null",
"Offcore": "0"
},
...
]
All the PMU events supported by a CPU model/family must be grouped into
"topics" such as "Pipelining", "Floating-point", "Virtual-memory" etc.
All events belonging to a topic must be placed in a separate JSON file
(eg: "Pipelining.json") and all the topic JSON files for a CPU model must
be in a separate directory.
Eg: for the CPU model "Silvermont_core":
$ ls tools/perf/pmu-events/arch/x86/Silvermont_core
Floating-point.json
Memory.json
Other.json
Pipelining.json
Virtualmemory.json
Finally, to allow multiple CPU models to share a single set of JSON files,
architectures must provide a mapping between a model and its set of events:
$ grep Silvermont tools/perf/pmu-events/arch/x86/mapfile.csv
GenuineIntel-6-4D,V13,Silvermont_core,core
GenuineIntel-6-4C,V13,Silvermont_core,core
which maps each CPU, identified by [vendor, family, model, version, type]
to a directory of JSON files. Thus two (or more) CPU models support the
set of PMU events listed in the directory.
tools/perf/pmu-events/arch/x86/Silvermont_core/
Given this organization of files, the program, jevents:
- locates all JSON files for each CPU-model of the architecture,
- parses all JSON files for the CPU-model and generates a C-style
"PMU-events table" (pmu-events.c) for the model
- locates a mapfile for the architecture
- builds a global table, mapping each model of CPU to the corresponding
PMU-events table.
The 'pmu-events.c' is generated when building perf and added to libperf.a.
The global table pmu_events_map[] table in this pmu-events.c will be used
in perf in a follow-on patch.
If the architecture does not have any JSON files or there is an error in
processing them, an empty mapping file is created. This would allow the
build of perf to proceed even if we are not able to provide aliases for
events.
The parser for JSON files allows parsing Intel style JSON event files. This
allows to use an Intel event list directly with perf. The Intel event lists
can be quite large and are too big to store in unswappable kernel memory.
The conversion from JSON to C-style is straight forward. The parser knows
(very little) Intel specific information, and can be easily extended to
handle fields for other CPUs.
The parser code is partially shared with an independent parsing library,
which is 2-clause BSD licensed. To avoid any conflicts I marked those
files as BSD licensed too. As part of perf they become GPLv2.
Committer notes:
Fixes:
1) Limit maxfds to 512 to avoid nftd() segfaulting on alloca() with a
big rlim_max, as in docker containers - acme
2) Make jevents a hostprog, supporting cross compilation - jolsa
3) Use HOSTCC for jevents final step - acme
4) Define _GNU_SOURCE for asprintf, as we can't use CC's EXTRA_CFLAGS,
that has to have --sysroot on the Android NDK 24 - acme
5) Removed $(srctree)/tools/perf/pmu-events/pmu-events.c from the
'clean' target, it is generated on $(OUTPUT)pmu-events/pmu-events.c,
which is already taken care of in the original patch - acme
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Jiri Olsa <jolsa@redhat.com>
Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Acked-by: Ingo Molnar <mingo@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Cc: linuxppc-dev@lists.ozlabs.org
Link: http://lkml.kernel.org/r/1473978296-20712-3-git-send-email-sukadev@linux.vnet.ibm.com
Link: http://lkml.kernel.org/r/20160927141846.GA6589@krava
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-19 20:39:33 +00:00
|
|
|
pr_info("%s: Ignoring file without .json suffix %s\n", prog,
|
|
|
|
fpath);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2018-03-08 10:58:28 +00:00
|
|
|
if (level > 1 && add_topic(bname))
|
perf jevents: Program to convert JSON file
This is a modified version of an earlier patch by Andi Kleen.
We expect architectures to create JSON files describing the performance
monitoring (PMU) events that each CPU model/family of the architecture
supports.
Following is an example of the JSON file entry for an x86 event:
[
...
{
"EventCode": "0x00",
"UMask": "0x01",
"EventName": "INST_RETIRED.ANY",
"BriefDescription": "Instructions retired from execution.",
"PublicDescription": "Instructions retired from execution.",
"Counter": "Fixed counter 1",
"CounterHTOff": "Fixed counter 1",
"SampleAfterValue": "2000003",
"SampleAfterValue": "2000003",
"MSRIndex": "0",
"MSRValue": "0",
"TakenAlone": "0",
"CounterMask": "0",
"Invert": "0",
"AnyThread": "0",
"EdgeDetect": "0",
"PEBS": "0",
"PRECISE_STORE": "0",
"Errata": "null",
"Offcore": "0"
},
...
]
All the PMU events supported by a CPU model/family must be grouped into
"topics" such as "Pipelining", "Floating-point", "Virtual-memory" etc.
All events belonging to a topic must be placed in a separate JSON file
(eg: "Pipelining.json") and all the topic JSON files for a CPU model must
be in a separate directory.
Eg: for the CPU model "Silvermont_core":
$ ls tools/perf/pmu-events/arch/x86/Silvermont_core
Floating-point.json
Memory.json
Other.json
Pipelining.json
Virtualmemory.json
Finally, to allow multiple CPU models to share a single set of JSON files,
architectures must provide a mapping between a model and its set of events:
$ grep Silvermont tools/perf/pmu-events/arch/x86/mapfile.csv
GenuineIntel-6-4D,V13,Silvermont_core,core
GenuineIntel-6-4C,V13,Silvermont_core,core
which maps each CPU, identified by [vendor, family, model, version, type]
to a directory of JSON files. Thus two (or more) CPU models support the
set of PMU events listed in the directory.
tools/perf/pmu-events/arch/x86/Silvermont_core/
Given this organization of files, the program, jevents:
- locates all JSON files for each CPU-model of the architecture,
- parses all JSON files for the CPU-model and generates a C-style
"PMU-events table" (pmu-events.c) for the model
- locates a mapfile for the architecture
- builds a global table, mapping each model of CPU to the corresponding
PMU-events table.
The 'pmu-events.c' is generated when building perf and added to libperf.a.
The global table pmu_events_map[] table in this pmu-events.c will be used
in perf in a follow-on patch.
If the architecture does not have any JSON files or there is an error in
processing them, an empty mapping file is created. This would allow the
build of perf to proceed even if we are not able to provide aliases for
events.
The parser for JSON files allows parsing Intel style JSON event files. This
allows to use an Intel event list directly with perf. The Intel event lists
can be quite large and are too big to store in unswappable kernel memory.
The conversion from JSON to C-style is straight forward. The parser knows
(very little) Intel specific information, and can be easily extended to
handle fields for other CPUs.
The parser code is partially shared with an independent parsing library,
which is 2-clause BSD licensed. To avoid any conflicts I marked those
files as BSD licensed too. As part of perf they become GPLv2.
Committer notes:
Fixes:
1) Limit maxfds to 512 to avoid nftd() segfaulting on alloca() with a
big rlim_max, as in docker containers - acme
2) Make jevents a hostprog, supporting cross compilation - jolsa
3) Use HOSTCC for jevents final step - acme
4) Define _GNU_SOURCE for asprintf, as we can't use CC's EXTRA_CFLAGS,
that has to have --sysroot on the Android NDK 24 - acme
5) Removed $(srctree)/tools/perf/pmu-events/pmu-events.c from the
'clean' target, it is generated on $(OUTPUT)pmu-events/pmu-events.c,
which is already taken care of in the original patch - acme
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Jiri Olsa <jolsa@redhat.com>
Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Acked-by: Ingo Molnar <mingo@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Cc: linuxppc-dev@lists.ozlabs.org
Link: http://lkml.kernel.org/r/1473978296-20712-3-git-send-email-sukadev@linux.vnet.ibm.com
Link: http://lkml.kernel.org/r/20160927141846.GA6589@krava
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-19 20:39:33 +00:00
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Assume all other files are JSON files.
|
|
|
|
*
|
|
|
|
* If mapfile refers to 'power7_core.json', we create a table
|
|
|
|
* named 'power7_core'. Any inconsistencies between the mapfile
|
|
|
|
* and directory tree could result in build failure due to table
|
|
|
|
* names not being found.
|
|
|
|
*
|
|
|
|
* Atleast for now, be strict with processing JSON file names.
|
|
|
|
* i.e. if JSON file name cannot be mapped to C-style table name,
|
|
|
|
* fail.
|
|
|
|
*/
|
|
|
|
if (is_file) {
|
|
|
|
struct perf_entry_data data = {
|
|
|
|
.topic = get_topic(),
|
|
|
|
.outfp = eventsfp,
|
|
|
|
};
|
|
|
|
|
|
|
|
err = json_events(fpath, print_events_table_entry, &data);
|
|
|
|
|
|
|
|
free(data.topic);
|
|
|
|
}
|
|
|
|
|
|
|
|
return err;
|
|
|
|
}
|
|
|
|
|
|
|
|
#ifndef PATH_MAX
|
|
|
|
#define PATH_MAX 4096
|
|
|
|
#endif
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Starting in directory 'start_dirname', find the "mapfile.csv" and
|
|
|
|
* the set of JSON files for the architecture 'arch'.
|
|
|
|
*
|
|
|
|
* From each JSON file, create a C-style "PMU events table" from the
|
|
|
|
* JSON file (see struct pmu_event).
|
|
|
|
*
|
|
|
|
* From the mapfile, create a mapping between the CPU revisions and
|
|
|
|
* PMU event tables (see struct pmu_events_map).
|
|
|
|
*
|
|
|
|
* Write out the PMU events tables and the mapping table to pmu-event.c.
|
|
|
|
*/
|
|
|
|
int main(int argc, char *argv[])
|
|
|
|
{
|
2020-10-22 11:02:26 +00:00
|
|
|
int rc, ret = 0, empty_map = 0;
|
perf jevents: Program to convert JSON file
This is a modified version of an earlier patch by Andi Kleen.
We expect architectures to create JSON files describing the performance
monitoring (PMU) events that each CPU model/family of the architecture
supports.
Following is an example of the JSON file entry for an x86 event:
[
...
{
"EventCode": "0x00",
"UMask": "0x01",
"EventName": "INST_RETIRED.ANY",
"BriefDescription": "Instructions retired from execution.",
"PublicDescription": "Instructions retired from execution.",
"Counter": "Fixed counter 1",
"CounterHTOff": "Fixed counter 1",
"SampleAfterValue": "2000003",
"SampleAfterValue": "2000003",
"MSRIndex": "0",
"MSRValue": "0",
"TakenAlone": "0",
"CounterMask": "0",
"Invert": "0",
"AnyThread": "0",
"EdgeDetect": "0",
"PEBS": "0",
"PRECISE_STORE": "0",
"Errata": "null",
"Offcore": "0"
},
...
]
All the PMU events supported by a CPU model/family must be grouped into
"topics" such as "Pipelining", "Floating-point", "Virtual-memory" etc.
All events belonging to a topic must be placed in a separate JSON file
(eg: "Pipelining.json") and all the topic JSON files for a CPU model must
be in a separate directory.
Eg: for the CPU model "Silvermont_core":
$ ls tools/perf/pmu-events/arch/x86/Silvermont_core
Floating-point.json
Memory.json
Other.json
Pipelining.json
Virtualmemory.json
Finally, to allow multiple CPU models to share a single set of JSON files,
architectures must provide a mapping between a model and its set of events:
$ grep Silvermont tools/perf/pmu-events/arch/x86/mapfile.csv
GenuineIntel-6-4D,V13,Silvermont_core,core
GenuineIntel-6-4C,V13,Silvermont_core,core
which maps each CPU, identified by [vendor, family, model, version, type]
to a directory of JSON files. Thus two (or more) CPU models support the
set of PMU events listed in the directory.
tools/perf/pmu-events/arch/x86/Silvermont_core/
Given this organization of files, the program, jevents:
- locates all JSON files for each CPU-model of the architecture,
- parses all JSON files for the CPU-model and generates a C-style
"PMU-events table" (pmu-events.c) for the model
- locates a mapfile for the architecture
- builds a global table, mapping each model of CPU to the corresponding
PMU-events table.
The 'pmu-events.c' is generated when building perf and added to libperf.a.
The global table pmu_events_map[] table in this pmu-events.c will be used
in perf in a follow-on patch.
If the architecture does not have any JSON files or there is an error in
processing them, an empty mapping file is created. This would allow the
build of perf to proceed even if we are not able to provide aliases for
events.
The parser for JSON files allows parsing Intel style JSON event files. This
allows to use an Intel event list directly with perf. The Intel event lists
can be quite large and are too big to store in unswappable kernel memory.
The conversion from JSON to C-style is straight forward. The parser knows
(very little) Intel specific information, and can be easily extended to
handle fields for other CPUs.
The parser code is partially shared with an independent parsing library,
which is 2-clause BSD licensed. To avoid any conflicts I marked those
files as BSD licensed too. As part of perf they become GPLv2.
Committer notes:
Fixes:
1) Limit maxfds to 512 to avoid nftd() segfaulting on alloca() with a
big rlim_max, as in docker containers - acme
2) Make jevents a hostprog, supporting cross compilation - jolsa
3) Use HOSTCC for jevents final step - acme
4) Define _GNU_SOURCE for asprintf, as we can't use CC's EXTRA_CFLAGS,
that has to have --sysroot on the Android NDK 24 - acme
5) Removed $(srctree)/tools/perf/pmu-events/pmu-events.c from the
'clean' target, it is generated on $(OUTPUT)pmu-events/pmu-events.c,
which is already taken care of in the original patch - acme
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Jiri Olsa <jolsa@redhat.com>
Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Acked-by: Ingo Molnar <mingo@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Cc: linuxppc-dev@lists.ozlabs.org
Link: http://lkml.kernel.org/r/1473978296-20712-3-git-send-email-sukadev@linux.vnet.ibm.com
Link: http://lkml.kernel.org/r/20160927141846.GA6589@krava
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-19 20:39:33 +00:00
|
|
|
int maxfds;
|
|
|
|
char ldirname[PATH_MAX];
|
|
|
|
const char *arch;
|
|
|
|
const char *output_file;
|
|
|
|
const char *start_dirname;
|
2020-10-22 11:02:26 +00:00
|
|
|
char *err_string_ext = "";
|
2017-07-25 00:16:38 +00:00
|
|
|
struct stat stbuf;
|
perf jevents: Program to convert JSON file
This is a modified version of an earlier patch by Andi Kleen.
We expect architectures to create JSON files describing the performance
monitoring (PMU) events that each CPU model/family of the architecture
supports.
Following is an example of the JSON file entry for an x86 event:
[
...
{
"EventCode": "0x00",
"UMask": "0x01",
"EventName": "INST_RETIRED.ANY",
"BriefDescription": "Instructions retired from execution.",
"PublicDescription": "Instructions retired from execution.",
"Counter": "Fixed counter 1",
"CounterHTOff": "Fixed counter 1",
"SampleAfterValue": "2000003",
"SampleAfterValue": "2000003",
"MSRIndex": "0",
"MSRValue": "0",
"TakenAlone": "0",
"CounterMask": "0",
"Invert": "0",
"AnyThread": "0",
"EdgeDetect": "0",
"PEBS": "0",
"PRECISE_STORE": "0",
"Errata": "null",
"Offcore": "0"
},
...
]
All the PMU events supported by a CPU model/family must be grouped into
"topics" such as "Pipelining", "Floating-point", "Virtual-memory" etc.
All events belonging to a topic must be placed in a separate JSON file
(eg: "Pipelining.json") and all the topic JSON files for a CPU model must
be in a separate directory.
Eg: for the CPU model "Silvermont_core":
$ ls tools/perf/pmu-events/arch/x86/Silvermont_core
Floating-point.json
Memory.json
Other.json
Pipelining.json
Virtualmemory.json
Finally, to allow multiple CPU models to share a single set of JSON files,
architectures must provide a mapping between a model and its set of events:
$ grep Silvermont tools/perf/pmu-events/arch/x86/mapfile.csv
GenuineIntel-6-4D,V13,Silvermont_core,core
GenuineIntel-6-4C,V13,Silvermont_core,core
which maps each CPU, identified by [vendor, family, model, version, type]
to a directory of JSON files. Thus two (or more) CPU models support the
set of PMU events listed in the directory.
tools/perf/pmu-events/arch/x86/Silvermont_core/
Given this organization of files, the program, jevents:
- locates all JSON files for each CPU-model of the architecture,
- parses all JSON files for the CPU-model and generates a C-style
"PMU-events table" (pmu-events.c) for the model
- locates a mapfile for the architecture
- builds a global table, mapping each model of CPU to the corresponding
PMU-events table.
The 'pmu-events.c' is generated when building perf and added to libperf.a.
The global table pmu_events_map[] table in this pmu-events.c will be used
in perf in a follow-on patch.
If the architecture does not have any JSON files or there is an error in
processing them, an empty mapping file is created. This would allow the
build of perf to proceed even if we are not able to provide aliases for
events.
The parser for JSON files allows parsing Intel style JSON event files. This
allows to use an Intel event list directly with perf. The Intel event lists
can be quite large and are too big to store in unswappable kernel memory.
The conversion from JSON to C-style is straight forward. The parser knows
(very little) Intel specific information, and can be easily extended to
handle fields for other CPUs.
The parser code is partially shared with an independent parsing library,
which is 2-clause BSD licensed. To avoid any conflicts I marked those
files as BSD licensed too. As part of perf they become GPLv2.
Committer notes:
Fixes:
1) Limit maxfds to 512 to avoid nftd() segfaulting on alloca() with a
big rlim_max, as in docker containers - acme
2) Make jevents a hostprog, supporting cross compilation - jolsa
3) Use HOSTCC for jevents final step - acme
4) Define _GNU_SOURCE for asprintf, as we can't use CC's EXTRA_CFLAGS,
that has to have --sysroot on the Android NDK 24 - acme
5) Removed $(srctree)/tools/perf/pmu-events/pmu-events.c from the
'clean' target, it is generated on $(OUTPUT)pmu-events/pmu-events.c,
which is already taken care of in the original patch - acme
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Jiri Olsa <jolsa@redhat.com>
Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Acked-by: Ingo Molnar <mingo@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Cc: linuxppc-dev@lists.ozlabs.org
Link: http://lkml.kernel.org/r/1473978296-20712-3-git-send-email-sukadev@linux.vnet.ibm.com
Link: http://lkml.kernel.org/r/20160927141846.GA6589@krava
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-19 20:39:33 +00:00
|
|
|
|
|
|
|
prog = basename(argv[0]);
|
|
|
|
if (argc < 4) {
|
|
|
|
pr_err("Usage: %s <arch> <starting_dir> <output_file>\n", prog);
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
arch = argv[1];
|
|
|
|
start_dirname = argv[2];
|
|
|
|
output_file = argv[3];
|
|
|
|
|
|
|
|
if (argc > 4)
|
|
|
|
verbose = atoi(argv[4]);
|
|
|
|
|
|
|
|
eventsfp = fopen(output_file, "w");
|
|
|
|
if (!eventsfp) {
|
|
|
|
pr_err("%s Unable to create required file %s (%s)\n",
|
|
|
|
prog, output_file, strerror(errno));
|
|
|
|
return 2;
|
|
|
|
}
|
|
|
|
|
2017-07-25 00:16:38 +00:00
|
|
|
sprintf(ldirname, "%s/%s", start_dirname, arch);
|
|
|
|
|
|
|
|
/* If architecture does not have any event lists, bail out */
|
|
|
|
if (stat(ldirname, &stbuf) < 0) {
|
|
|
|
pr_info("%s: Arch %s has no PMU event lists\n", prog, arch);
|
2020-10-22 11:02:26 +00:00
|
|
|
empty_map = 1;
|
|
|
|
goto err_close_eventsfp;
|
2017-07-25 00:16:38 +00:00
|
|
|
}
|
|
|
|
|
perf jevents: Program to convert JSON file
This is a modified version of an earlier patch by Andi Kleen.
We expect architectures to create JSON files describing the performance
monitoring (PMU) events that each CPU model/family of the architecture
supports.
Following is an example of the JSON file entry for an x86 event:
[
...
{
"EventCode": "0x00",
"UMask": "0x01",
"EventName": "INST_RETIRED.ANY",
"BriefDescription": "Instructions retired from execution.",
"PublicDescription": "Instructions retired from execution.",
"Counter": "Fixed counter 1",
"CounterHTOff": "Fixed counter 1",
"SampleAfterValue": "2000003",
"SampleAfterValue": "2000003",
"MSRIndex": "0",
"MSRValue": "0",
"TakenAlone": "0",
"CounterMask": "0",
"Invert": "0",
"AnyThread": "0",
"EdgeDetect": "0",
"PEBS": "0",
"PRECISE_STORE": "0",
"Errata": "null",
"Offcore": "0"
},
...
]
All the PMU events supported by a CPU model/family must be grouped into
"topics" such as "Pipelining", "Floating-point", "Virtual-memory" etc.
All events belonging to a topic must be placed in a separate JSON file
(eg: "Pipelining.json") and all the topic JSON files for a CPU model must
be in a separate directory.
Eg: for the CPU model "Silvermont_core":
$ ls tools/perf/pmu-events/arch/x86/Silvermont_core
Floating-point.json
Memory.json
Other.json
Pipelining.json
Virtualmemory.json
Finally, to allow multiple CPU models to share a single set of JSON files,
architectures must provide a mapping between a model and its set of events:
$ grep Silvermont tools/perf/pmu-events/arch/x86/mapfile.csv
GenuineIntel-6-4D,V13,Silvermont_core,core
GenuineIntel-6-4C,V13,Silvermont_core,core
which maps each CPU, identified by [vendor, family, model, version, type]
to a directory of JSON files. Thus two (or more) CPU models support the
set of PMU events listed in the directory.
tools/perf/pmu-events/arch/x86/Silvermont_core/
Given this organization of files, the program, jevents:
- locates all JSON files for each CPU-model of the architecture,
- parses all JSON files for the CPU-model and generates a C-style
"PMU-events table" (pmu-events.c) for the model
- locates a mapfile for the architecture
- builds a global table, mapping each model of CPU to the corresponding
PMU-events table.
The 'pmu-events.c' is generated when building perf and added to libperf.a.
The global table pmu_events_map[] table in this pmu-events.c will be used
in perf in a follow-on patch.
If the architecture does not have any JSON files or there is an error in
processing them, an empty mapping file is created. This would allow the
build of perf to proceed even if we are not able to provide aliases for
events.
The parser for JSON files allows parsing Intel style JSON event files. This
allows to use an Intel event list directly with perf. The Intel event lists
can be quite large and are too big to store in unswappable kernel memory.
The conversion from JSON to C-style is straight forward. The parser knows
(very little) Intel specific information, and can be easily extended to
handle fields for other CPUs.
The parser code is partially shared with an independent parsing library,
which is 2-clause BSD licensed. To avoid any conflicts I marked those
files as BSD licensed too. As part of perf they become GPLv2.
Committer notes:
Fixes:
1) Limit maxfds to 512 to avoid nftd() segfaulting on alloca() with a
big rlim_max, as in docker containers - acme
2) Make jevents a hostprog, supporting cross compilation - jolsa
3) Use HOSTCC for jevents final step - acme
4) Define _GNU_SOURCE for asprintf, as we can't use CC's EXTRA_CFLAGS,
that has to have --sysroot on the Android NDK 24 - acme
5) Removed $(srctree)/tools/perf/pmu-events/pmu-events.c from the
'clean' target, it is generated on $(OUTPUT)pmu-events/pmu-events.c,
which is already taken care of in the original patch - acme
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Jiri Olsa <jolsa@redhat.com>
Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Acked-by: Ingo Molnar <mingo@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Cc: linuxppc-dev@lists.ozlabs.org
Link: http://lkml.kernel.org/r/1473978296-20712-3-git-send-email-sukadev@linux.vnet.ibm.com
Link: http://lkml.kernel.org/r/20160927141846.GA6589@krava
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-19 20:39:33 +00:00
|
|
|
/* Include pmu-events.h first */
|
2019-06-25 17:31:22 +00:00
|
|
|
fprintf(eventsfp, "#include \"pmu-events/pmu-events.h\"\n");
|
perf jevents: Program to convert JSON file
This is a modified version of an earlier patch by Andi Kleen.
We expect architectures to create JSON files describing the performance
monitoring (PMU) events that each CPU model/family of the architecture
supports.
Following is an example of the JSON file entry for an x86 event:
[
...
{
"EventCode": "0x00",
"UMask": "0x01",
"EventName": "INST_RETIRED.ANY",
"BriefDescription": "Instructions retired from execution.",
"PublicDescription": "Instructions retired from execution.",
"Counter": "Fixed counter 1",
"CounterHTOff": "Fixed counter 1",
"SampleAfterValue": "2000003",
"SampleAfterValue": "2000003",
"MSRIndex": "0",
"MSRValue": "0",
"TakenAlone": "0",
"CounterMask": "0",
"Invert": "0",
"AnyThread": "0",
"EdgeDetect": "0",
"PEBS": "0",
"PRECISE_STORE": "0",
"Errata": "null",
"Offcore": "0"
},
...
]
All the PMU events supported by a CPU model/family must be grouped into
"topics" such as "Pipelining", "Floating-point", "Virtual-memory" etc.
All events belonging to a topic must be placed in a separate JSON file
(eg: "Pipelining.json") and all the topic JSON files for a CPU model must
be in a separate directory.
Eg: for the CPU model "Silvermont_core":
$ ls tools/perf/pmu-events/arch/x86/Silvermont_core
Floating-point.json
Memory.json
Other.json
Pipelining.json
Virtualmemory.json
Finally, to allow multiple CPU models to share a single set of JSON files,
architectures must provide a mapping between a model and its set of events:
$ grep Silvermont tools/perf/pmu-events/arch/x86/mapfile.csv
GenuineIntel-6-4D,V13,Silvermont_core,core
GenuineIntel-6-4C,V13,Silvermont_core,core
which maps each CPU, identified by [vendor, family, model, version, type]
to a directory of JSON files. Thus two (or more) CPU models support the
set of PMU events listed in the directory.
tools/perf/pmu-events/arch/x86/Silvermont_core/
Given this organization of files, the program, jevents:
- locates all JSON files for each CPU-model of the architecture,
- parses all JSON files for the CPU-model and generates a C-style
"PMU-events table" (pmu-events.c) for the model
- locates a mapfile for the architecture
- builds a global table, mapping each model of CPU to the corresponding
PMU-events table.
The 'pmu-events.c' is generated when building perf and added to libperf.a.
The global table pmu_events_map[] table in this pmu-events.c will be used
in perf in a follow-on patch.
If the architecture does not have any JSON files or there is an error in
processing them, an empty mapping file is created. This would allow the
build of perf to proceed even if we are not able to provide aliases for
events.
The parser for JSON files allows parsing Intel style JSON event files. This
allows to use an Intel event list directly with perf. The Intel event lists
can be quite large and are too big to store in unswappable kernel memory.
The conversion from JSON to C-style is straight forward. The parser knows
(very little) Intel specific information, and can be easily extended to
handle fields for other CPUs.
The parser code is partially shared with an independent parsing library,
which is 2-clause BSD licensed. To avoid any conflicts I marked those
files as BSD licensed too. As part of perf they become GPLv2.
Committer notes:
Fixes:
1) Limit maxfds to 512 to avoid nftd() segfaulting on alloca() with a
big rlim_max, as in docker containers - acme
2) Make jevents a hostprog, supporting cross compilation - jolsa
3) Use HOSTCC for jevents final step - acme
4) Define _GNU_SOURCE for asprintf, as we can't use CC's EXTRA_CFLAGS,
that has to have --sysroot on the Android NDK 24 - acme
5) Removed $(srctree)/tools/perf/pmu-events/pmu-events.c from the
'clean' target, it is generated on $(OUTPUT)pmu-events/pmu-events.c,
which is already taken care of in the original patch - acme
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Jiri Olsa <jolsa@redhat.com>
Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Acked-by: Ingo Molnar <mingo@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Cc: linuxppc-dev@lists.ozlabs.org
Link: http://lkml.kernel.org/r/1473978296-20712-3-git-send-email-sukadev@linux.vnet.ibm.com
Link: http://lkml.kernel.org/r/20160927141846.GA6589@krava
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-19 20:39:33 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
* The mapfile allows multiple CPUids to point to the same JSON file,
|
|
|
|
* so, not sure if there is a need for symlinks within the pmu-events
|
|
|
|
* directory.
|
|
|
|
*
|
|
|
|
* For now, treat symlinks of JSON files as regular files and create
|
|
|
|
* separate tables for each symlink (presumably, each symlink refers
|
|
|
|
* to specific version of the CPU).
|
|
|
|
*/
|
|
|
|
|
|
|
|
maxfds = get_maxfds();
|
perf vendor events: Add support for arch standard events
For some architectures (like arm), there are architecture- defined
events. Sometimes these events may be "recommended" according to the
architecture standard, in that the implementer is free ignore the
"recommendation" and create its custom event.
This patch adds support for parsing standard events from arch-defined
JSONs, and fixing up vendor events when they have implemented these
events as standard.
Support is also ensured that the vendor may implement their own custom
events.
A new step is added to the pmu events parsing to fix up the vendor
events with the arch-standard events.
The arch-defined JSONs must be placed in the arch root folder for
preprocessing prior to tree JSON processing.
In the vendor JSON, to specify that the arch event is supported, the
keyword "ArchStdEvent" should be used, like this:
[
{
"ArchStdEvent": "L1D_CACHE_WR",
},
]
Matching is based on the "EventName" field in the architecture JSON.
No other JSON objects are strictly required. However, for other objects
added, these take precedence over architecture defined standard events,
thus supporting separate events which have the same event code.
Signed-off-by: John Garry <john.garry@huawei.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Ganapatrao Kulkarni <ganapatrao.kulkarni@cavium.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Shaokun Zhang <zhangshaokun@hisilicon.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: William Cohen <wcohen@redhat.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linuxarm@huawei.com
Link: http://lkml.kernel.org/r/1520506716-197429-8-git-send-email-john.garry@huawei.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2018-03-08 10:58:32 +00:00
|
|
|
rc = nftw(ldirname, preprocess_arch_std_files, maxfds, 0);
|
2020-10-22 11:02:26 +00:00
|
|
|
if (rc)
|
|
|
|
goto err_processing_std_arch_event_dir;
|
perf vendor events: Add support for arch standard events
For some architectures (like arm), there are architecture- defined
events. Sometimes these events may be "recommended" according to the
architecture standard, in that the implementer is free ignore the
"recommendation" and create its custom event.
This patch adds support for parsing standard events from arch-defined
JSONs, and fixing up vendor events when they have implemented these
events as standard.
Support is also ensured that the vendor may implement their own custom
events.
A new step is added to the pmu events parsing to fix up the vendor
events with the arch-standard events.
The arch-defined JSONs must be placed in the arch root folder for
preprocessing prior to tree JSON processing.
In the vendor JSON, to specify that the arch event is supported, the
keyword "ArchStdEvent" should be used, like this:
[
{
"ArchStdEvent": "L1D_CACHE_WR",
},
]
Matching is based on the "EventName" field in the architecture JSON.
No other JSON objects are strictly required. However, for other objects
added, these take precedence over architecture defined standard events,
thus supporting separate events which have the same event code.
Signed-off-by: John Garry <john.garry@huawei.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Ganapatrao Kulkarni <ganapatrao.kulkarni@cavium.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Shaokun Zhang <zhangshaokun@hisilicon.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: William Cohen <wcohen@redhat.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linuxarm@huawei.com
Link: http://lkml.kernel.org/r/1520506716-197429-8-git-send-email-john.garry@huawei.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2018-03-08 10:58:32 +00:00
|
|
|
|
perf jevents: Program to convert JSON file
This is a modified version of an earlier patch by Andi Kleen.
We expect architectures to create JSON files describing the performance
monitoring (PMU) events that each CPU model/family of the architecture
supports.
Following is an example of the JSON file entry for an x86 event:
[
...
{
"EventCode": "0x00",
"UMask": "0x01",
"EventName": "INST_RETIRED.ANY",
"BriefDescription": "Instructions retired from execution.",
"PublicDescription": "Instructions retired from execution.",
"Counter": "Fixed counter 1",
"CounterHTOff": "Fixed counter 1",
"SampleAfterValue": "2000003",
"SampleAfterValue": "2000003",
"MSRIndex": "0",
"MSRValue": "0",
"TakenAlone": "0",
"CounterMask": "0",
"Invert": "0",
"AnyThread": "0",
"EdgeDetect": "0",
"PEBS": "0",
"PRECISE_STORE": "0",
"Errata": "null",
"Offcore": "0"
},
...
]
All the PMU events supported by a CPU model/family must be grouped into
"topics" such as "Pipelining", "Floating-point", "Virtual-memory" etc.
All events belonging to a topic must be placed in a separate JSON file
(eg: "Pipelining.json") and all the topic JSON files for a CPU model must
be in a separate directory.
Eg: for the CPU model "Silvermont_core":
$ ls tools/perf/pmu-events/arch/x86/Silvermont_core
Floating-point.json
Memory.json
Other.json
Pipelining.json
Virtualmemory.json
Finally, to allow multiple CPU models to share a single set of JSON files,
architectures must provide a mapping between a model and its set of events:
$ grep Silvermont tools/perf/pmu-events/arch/x86/mapfile.csv
GenuineIntel-6-4D,V13,Silvermont_core,core
GenuineIntel-6-4C,V13,Silvermont_core,core
which maps each CPU, identified by [vendor, family, model, version, type]
to a directory of JSON files. Thus two (or more) CPU models support the
set of PMU events listed in the directory.
tools/perf/pmu-events/arch/x86/Silvermont_core/
Given this organization of files, the program, jevents:
- locates all JSON files for each CPU-model of the architecture,
- parses all JSON files for the CPU-model and generates a C-style
"PMU-events table" (pmu-events.c) for the model
- locates a mapfile for the architecture
- builds a global table, mapping each model of CPU to the corresponding
PMU-events table.
The 'pmu-events.c' is generated when building perf and added to libperf.a.
The global table pmu_events_map[] table in this pmu-events.c will be used
in perf in a follow-on patch.
If the architecture does not have any JSON files or there is an error in
processing them, an empty mapping file is created. This would allow the
build of perf to proceed even if we are not able to provide aliases for
events.
The parser for JSON files allows parsing Intel style JSON event files. This
allows to use an Intel event list directly with perf. The Intel event lists
can be quite large and are too big to store in unswappable kernel memory.
The conversion from JSON to C-style is straight forward. The parser knows
(very little) Intel specific information, and can be easily extended to
handle fields for other CPUs.
The parser code is partially shared with an independent parsing library,
which is 2-clause BSD licensed. To avoid any conflicts I marked those
files as BSD licensed too. As part of perf they become GPLv2.
Committer notes:
Fixes:
1) Limit maxfds to 512 to avoid nftd() segfaulting on alloca() with a
big rlim_max, as in docker containers - acme
2) Make jevents a hostprog, supporting cross compilation - jolsa
3) Use HOSTCC for jevents final step - acme
4) Define _GNU_SOURCE for asprintf, as we can't use CC's EXTRA_CFLAGS,
that has to have --sysroot on the Android NDK 24 - acme
5) Removed $(srctree)/tools/perf/pmu-events/pmu-events.c from the
'clean' target, it is generated on $(OUTPUT)pmu-events/pmu-events.c,
which is already taken care of in the original patch - acme
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Jiri Olsa <jolsa@redhat.com>
Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Acked-by: Ingo Molnar <mingo@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Cc: linuxppc-dev@lists.ozlabs.org
Link: http://lkml.kernel.org/r/1473978296-20712-3-git-send-email-sukadev@linux.vnet.ibm.com
Link: http://lkml.kernel.org/r/20160927141846.GA6589@krava
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-19 20:39:33 +00:00
|
|
|
rc = nftw(ldirname, process_one_file, maxfds, 0);
|
2020-10-22 11:02:26 +00:00
|
|
|
if (rc)
|
|
|
|
goto err_processing_dir;
|
perf jevents: Program to convert JSON file
This is a modified version of an earlier patch by Andi Kleen.
We expect architectures to create JSON files describing the performance
monitoring (PMU) events that each CPU model/family of the architecture
supports.
Following is an example of the JSON file entry for an x86 event:
[
...
{
"EventCode": "0x00",
"UMask": "0x01",
"EventName": "INST_RETIRED.ANY",
"BriefDescription": "Instructions retired from execution.",
"PublicDescription": "Instructions retired from execution.",
"Counter": "Fixed counter 1",
"CounterHTOff": "Fixed counter 1",
"SampleAfterValue": "2000003",
"SampleAfterValue": "2000003",
"MSRIndex": "0",
"MSRValue": "0",
"TakenAlone": "0",
"CounterMask": "0",
"Invert": "0",
"AnyThread": "0",
"EdgeDetect": "0",
"PEBS": "0",
"PRECISE_STORE": "0",
"Errata": "null",
"Offcore": "0"
},
...
]
All the PMU events supported by a CPU model/family must be grouped into
"topics" such as "Pipelining", "Floating-point", "Virtual-memory" etc.
All events belonging to a topic must be placed in a separate JSON file
(eg: "Pipelining.json") and all the topic JSON files for a CPU model must
be in a separate directory.
Eg: for the CPU model "Silvermont_core":
$ ls tools/perf/pmu-events/arch/x86/Silvermont_core
Floating-point.json
Memory.json
Other.json
Pipelining.json
Virtualmemory.json
Finally, to allow multiple CPU models to share a single set of JSON files,
architectures must provide a mapping between a model and its set of events:
$ grep Silvermont tools/perf/pmu-events/arch/x86/mapfile.csv
GenuineIntel-6-4D,V13,Silvermont_core,core
GenuineIntel-6-4C,V13,Silvermont_core,core
which maps each CPU, identified by [vendor, family, model, version, type]
to a directory of JSON files. Thus two (or more) CPU models support the
set of PMU events listed in the directory.
tools/perf/pmu-events/arch/x86/Silvermont_core/
Given this organization of files, the program, jevents:
- locates all JSON files for each CPU-model of the architecture,
- parses all JSON files for the CPU-model and generates a C-style
"PMU-events table" (pmu-events.c) for the model
- locates a mapfile for the architecture
- builds a global table, mapping each model of CPU to the corresponding
PMU-events table.
The 'pmu-events.c' is generated when building perf and added to libperf.a.
The global table pmu_events_map[] table in this pmu-events.c will be used
in perf in a follow-on patch.
If the architecture does not have any JSON files or there is an error in
processing them, an empty mapping file is created. This would allow the
build of perf to proceed even if we are not able to provide aliases for
events.
The parser for JSON files allows parsing Intel style JSON event files. This
allows to use an Intel event list directly with perf. The Intel event lists
can be quite large and are too big to store in unswappable kernel memory.
The conversion from JSON to C-style is straight forward. The parser knows
(very little) Intel specific information, and can be easily extended to
handle fields for other CPUs.
The parser code is partially shared with an independent parsing library,
which is 2-clause BSD licensed. To avoid any conflicts I marked those
files as BSD licensed too. As part of perf they become GPLv2.
Committer notes:
Fixes:
1) Limit maxfds to 512 to avoid nftd() segfaulting on alloca() with a
big rlim_max, as in docker containers - acme
2) Make jevents a hostprog, supporting cross compilation - jolsa
3) Use HOSTCC for jevents final step - acme
4) Define _GNU_SOURCE for asprintf, as we can't use CC's EXTRA_CFLAGS,
that has to have --sysroot on the Android NDK 24 - acme
5) Removed $(srctree)/tools/perf/pmu-events/pmu-events.c from the
'clean' target, it is generated on $(OUTPUT)pmu-events/pmu-events.c,
which is already taken care of in the original patch - acme
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Jiri Olsa <jolsa@redhat.com>
Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Acked-by: Ingo Molnar <mingo@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Cc: linuxppc-dev@lists.ozlabs.org
Link: http://lkml.kernel.org/r/1473978296-20712-3-git-send-email-sukadev@linux.vnet.ibm.com
Link: http://lkml.kernel.org/r/20160927141846.GA6589@krava
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-19 20:39:33 +00:00
|
|
|
|
perf jevents: Support test events folder
With the goal of supporting pmu-events test case, introduce support for
a test events folder.
These test events can be used for testing generation of pmu-event tables
and alias creation for any arch.
When running the pmu-events test case, these test events will be used as
the platform-agnostic events, so aliases can be created per-PMU and
validated against known expected values.
To support the test events, add a "testcpu" entry in pmu_events_map[].
The pmu-events test will be able to lookup the events map for "testcpu",
to verify the generated tables against expected values.
The resultant generated pmu-events.c will now look like the following:
struct pmu_event pme_ampere_emag[] = {
{
.name = "ldrex_spec",
.event = "event=0x6c",
.desc = "Exclusive operation spe...",
.topic = "intrinsic",
.long_desc = "Exclusive operation ...",
},
...
};
struct pmu_event pme_test_cpu[] = {
{
.name = "uncore_hisi_ddrc.flux_wcmd",
.event = "event=0x2",
.desc = "DDRC write commands. Unit: hisi_sccl,ddrc ",
.topic = "uncore",
.long_desc = "DDRC write commands",
.pmu = "hisi_sccl,ddrc",
},
{
.name = "unc_cbo_xsnp_response.miss_eviction",
.event = "umask=0x81,event=0x22",
.desc = "Unit: uncore_cbox A cross-core snoop resulted ...",
.topic = "uncore",
.long_desc = "A cross-core snoop resulted from L3 ...",
.pmu = "uncore_cbox",
},
{
.name = "eist_trans",
.event = "umask=0x0,period=200000,event=0x3a",
.desc = "Number of Enhanced Intel SpeedStep(R) ...",
.topic = "other",
},
{
.name = 0,
},
};
struct pmu_events_map pmu_events_map[] = {
...
{
.cpuid = "0x00000000500f0000",
.version = "v1",
.type = "core",
.table = pme_ampere_emag
},
...
{
.cpuid = "testcpu",
.version = "v1",
.type = "core",
.table = pme_test_cpu,
},
{
.cpuid = 0,
.version = 0,
.type = 0,
.table = 0,
},
};
Signed-off-by: John Garry <john.garry@huawei.com>
Acked-by: Jiri Olsa <jolsa@redhat.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: James Clark <james.clark@arm.com>
Cc: Joakim Zhang <qiangqing.zhang@nxp.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Will Deacon <will@kernel.org>
Cc: linuxarm@huawei.com
Link: http://lore.kernel.org/lkml/1584442939-8911-3-git-send-email-john.garry@huawei.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2020-03-17 11:02:14 +00:00
|
|
|
sprintf(ldirname, "%s/test", start_dirname);
|
|
|
|
|
2020-10-22 11:02:27 +00:00
|
|
|
rc = nftw(ldirname, preprocess_arch_std_files, maxfds, 0);
|
|
|
|
if (rc)
|
|
|
|
goto err_processing_std_arch_event_dir;
|
|
|
|
|
perf jevents: Support test events folder
With the goal of supporting pmu-events test case, introduce support for
a test events folder.
These test events can be used for testing generation of pmu-event tables
and alias creation for any arch.
When running the pmu-events test case, these test events will be used as
the platform-agnostic events, so aliases can be created per-PMU and
validated against known expected values.
To support the test events, add a "testcpu" entry in pmu_events_map[].
The pmu-events test will be able to lookup the events map for "testcpu",
to verify the generated tables against expected values.
The resultant generated pmu-events.c will now look like the following:
struct pmu_event pme_ampere_emag[] = {
{
.name = "ldrex_spec",
.event = "event=0x6c",
.desc = "Exclusive operation spe...",
.topic = "intrinsic",
.long_desc = "Exclusive operation ...",
},
...
};
struct pmu_event pme_test_cpu[] = {
{
.name = "uncore_hisi_ddrc.flux_wcmd",
.event = "event=0x2",
.desc = "DDRC write commands. Unit: hisi_sccl,ddrc ",
.topic = "uncore",
.long_desc = "DDRC write commands",
.pmu = "hisi_sccl,ddrc",
},
{
.name = "unc_cbo_xsnp_response.miss_eviction",
.event = "umask=0x81,event=0x22",
.desc = "Unit: uncore_cbox A cross-core snoop resulted ...",
.topic = "uncore",
.long_desc = "A cross-core snoop resulted from L3 ...",
.pmu = "uncore_cbox",
},
{
.name = "eist_trans",
.event = "umask=0x0,period=200000,event=0x3a",
.desc = "Number of Enhanced Intel SpeedStep(R) ...",
.topic = "other",
},
{
.name = 0,
},
};
struct pmu_events_map pmu_events_map[] = {
...
{
.cpuid = "0x00000000500f0000",
.version = "v1",
.type = "core",
.table = pme_ampere_emag
},
...
{
.cpuid = "testcpu",
.version = "v1",
.type = "core",
.table = pme_test_cpu,
},
{
.cpuid = 0,
.version = 0,
.type = 0,
.table = 0,
},
};
Signed-off-by: John Garry <john.garry@huawei.com>
Acked-by: Jiri Olsa <jolsa@redhat.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: James Clark <james.clark@arm.com>
Cc: Joakim Zhang <qiangqing.zhang@nxp.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Will Deacon <will@kernel.org>
Cc: linuxarm@huawei.com
Link: http://lore.kernel.org/lkml/1584442939-8911-3-git-send-email-john.garry@huawei.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2020-03-17 11:02:14 +00:00
|
|
|
rc = nftw(ldirname, process_one_file, maxfds, 0);
|
2020-10-22 11:02:26 +00:00
|
|
|
if (rc)
|
|
|
|
goto err_processing_dir;
|
perf jevents: Support test events folder
With the goal of supporting pmu-events test case, introduce support for
a test events folder.
These test events can be used for testing generation of pmu-event tables
and alias creation for any arch.
When running the pmu-events test case, these test events will be used as
the platform-agnostic events, so aliases can be created per-PMU and
validated against known expected values.
To support the test events, add a "testcpu" entry in pmu_events_map[].
The pmu-events test will be able to lookup the events map for "testcpu",
to verify the generated tables against expected values.
The resultant generated pmu-events.c will now look like the following:
struct pmu_event pme_ampere_emag[] = {
{
.name = "ldrex_spec",
.event = "event=0x6c",
.desc = "Exclusive operation spe...",
.topic = "intrinsic",
.long_desc = "Exclusive operation ...",
},
...
};
struct pmu_event pme_test_cpu[] = {
{
.name = "uncore_hisi_ddrc.flux_wcmd",
.event = "event=0x2",
.desc = "DDRC write commands. Unit: hisi_sccl,ddrc ",
.topic = "uncore",
.long_desc = "DDRC write commands",
.pmu = "hisi_sccl,ddrc",
},
{
.name = "unc_cbo_xsnp_response.miss_eviction",
.event = "umask=0x81,event=0x22",
.desc = "Unit: uncore_cbox A cross-core snoop resulted ...",
.topic = "uncore",
.long_desc = "A cross-core snoop resulted from L3 ...",
.pmu = "uncore_cbox",
},
{
.name = "eist_trans",
.event = "umask=0x0,period=200000,event=0x3a",
.desc = "Number of Enhanced Intel SpeedStep(R) ...",
.topic = "other",
},
{
.name = 0,
},
};
struct pmu_events_map pmu_events_map[] = {
...
{
.cpuid = "0x00000000500f0000",
.version = "v1",
.type = "core",
.table = pme_ampere_emag
},
...
{
.cpuid = "testcpu",
.version = "v1",
.type = "core",
.table = pme_test_cpu,
},
{
.cpuid = 0,
.version = 0,
.type = 0,
.table = 0,
},
};
Signed-off-by: John Garry <john.garry@huawei.com>
Acked-by: Jiri Olsa <jolsa@redhat.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: James Clark <james.clark@arm.com>
Cc: Joakim Zhang <qiangqing.zhang@nxp.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Will Deacon <will@kernel.org>
Cc: linuxarm@huawei.com
Link: http://lore.kernel.org/lkml/1584442939-8911-3-git-send-email-john.garry@huawei.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2020-03-17 11:02:14 +00:00
|
|
|
|
perf jevents: Program to convert JSON file
This is a modified version of an earlier patch by Andi Kleen.
We expect architectures to create JSON files describing the performance
monitoring (PMU) events that each CPU model/family of the architecture
supports.
Following is an example of the JSON file entry for an x86 event:
[
...
{
"EventCode": "0x00",
"UMask": "0x01",
"EventName": "INST_RETIRED.ANY",
"BriefDescription": "Instructions retired from execution.",
"PublicDescription": "Instructions retired from execution.",
"Counter": "Fixed counter 1",
"CounterHTOff": "Fixed counter 1",
"SampleAfterValue": "2000003",
"SampleAfterValue": "2000003",
"MSRIndex": "0",
"MSRValue": "0",
"TakenAlone": "0",
"CounterMask": "0",
"Invert": "0",
"AnyThread": "0",
"EdgeDetect": "0",
"PEBS": "0",
"PRECISE_STORE": "0",
"Errata": "null",
"Offcore": "0"
},
...
]
All the PMU events supported by a CPU model/family must be grouped into
"topics" such as "Pipelining", "Floating-point", "Virtual-memory" etc.
All events belonging to a topic must be placed in a separate JSON file
(eg: "Pipelining.json") and all the topic JSON files for a CPU model must
be in a separate directory.
Eg: for the CPU model "Silvermont_core":
$ ls tools/perf/pmu-events/arch/x86/Silvermont_core
Floating-point.json
Memory.json
Other.json
Pipelining.json
Virtualmemory.json
Finally, to allow multiple CPU models to share a single set of JSON files,
architectures must provide a mapping between a model and its set of events:
$ grep Silvermont tools/perf/pmu-events/arch/x86/mapfile.csv
GenuineIntel-6-4D,V13,Silvermont_core,core
GenuineIntel-6-4C,V13,Silvermont_core,core
which maps each CPU, identified by [vendor, family, model, version, type]
to a directory of JSON files. Thus two (or more) CPU models support the
set of PMU events listed in the directory.
tools/perf/pmu-events/arch/x86/Silvermont_core/
Given this organization of files, the program, jevents:
- locates all JSON files for each CPU-model of the architecture,
- parses all JSON files for the CPU-model and generates a C-style
"PMU-events table" (pmu-events.c) for the model
- locates a mapfile for the architecture
- builds a global table, mapping each model of CPU to the corresponding
PMU-events table.
The 'pmu-events.c' is generated when building perf and added to libperf.a.
The global table pmu_events_map[] table in this pmu-events.c will be used
in perf in a follow-on patch.
If the architecture does not have any JSON files or there is an error in
processing them, an empty mapping file is created. This would allow the
build of perf to proceed even if we are not able to provide aliases for
events.
The parser for JSON files allows parsing Intel style JSON event files. This
allows to use an Intel event list directly with perf. The Intel event lists
can be quite large and are too big to store in unswappable kernel memory.
The conversion from JSON to C-style is straight forward. The parser knows
(very little) Intel specific information, and can be easily extended to
handle fields for other CPUs.
The parser code is partially shared with an independent parsing library,
which is 2-clause BSD licensed. To avoid any conflicts I marked those
files as BSD licensed too. As part of perf they become GPLv2.
Committer notes:
Fixes:
1) Limit maxfds to 512 to avoid nftd() segfaulting on alloca() with a
big rlim_max, as in docker containers - acme
2) Make jevents a hostprog, supporting cross compilation - jolsa
3) Use HOSTCC for jevents final step - acme
4) Define _GNU_SOURCE for asprintf, as we can't use CC's EXTRA_CFLAGS,
that has to have --sysroot on the Android NDK 24 - acme
5) Removed $(srctree)/tools/perf/pmu-events/pmu-events.c from the
'clean' target, it is generated on $(OUTPUT)pmu-events/pmu-events.c,
which is already taken care of in the original patch - acme
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Jiri Olsa <jolsa@redhat.com>
Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Acked-by: Ingo Molnar <mingo@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Cc: linuxppc-dev@lists.ozlabs.org
Link: http://lkml.kernel.org/r/1473978296-20712-3-git-send-email-sukadev@linux.vnet.ibm.com
Link: http://lkml.kernel.org/r/20160927141846.GA6589@krava
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-19 20:39:33 +00:00
|
|
|
if (close_table)
|
|
|
|
print_events_table_suffix(eventsfp);
|
|
|
|
|
|
|
|
if (!mapfile) {
|
|
|
|
pr_info("%s: No CPU->JSON mapping?\n", prog);
|
2020-10-22 11:02:26 +00:00
|
|
|
empty_map = 1;
|
|
|
|
goto err_close_eventsfp;
|
perf jevents: Program to convert JSON file
This is a modified version of an earlier patch by Andi Kleen.
We expect architectures to create JSON files describing the performance
monitoring (PMU) events that each CPU model/family of the architecture
supports.
Following is an example of the JSON file entry for an x86 event:
[
...
{
"EventCode": "0x00",
"UMask": "0x01",
"EventName": "INST_RETIRED.ANY",
"BriefDescription": "Instructions retired from execution.",
"PublicDescription": "Instructions retired from execution.",
"Counter": "Fixed counter 1",
"CounterHTOff": "Fixed counter 1",
"SampleAfterValue": "2000003",
"SampleAfterValue": "2000003",
"MSRIndex": "0",
"MSRValue": "0",
"TakenAlone": "0",
"CounterMask": "0",
"Invert": "0",
"AnyThread": "0",
"EdgeDetect": "0",
"PEBS": "0",
"PRECISE_STORE": "0",
"Errata": "null",
"Offcore": "0"
},
...
]
All the PMU events supported by a CPU model/family must be grouped into
"topics" such as "Pipelining", "Floating-point", "Virtual-memory" etc.
All events belonging to a topic must be placed in a separate JSON file
(eg: "Pipelining.json") and all the topic JSON files for a CPU model must
be in a separate directory.
Eg: for the CPU model "Silvermont_core":
$ ls tools/perf/pmu-events/arch/x86/Silvermont_core
Floating-point.json
Memory.json
Other.json
Pipelining.json
Virtualmemory.json
Finally, to allow multiple CPU models to share a single set of JSON files,
architectures must provide a mapping between a model and its set of events:
$ grep Silvermont tools/perf/pmu-events/arch/x86/mapfile.csv
GenuineIntel-6-4D,V13,Silvermont_core,core
GenuineIntel-6-4C,V13,Silvermont_core,core
which maps each CPU, identified by [vendor, family, model, version, type]
to a directory of JSON files. Thus two (or more) CPU models support the
set of PMU events listed in the directory.
tools/perf/pmu-events/arch/x86/Silvermont_core/
Given this organization of files, the program, jevents:
- locates all JSON files for each CPU-model of the architecture,
- parses all JSON files for the CPU-model and generates a C-style
"PMU-events table" (pmu-events.c) for the model
- locates a mapfile for the architecture
- builds a global table, mapping each model of CPU to the corresponding
PMU-events table.
The 'pmu-events.c' is generated when building perf and added to libperf.a.
The global table pmu_events_map[] table in this pmu-events.c will be used
in perf in a follow-on patch.
If the architecture does not have any JSON files or there is an error in
processing them, an empty mapping file is created. This would allow the
build of perf to proceed even if we are not able to provide aliases for
events.
The parser for JSON files allows parsing Intel style JSON event files. This
allows to use an Intel event list directly with perf. The Intel event lists
can be quite large and are too big to store in unswappable kernel memory.
The conversion from JSON to C-style is straight forward. The parser knows
(very little) Intel specific information, and can be easily extended to
handle fields for other CPUs.
The parser code is partially shared with an independent parsing library,
which is 2-clause BSD licensed. To avoid any conflicts I marked those
files as BSD licensed too. As part of perf they become GPLv2.
Committer notes:
Fixes:
1) Limit maxfds to 512 to avoid nftd() segfaulting on alloca() with a
big rlim_max, as in docker containers - acme
2) Make jevents a hostprog, supporting cross compilation - jolsa
3) Use HOSTCC for jevents final step - acme
4) Define _GNU_SOURCE for asprintf, as we can't use CC's EXTRA_CFLAGS,
that has to have --sysroot on the Android NDK 24 - acme
5) Removed $(srctree)/tools/perf/pmu-events/pmu-events.c from the
'clean' target, it is generated on $(OUTPUT)pmu-events/pmu-events.c,
which is already taken care of in the original patch - acme
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Jiri Olsa <jolsa@redhat.com>
Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Acked-by: Ingo Molnar <mingo@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Cc: linuxppc-dev@lists.ozlabs.org
Link: http://lkml.kernel.org/r/1473978296-20712-3-git-send-email-sukadev@linux.vnet.ibm.com
Link: http://lkml.kernel.org/r/20160927141846.GA6589@krava
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-19 20:39:33 +00:00
|
|
|
}
|
|
|
|
|
2020-10-22 11:02:26 +00:00
|
|
|
rc = process_mapfile(eventsfp, mapfile);
|
|
|
|
if (rc) {
|
perf jevents: Program to convert JSON file
This is a modified version of an earlier patch by Andi Kleen.
We expect architectures to create JSON files describing the performance
monitoring (PMU) events that each CPU model/family of the architecture
supports.
Following is an example of the JSON file entry for an x86 event:
[
...
{
"EventCode": "0x00",
"UMask": "0x01",
"EventName": "INST_RETIRED.ANY",
"BriefDescription": "Instructions retired from execution.",
"PublicDescription": "Instructions retired from execution.",
"Counter": "Fixed counter 1",
"CounterHTOff": "Fixed counter 1",
"SampleAfterValue": "2000003",
"SampleAfterValue": "2000003",
"MSRIndex": "0",
"MSRValue": "0",
"TakenAlone": "0",
"CounterMask": "0",
"Invert": "0",
"AnyThread": "0",
"EdgeDetect": "0",
"PEBS": "0",
"PRECISE_STORE": "0",
"Errata": "null",
"Offcore": "0"
},
...
]
All the PMU events supported by a CPU model/family must be grouped into
"topics" such as "Pipelining", "Floating-point", "Virtual-memory" etc.
All events belonging to a topic must be placed in a separate JSON file
(eg: "Pipelining.json") and all the topic JSON files for a CPU model must
be in a separate directory.
Eg: for the CPU model "Silvermont_core":
$ ls tools/perf/pmu-events/arch/x86/Silvermont_core
Floating-point.json
Memory.json
Other.json
Pipelining.json
Virtualmemory.json
Finally, to allow multiple CPU models to share a single set of JSON files,
architectures must provide a mapping between a model and its set of events:
$ grep Silvermont tools/perf/pmu-events/arch/x86/mapfile.csv
GenuineIntel-6-4D,V13,Silvermont_core,core
GenuineIntel-6-4C,V13,Silvermont_core,core
which maps each CPU, identified by [vendor, family, model, version, type]
to a directory of JSON files. Thus two (or more) CPU models support the
set of PMU events listed in the directory.
tools/perf/pmu-events/arch/x86/Silvermont_core/
Given this organization of files, the program, jevents:
- locates all JSON files for each CPU-model of the architecture,
- parses all JSON files for the CPU-model and generates a C-style
"PMU-events table" (pmu-events.c) for the model
- locates a mapfile for the architecture
- builds a global table, mapping each model of CPU to the corresponding
PMU-events table.
The 'pmu-events.c' is generated when building perf and added to libperf.a.
The global table pmu_events_map[] table in this pmu-events.c will be used
in perf in a follow-on patch.
If the architecture does not have any JSON files or there is an error in
processing them, an empty mapping file is created. This would allow the
build of perf to proceed even if we are not able to provide aliases for
events.
The parser for JSON files allows parsing Intel style JSON event files. This
allows to use an Intel event list directly with perf. The Intel event lists
can be quite large and are too big to store in unswappable kernel memory.
The conversion from JSON to C-style is straight forward. The parser knows
(very little) Intel specific information, and can be easily extended to
handle fields for other CPUs.
The parser code is partially shared with an independent parsing library,
which is 2-clause BSD licensed. To avoid any conflicts I marked those
files as BSD licensed too. As part of perf they become GPLv2.
Committer notes:
Fixes:
1) Limit maxfds to 512 to avoid nftd() segfaulting on alloca() with a
big rlim_max, as in docker containers - acme
2) Make jevents a hostprog, supporting cross compilation - jolsa
3) Use HOSTCC for jevents final step - acme
4) Define _GNU_SOURCE for asprintf, as we can't use CC's EXTRA_CFLAGS,
that has to have --sysroot on the Android NDK 24 - acme
5) Removed $(srctree)/tools/perf/pmu-events/pmu-events.c from the
'clean' target, it is generated on $(OUTPUT)pmu-events/pmu-events.c,
which is already taken care of in the original patch - acme
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Jiri Olsa <jolsa@redhat.com>
Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Acked-by: Ingo Molnar <mingo@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Cc: linuxppc-dev@lists.ozlabs.org
Link: http://lkml.kernel.org/r/1473978296-20712-3-git-send-email-sukadev@linux.vnet.ibm.com
Link: http://lkml.kernel.org/r/20160927141846.GA6589@krava
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-19 20:39:33 +00:00
|
|
|
pr_info("%s: Error processing mapfile %s\n", prog, mapfile);
|
2017-07-25 00:16:38 +00:00
|
|
|
/* Make build fail */
|
perf jevents: Add support for system events tables
Process the JSONs to find support for "system" events, which are not
tied to a specific CPUID.
A "COMPAT" property is now used to match against the namespace ID from
the kernel PMU driver.
The generated pmu-events.c will now have 2 tables:
a. CPU events, as before.
b. New pmu_sys_event_tables[] table, which will have events matched to
specific SoCs.
It will look like this:
struct pmu_event pme_hisilicon_hip09_sys[] = {
{
.name = "cycles",
.compat = "0x00030736",
.event = "event=0",
.desc = "Clock cycles",
.topic = "smmu v3 pmcg",
.long_desc = "Clock cycles",
},
{
.name = "smmuv3_pmcg.l1_tlb",
.compat = "0x00030736",
.event = "event=0x8a",
.desc = "SMMUv3 PMCG l1_tlb. Unit: smmuv3_pmcg ",
.topic = "smmu v3 pmcg",
.long_desc = "SMMUv3 PMCG l1_tlb",
.pmu = "smmuv3_pmcg",
},
...
};
struct pmu_event pme_arm_cortex_a53[] = {
{
.name = "ext_mem_req",
.event = "event=0xc0",
.desc = "External memory request",
.topic = "memory",
},
{
.name = "ext_mem_req_nc",
.event = "event=0xc1",
.desc = "Non-cacheable external memory request",
.topic = "memory",
},
...
};
struct pmu_event pme_hisilicon_hip09_cpu[] = {
{
.name = "l2d_cache_refill_wr",
.event = "event=0x53",
.desc = "L2D cache refill, write",
.topic = "core imp def",
.long_desc = "Attributable Level 2 data cache refill, write",
},
...
};
struct pmu_events_map pmu_events_map[] = {
{
.cpuid = "0x00000000410fd030",
.version = "v1",
.type = "core",
.table = pme_arm_cortex_a53
},
{
.cpuid = "0x00000000480fd010",
.version = "v1",
.type = "core",
.table = pme_hisilicon_hip09_cpu
},
{
.table = 0
},
};
struct pmu_event pme_hisilicon_hip09_cpu[] = {
{
.name = "uncore_hisi_l3c.rd_cpipe",
.event = "event=0",
.desc = "Total read accesses. Unit: hisi_sccl,l3c ",
.topic = "uncore l3c",
.long_desc = "Total read accesses",
.pmu = "hisi_sccl,l3c",
},
{
.name = "uncore_hisi_l3c.wr_cpipe",
.event = "event=0x1",
.desc = "Total write accesses. Unit: hisi_sccl,l3c ",
.topic = "uncore l3c",
.long_desc = "Total write accesses",
.pmu = "hisi_sccl,l3c",
},
...
};
struct pmu_sys_events pmu_sys_event_tables[] = {
{
.table = pme_hisilicon_hip09_sys,
},
...
};
Committer notes:
Added the fix for architectures without PMU events, provided by John
after I reported the build failing in such systems.
Link: https://lore.kernel.org/lkml/650baaf2-36b6-a9e2-ff49-963ef864c1f3@huawei.com/
Signed-off-by: John Garry <john.garry@huawei.com>
Acked-by: Kajol Jain <kjain@linux.ibm.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Ian Rogers <irogers@google.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Joakim Zhang <qiangqing.zhang@nxp.com>
Cc: Kan Liang <kan.liang@linux.intel.com>
Cc: Kim Phillips <kim.phillips@amd.com>
Cc: Leo Yan <leo.yan@linaro.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Shaokun Zhang <zhangshaokun@hisilicon.com>
Cc: Will Deacon <will@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linuxarm@huawei.com
Link: http://lore.kernel.org/lkml/1607080216-36968-3-git-send-email-john.garry@huawei.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2020-12-04 11:10:08 +00:00
|
|
|
ret = 1;
|
|
|
|
goto err_close_eventsfp;
|
|
|
|
}
|
|
|
|
|
|
|
|
rc = process_system_event_tables(eventsfp);
|
|
|
|
fclose(eventsfp);
|
|
|
|
if (rc) {
|
2020-03-05 11:08:01 +00:00
|
|
|
ret = 1;
|
2020-10-22 11:02:26 +00:00
|
|
|
goto err_out;
|
perf jevents: Program to convert JSON file
This is a modified version of an earlier patch by Andi Kleen.
We expect architectures to create JSON files describing the performance
monitoring (PMU) events that each CPU model/family of the architecture
supports.
Following is an example of the JSON file entry for an x86 event:
[
...
{
"EventCode": "0x00",
"UMask": "0x01",
"EventName": "INST_RETIRED.ANY",
"BriefDescription": "Instructions retired from execution.",
"PublicDescription": "Instructions retired from execution.",
"Counter": "Fixed counter 1",
"CounterHTOff": "Fixed counter 1",
"SampleAfterValue": "2000003",
"SampleAfterValue": "2000003",
"MSRIndex": "0",
"MSRValue": "0",
"TakenAlone": "0",
"CounterMask": "0",
"Invert": "0",
"AnyThread": "0",
"EdgeDetect": "0",
"PEBS": "0",
"PRECISE_STORE": "0",
"Errata": "null",
"Offcore": "0"
},
...
]
All the PMU events supported by a CPU model/family must be grouped into
"topics" such as "Pipelining", "Floating-point", "Virtual-memory" etc.
All events belonging to a topic must be placed in a separate JSON file
(eg: "Pipelining.json") and all the topic JSON files for a CPU model must
be in a separate directory.
Eg: for the CPU model "Silvermont_core":
$ ls tools/perf/pmu-events/arch/x86/Silvermont_core
Floating-point.json
Memory.json
Other.json
Pipelining.json
Virtualmemory.json
Finally, to allow multiple CPU models to share a single set of JSON files,
architectures must provide a mapping between a model and its set of events:
$ grep Silvermont tools/perf/pmu-events/arch/x86/mapfile.csv
GenuineIntel-6-4D,V13,Silvermont_core,core
GenuineIntel-6-4C,V13,Silvermont_core,core
which maps each CPU, identified by [vendor, family, model, version, type]
to a directory of JSON files. Thus two (or more) CPU models support the
set of PMU events listed in the directory.
tools/perf/pmu-events/arch/x86/Silvermont_core/
Given this organization of files, the program, jevents:
- locates all JSON files for each CPU-model of the architecture,
- parses all JSON files for the CPU-model and generates a C-style
"PMU-events table" (pmu-events.c) for the model
- locates a mapfile for the architecture
- builds a global table, mapping each model of CPU to the corresponding
PMU-events table.
The 'pmu-events.c' is generated when building perf and added to libperf.a.
The global table pmu_events_map[] table in this pmu-events.c will be used
in perf in a follow-on patch.
If the architecture does not have any JSON files or there is an error in
processing them, an empty mapping file is created. This would allow the
build of perf to proceed even if we are not able to provide aliases for
events.
The parser for JSON files allows parsing Intel style JSON event files. This
allows to use an Intel event list directly with perf. The Intel event lists
can be quite large and are too big to store in unswappable kernel memory.
The conversion from JSON to C-style is straight forward. The parser knows
(very little) Intel specific information, and can be easily extended to
handle fields for other CPUs.
The parser code is partially shared with an independent parsing library,
which is 2-clause BSD licensed. To avoid any conflicts I marked those
files as BSD licensed too. As part of perf they become GPLv2.
Committer notes:
Fixes:
1) Limit maxfds to 512 to avoid nftd() segfaulting on alloca() with a
big rlim_max, as in docker containers - acme
2) Make jevents a hostprog, supporting cross compilation - jolsa
3) Use HOSTCC for jevents final step - acme
4) Define _GNU_SOURCE for asprintf, as we can't use CC's EXTRA_CFLAGS,
that has to have --sysroot on the Android NDK 24 - acme
5) Removed $(srctree)/tools/perf/pmu-events/pmu-events.c from the
'clean' target, it is generated on $(OUTPUT)pmu-events/pmu-events.c,
which is already taken care of in the original patch - acme
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Jiri Olsa <jolsa@redhat.com>
Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Acked-by: Ingo Molnar <mingo@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Cc: linuxppc-dev@lists.ozlabs.org
Link: http://lkml.kernel.org/r/1473978296-20712-3-git-send-email-sukadev@linux.vnet.ibm.com
Link: http://lkml.kernel.org/r/20160927141846.GA6589@krava
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-19 20:39:33 +00:00
|
|
|
}
|
|
|
|
|
2020-10-22 11:02:26 +00:00
|
|
|
free_arch_std_events();
|
|
|
|
free(mapfile);
|
|
|
|
return 0;
|
2020-03-05 11:08:01 +00:00
|
|
|
|
2020-10-22 11:02:26 +00:00
|
|
|
err_processing_std_arch_event_dir:
|
|
|
|
err_string_ext = " for std arch event";
|
|
|
|
err_processing_dir:
|
|
|
|
if (verbose) {
|
|
|
|
pr_info("%s: Error walking file tree %s%s\n", prog, ldirname,
|
|
|
|
err_string_ext);
|
|
|
|
empty_map = 1;
|
|
|
|
} else if (rc < 0) {
|
|
|
|
ret = 1;
|
|
|
|
} else {
|
|
|
|
empty_map = 1;
|
|
|
|
}
|
|
|
|
err_close_eventsfp:
|
perf jevents: Program to convert JSON file
This is a modified version of an earlier patch by Andi Kleen.
We expect architectures to create JSON files describing the performance
monitoring (PMU) events that each CPU model/family of the architecture
supports.
Following is an example of the JSON file entry for an x86 event:
[
...
{
"EventCode": "0x00",
"UMask": "0x01",
"EventName": "INST_RETIRED.ANY",
"BriefDescription": "Instructions retired from execution.",
"PublicDescription": "Instructions retired from execution.",
"Counter": "Fixed counter 1",
"CounterHTOff": "Fixed counter 1",
"SampleAfterValue": "2000003",
"SampleAfterValue": "2000003",
"MSRIndex": "0",
"MSRValue": "0",
"TakenAlone": "0",
"CounterMask": "0",
"Invert": "0",
"AnyThread": "0",
"EdgeDetect": "0",
"PEBS": "0",
"PRECISE_STORE": "0",
"Errata": "null",
"Offcore": "0"
},
...
]
All the PMU events supported by a CPU model/family must be grouped into
"topics" such as "Pipelining", "Floating-point", "Virtual-memory" etc.
All events belonging to a topic must be placed in a separate JSON file
(eg: "Pipelining.json") and all the topic JSON files for a CPU model must
be in a separate directory.
Eg: for the CPU model "Silvermont_core":
$ ls tools/perf/pmu-events/arch/x86/Silvermont_core
Floating-point.json
Memory.json
Other.json
Pipelining.json
Virtualmemory.json
Finally, to allow multiple CPU models to share a single set of JSON files,
architectures must provide a mapping between a model and its set of events:
$ grep Silvermont tools/perf/pmu-events/arch/x86/mapfile.csv
GenuineIntel-6-4D,V13,Silvermont_core,core
GenuineIntel-6-4C,V13,Silvermont_core,core
which maps each CPU, identified by [vendor, family, model, version, type]
to a directory of JSON files. Thus two (or more) CPU models support the
set of PMU events listed in the directory.
tools/perf/pmu-events/arch/x86/Silvermont_core/
Given this organization of files, the program, jevents:
- locates all JSON files for each CPU-model of the architecture,
- parses all JSON files for the CPU-model and generates a C-style
"PMU-events table" (pmu-events.c) for the model
- locates a mapfile for the architecture
- builds a global table, mapping each model of CPU to the corresponding
PMU-events table.
The 'pmu-events.c' is generated when building perf and added to libperf.a.
The global table pmu_events_map[] table in this pmu-events.c will be used
in perf in a follow-on patch.
If the architecture does not have any JSON files or there is an error in
processing them, an empty mapping file is created. This would allow the
build of perf to proceed even if we are not able to provide aliases for
events.
The parser for JSON files allows parsing Intel style JSON event files. This
allows to use an Intel event list directly with perf. The Intel event lists
can be quite large and are too big to store in unswappable kernel memory.
The conversion from JSON to C-style is straight forward. The parser knows
(very little) Intel specific information, and can be easily extended to
handle fields for other CPUs.
The parser code is partially shared with an independent parsing library,
which is 2-clause BSD licensed. To avoid any conflicts I marked those
files as BSD licensed too. As part of perf they become GPLv2.
Committer notes:
Fixes:
1) Limit maxfds to 512 to avoid nftd() segfaulting on alloca() with a
big rlim_max, as in docker containers - acme
2) Make jevents a hostprog, supporting cross compilation - jolsa
3) Use HOSTCC for jevents final step - acme
4) Define _GNU_SOURCE for asprintf, as we can't use CC's EXTRA_CFLAGS,
that has to have --sysroot on the Android NDK 24 - acme
5) Removed $(srctree)/tools/perf/pmu-events/pmu-events.c from the
'clean' target, it is generated on $(OUTPUT)pmu-events/pmu-events.c,
which is already taken care of in the original patch - acme
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Jiri Olsa <jolsa@redhat.com>
Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Acked-by: Ingo Molnar <mingo@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Cc: linuxppc-dev@lists.ozlabs.org
Link: http://lkml.kernel.org/r/1473978296-20712-3-git-send-email-sukadev@linux.vnet.ibm.com
Link: http://lkml.kernel.org/r/20160927141846.GA6589@krava
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-19 20:39:33 +00:00
|
|
|
fclose(eventsfp);
|
2020-10-22 11:02:26 +00:00
|
|
|
if (empty_map)
|
|
|
|
create_empty_mapping(output_file);
|
|
|
|
err_out:
|
perf vendor events: Add support for arch standard events
For some architectures (like arm), there are architecture- defined
events. Sometimes these events may be "recommended" according to the
architecture standard, in that the implementer is free ignore the
"recommendation" and create its custom event.
This patch adds support for parsing standard events from arch-defined
JSONs, and fixing up vendor events when they have implemented these
events as standard.
Support is also ensured that the vendor may implement their own custom
events.
A new step is added to the pmu events parsing to fix up the vendor
events with the arch-standard events.
The arch-defined JSONs must be placed in the arch root folder for
preprocessing prior to tree JSON processing.
In the vendor JSON, to specify that the arch event is supported, the
keyword "ArchStdEvent" should be used, like this:
[
{
"ArchStdEvent": "L1D_CACHE_WR",
},
]
Matching is based on the "EventName" field in the architecture JSON.
No other JSON objects are strictly required. However, for other objects
added, these take precedence over architecture defined standard events,
thus supporting separate events which have the same event code.
Signed-off-by: John Garry <john.garry@huawei.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Ganapatrao Kulkarni <ganapatrao.kulkarni@cavium.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Shaokun Zhang <zhangshaokun@hisilicon.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: William Cohen <wcohen@redhat.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linuxarm@huawei.com
Link: http://lkml.kernel.org/r/1520506716-197429-8-git-send-email-john.garry@huawei.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2018-03-08 10:58:32 +00:00
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free_arch_std_events();
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2020-03-05 11:08:01 +00:00
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free(mapfile);
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return ret;
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perf jevents: Program to convert JSON file
This is a modified version of an earlier patch by Andi Kleen.
We expect architectures to create JSON files describing the performance
monitoring (PMU) events that each CPU model/family of the architecture
supports.
Following is an example of the JSON file entry for an x86 event:
[
...
{
"EventCode": "0x00",
"UMask": "0x01",
"EventName": "INST_RETIRED.ANY",
"BriefDescription": "Instructions retired from execution.",
"PublicDescription": "Instructions retired from execution.",
"Counter": "Fixed counter 1",
"CounterHTOff": "Fixed counter 1",
"SampleAfterValue": "2000003",
"SampleAfterValue": "2000003",
"MSRIndex": "0",
"MSRValue": "0",
"TakenAlone": "0",
"CounterMask": "0",
"Invert": "0",
"AnyThread": "0",
"EdgeDetect": "0",
"PEBS": "0",
"PRECISE_STORE": "0",
"Errata": "null",
"Offcore": "0"
},
...
]
All the PMU events supported by a CPU model/family must be grouped into
"topics" such as "Pipelining", "Floating-point", "Virtual-memory" etc.
All events belonging to a topic must be placed in a separate JSON file
(eg: "Pipelining.json") and all the topic JSON files for a CPU model must
be in a separate directory.
Eg: for the CPU model "Silvermont_core":
$ ls tools/perf/pmu-events/arch/x86/Silvermont_core
Floating-point.json
Memory.json
Other.json
Pipelining.json
Virtualmemory.json
Finally, to allow multiple CPU models to share a single set of JSON files,
architectures must provide a mapping between a model and its set of events:
$ grep Silvermont tools/perf/pmu-events/arch/x86/mapfile.csv
GenuineIntel-6-4D,V13,Silvermont_core,core
GenuineIntel-6-4C,V13,Silvermont_core,core
which maps each CPU, identified by [vendor, family, model, version, type]
to a directory of JSON files. Thus two (or more) CPU models support the
set of PMU events listed in the directory.
tools/perf/pmu-events/arch/x86/Silvermont_core/
Given this organization of files, the program, jevents:
- locates all JSON files for each CPU-model of the architecture,
- parses all JSON files for the CPU-model and generates a C-style
"PMU-events table" (pmu-events.c) for the model
- locates a mapfile for the architecture
- builds a global table, mapping each model of CPU to the corresponding
PMU-events table.
The 'pmu-events.c' is generated when building perf and added to libperf.a.
The global table pmu_events_map[] table in this pmu-events.c will be used
in perf in a follow-on patch.
If the architecture does not have any JSON files or there is an error in
processing them, an empty mapping file is created. This would allow the
build of perf to proceed even if we are not able to provide aliases for
events.
The parser for JSON files allows parsing Intel style JSON event files. This
allows to use an Intel event list directly with perf. The Intel event lists
can be quite large and are too big to store in unswappable kernel memory.
The conversion from JSON to C-style is straight forward. The parser knows
(very little) Intel specific information, and can be easily extended to
handle fields for other CPUs.
The parser code is partially shared with an independent parsing library,
which is 2-clause BSD licensed. To avoid any conflicts I marked those
files as BSD licensed too. As part of perf they become GPLv2.
Committer notes:
Fixes:
1) Limit maxfds to 512 to avoid nftd() segfaulting on alloca() with a
big rlim_max, as in docker containers - acme
2) Make jevents a hostprog, supporting cross compilation - jolsa
3) Use HOSTCC for jevents final step - acme
4) Define _GNU_SOURCE for asprintf, as we can't use CC's EXTRA_CFLAGS,
that has to have --sysroot on the Android NDK 24 - acme
5) Removed $(srctree)/tools/perf/pmu-events/pmu-events.c from the
'clean' target, it is generated on $(OUTPUT)pmu-events/pmu-events.c,
which is already taken care of in the original patch - acme
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Jiri Olsa <jolsa@redhat.com>
Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Acked-by: Ingo Molnar <mingo@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Cc: linuxppc-dev@lists.ozlabs.org
Link: http://lkml.kernel.org/r/1473978296-20712-3-git-send-email-sukadev@linux.vnet.ibm.com
Link: http://lkml.kernel.org/r/20160927141846.GA6589@krava
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-19 20:39:33 +00:00
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}
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