2007-10-10 09:29:43 +00:00
|
|
|
/*
|
|
|
|
* Driver for the Atmel USBA high speed USB device controller
|
|
|
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*
|
|
|
|
* Copyright (C) 2005-2007 Atmel Corporation
|
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*
|
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* This program is free software; you can redistribute it and/or modify
|
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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|
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|
*/
|
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|
|
#include <linux/clk.h>
|
2015-01-06 13:46:58 +00:00
|
|
|
#include <linux/clk/at91_pmc.h>
|
2007-10-10 09:29:43 +00:00
|
|
|
#include <linux/module.h>
|
|
|
|
#include <linux/init.h>
|
|
|
|
#include <linux/interrupt.h>
|
|
|
|
#include <linux/io.h>
|
include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h
percpu.h is included by sched.h and module.h and thus ends up being
included when building most .c files. percpu.h includes slab.h which
in turn includes gfp.h making everything defined by the two files
universally available and complicating inclusion dependencies.
percpu.h -> slab.h dependency is about to be removed. Prepare for
this change by updating users of gfp and slab facilities include those
headers directly instead of assuming availability. As this conversion
needs to touch large number of source files, the following script is
used as the basis of conversion.
http://userweb.kernel.org/~tj/misc/slabh-sweep.py
The script does the followings.
* Scan files for gfp and slab usages and update includes such that
only the necessary includes are there. ie. if only gfp is used,
gfp.h, if slab is used, slab.h.
* When the script inserts a new include, it looks at the include
blocks and try to put the new include such that its order conforms
to its surrounding. It's put in the include block which contains
core kernel includes, in the same order that the rest are ordered -
alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
doesn't seem to be any matching order.
* If the script can't find a place to put a new include (mostly
because the file doesn't have fitting include block), it prints out
an error message indicating which .h file needs to be added to the
file.
The conversion was done in the following steps.
1. The initial automatic conversion of all .c files updated slightly
over 4000 files, deleting around 700 includes and adding ~480 gfp.h
and ~3000 slab.h inclusions. The script emitted errors for ~400
files.
2. Each error was manually checked. Some didn't need the inclusion,
some needed manual addition while adding it to implementation .h or
embedding .c file was more appropriate for others. This step added
inclusions to around 150 files.
3. The script was run again and the output was compared to the edits
from #2 to make sure no file was left behind.
4. Several build tests were done and a couple of problems were fixed.
e.g. lib/decompress_*.c used malloc/free() wrappers around slab
APIs requiring slab.h to be added manually.
5. The script was run on all .h files but without automatically
editing them as sprinkling gfp.h and slab.h inclusions around .h
files could easily lead to inclusion dependency hell. Most gfp.h
inclusion directives were ignored as stuff from gfp.h was usually
wildly available and often used in preprocessor macros. Each
slab.h inclusion directive was examined and added manually as
necessary.
6. percpu.h was updated not to include slab.h.
7. Build test were done on the following configurations and failures
were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my
distributed build env didn't work with gcov compiles) and a few
more options had to be turned off depending on archs to make things
build (like ipr on powerpc/64 which failed due to missing writeq).
* x86 and x86_64 UP and SMP allmodconfig and a custom test config.
* powerpc and powerpc64 SMP allmodconfig
* sparc and sparc64 SMP allmodconfig
* ia64 SMP allmodconfig
* s390 SMP allmodconfig
* alpha SMP allmodconfig
* um on x86_64 SMP allmodconfig
8. percpu.h modifications were reverted so that it could be applied as
a separate patch and serve as bisection point.
Given the fact that I had only a couple of failures from tests on step
6, I'm fairly confident about the coverage of this conversion patch.
If there is a breakage, it's likely to be something in one of the arch
headers which should be easily discoverable easily on most builds of
the specific arch.
Signed-off-by: Tejun Heo <tj@kernel.org>
Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
2010-03-24 08:04:11 +00:00
|
|
|
#include <linux/slab.h>
|
2007-10-10 09:29:43 +00:00
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|
#include <linux/device.h>
|
|
|
|
#include <linux/dma-mapping.h>
|
|
|
|
#include <linux/list.h>
|
2015-09-30 10:57:10 +00:00
|
|
|
#include <linux/mfd/syscon.h>
|
2007-10-10 09:29:43 +00:00
|
|
|
#include <linux/platform_device.h>
|
2015-09-30 10:57:10 +00:00
|
|
|
#include <linux/regmap.h>
|
2017-01-23 14:45:59 +00:00
|
|
|
#include <linux/ctype.h>
|
2007-10-10 09:29:43 +00:00
|
|
|
#include <linux/usb/ch9.h>
|
|
|
|
#include <linux/usb/gadget.h>
|
2008-03-04 23:00:00 +00:00
|
|
|
#include <linux/usb/atmel_usba_udc.h>
|
2007-10-10 09:29:43 +00:00
|
|
|
#include <linux/delay.h>
|
2013-05-03 12:22:57 +00:00
|
|
|
#include <linux/of.h>
|
|
|
|
#include <linux/of_gpio.h>
|
2007-10-10 09:29:43 +00:00
|
|
|
|
|
|
|
#include "atmel_usba_udc.h"
|
|
|
|
|
|
|
|
#ifdef CONFIG_USB_GADGET_DEBUG_FS
|
|
|
|
#include <linux/debugfs.h>
|
|
|
|
#include <linux/uaccess.h>
|
|
|
|
|
|
|
|
static int queue_dbg_open(struct inode *inode, struct file *file)
|
|
|
|
{
|
|
|
|
struct usba_ep *ep = inode->i_private;
|
|
|
|
struct usba_request *req, *req_copy;
|
|
|
|
struct list_head *queue_data;
|
|
|
|
|
|
|
|
queue_data = kmalloc(sizeof(*queue_data), GFP_KERNEL);
|
|
|
|
if (!queue_data)
|
|
|
|
return -ENOMEM;
|
|
|
|
INIT_LIST_HEAD(queue_data);
|
|
|
|
|
|
|
|
spin_lock_irq(&ep->udc->lock);
|
|
|
|
list_for_each_entry(req, &ep->queue, queue) {
|
2010-05-15 21:15:44 +00:00
|
|
|
req_copy = kmemdup(req, sizeof(*req_copy), GFP_ATOMIC);
|
2007-10-10 09:29:43 +00:00
|
|
|
if (!req_copy)
|
|
|
|
goto fail;
|
|
|
|
list_add_tail(&req_copy->queue, queue_data);
|
|
|
|
}
|
|
|
|
spin_unlock_irq(&ep->udc->lock);
|
|
|
|
|
|
|
|
file->private_data = queue_data;
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
fail:
|
|
|
|
spin_unlock_irq(&ep->udc->lock);
|
|
|
|
list_for_each_entry_safe(req, req_copy, queue_data, queue) {
|
|
|
|
list_del(&req->queue);
|
|
|
|
kfree(req);
|
|
|
|
}
|
|
|
|
kfree(queue_data);
|
|
|
|
return -ENOMEM;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* bbbbbbbb llllllll IZS sssss nnnn FDL\n\0
|
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|
|
*
|
|
|
|
* b: buffer address
|
|
|
|
* l: buffer length
|
|
|
|
* I/i: interrupt/no interrupt
|
|
|
|
* Z/z: zero/no zero
|
|
|
|
* S/s: short ok/short not ok
|
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|
|
* s: status
|
|
|
|
* n: nr_packets
|
|
|
|
* F/f: submitted/not submitted to FIFO
|
|
|
|
* D/d: using/not using DMA
|
|
|
|
* L/l: last transaction/not last transaction
|
|
|
|
*/
|
|
|
|
static ssize_t queue_dbg_read(struct file *file, char __user *buf,
|
|
|
|
size_t nbytes, loff_t *ppos)
|
|
|
|
{
|
|
|
|
struct list_head *queue = file->private_data;
|
|
|
|
struct usba_request *req, *tmp_req;
|
|
|
|
size_t len, remaining, actual = 0;
|
|
|
|
char tmpbuf[38];
|
|
|
|
|
|
|
|
if (!access_ok(VERIFY_WRITE, buf, nbytes))
|
|
|
|
return -EFAULT;
|
|
|
|
|
2016-01-22 20:40:57 +00:00
|
|
|
inode_lock(file_inode(file));
|
2007-10-10 09:29:43 +00:00
|
|
|
list_for_each_entry_safe(req, tmp_req, queue, queue) {
|
|
|
|
len = snprintf(tmpbuf, sizeof(tmpbuf),
|
|
|
|
"%8p %08x %c%c%c %5d %c%c%c\n",
|
|
|
|
req->req.buf, req->req.length,
|
|
|
|
req->req.no_interrupt ? 'i' : 'I',
|
|
|
|
req->req.zero ? 'Z' : 'z',
|
|
|
|
req->req.short_not_ok ? 's' : 'S',
|
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|
|
req->req.status,
|
|
|
|
req->submitted ? 'F' : 'f',
|
|
|
|
req->using_dma ? 'D' : 'd',
|
|
|
|
req->last_transaction ? 'L' : 'l');
|
|
|
|
len = min(len, sizeof(tmpbuf));
|
|
|
|
if (len > nbytes)
|
|
|
|
break;
|
|
|
|
|
|
|
|
list_del(&req->queue);
|
|
|
|
kfree(req);
|
|
|
|
|
|
|
|
remaining = __copy_to_user(buf, tmpbuf, len);
|
|
|
|
actual += len - remaining;
|
|
|
|
if (remaining)
|
|
|
|
break;
|
|
|
|
|
|
|
|
nbytes -= len;
|
|
|
|
buf += len;
|
|
|
|
}
|
2016-01-22 20:40:57 +00:00
|
|
|
inode_unlock(file_inode(file));
|
2007-10-10 09:29:43 +00:00
|
|
|
|
|
|
|
return actual;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int queue_dbg_release(struct inode *inode, struct file *file)
|
|
|
|
{
|
|
|
|
struct list_head *queue_data = file->private_data;
|
|
|
|
struct usba_request *req, *tmp_req;
|
|
|
|
|
|
|
|
list_for_each_entry_safe(req, tmp_req, queue_data, queue) {
|
|
|
|
list_del(&req->queue);
|
|
|
|
kfree(req);
|
|
|
|
}
|
|
|
|
kfree(queue_data);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int regs_dbg_open(struct inode *inode, struct file *file)
|
|
|
|
{
|
|
|
|
struct usba_udc *udc;
|
|
|
|
unsigned int i;
|
|
|
|
u32 *data;
|
|
|
|
int ret = -ENOMEM;
|
|
|
|
|
2016-01-22 20:40:57 +00:00
|
|
|
inode_lock(inode);
|
2007-10-10 09:29:43 +00:00
|
|
|
udc = inode->i_private;
|
|
|
|
data = kmalloc(inode->i_size, GFP_KERNEL);
|
|
|
|
if (!data)
|
|
|
|
goto out;
|
|
|
|
|
|
|
|
spin_lock_irq(&udc->lock);
|
|
|
|
for (i = 0; i < inode->i_size / 4; i++)
|
2015-03-18 15:53:09 +00:00
|
|
|
data[i] = usba_io_readl(udc->regs + i * 4);
|
2007-10-10 09:29:43 +00:00
|
|
|
spin_unlock_irq(&udc->lock);
|
|
|
|
|
|
|
|
file->private_data = data;
|
|
|
|
ret = 0;
|
|
|
|
|
|
|
|
out:
|
2016-01-22 20:40:57 +00:00
|
|
|
inode_unlock(inode);
|
2007-10-10 09:29:43 +00:00
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static ssize_t regs_dbg_read(struct file *file, char __user *buf,
|
|
|
|
size_t nbytes, loff_t *ppos)
|
|
|
|
{
|
2013-01-23 22:07:38 +00:00
|
|
|
struct inode *inode = file_inode(file);
|
2007-10-10 09:29:43 +00:00
|
|
|
int ret;
|
|
|
|
|
2016-01-22 20:40:57 +00:00
|
|
|
inode_lock(inode);
|
2007-10-10 09:29:43 +00:00
|
|
|
ret = simple_read_from_buffer(buf, nbytes, ppos,
|
|
|
|
file->private_data,
|
2013-01-23 22:07:38 +00:00
|
|
|
file_inode(file)->i_size);
|
2016-01-22 20:40:57 +00:00
|
|
|
inode_unlock(inode);
|
2007-10-10 09:29:43 +00:00
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int regs_dbg_release(struct inode *inode, struct file *file)
|
|
|
|
{
|
|
|
|
kfree(file->private_data);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
const struct file_operations queue_dbg_fops = {
|
|
|
|
.owner = THIS_MODULE,
|
|
|
|
.open = queue_dbg_open,
|
|
|
|
.llseek = no_llseek,
|
|
|
|
.read = queue_dbg_read,
|
|
|
|
.release = queue_dbg_release,
|
|
|
|
};
|
|
|
|
|
|
|
|
const struct file_operations regs_dbg_fops = {
|
|
|
|
.owner = THIS_MODULE,
|
|
|
|
.open = regs_dbg_open,
|
|
|
|
.llseek = generic_file_llseek,
|
|
|
|
.read = regs_dbg_read,
|
|
|
|
.release = regs_dbg_release,
|
|
|
|
};
|
|
|
|
|
|
|
|
static void usba_ep_init_debugfs(struct usba_udc *udc,
|
|
|
|
struct usba_ep *ep)
|
|
|
|
{
|
|
|
|
struct dentry *ep_root;
|
|
|
|
|
|
|
|
ep_root = debugfs_create_dir(ep->ep.name, udc->debugfs_root);
|
|
|
|
if (!ep_root)
|
|
|
|
goto err_root;
|
|
|
|
ep->debugfs_dir = ep_root;
|
|
|
|
|
|
|
|
ep->debugfs_queue = debugfs_create_file("queue", 0400, ep_root,
|
|
|
|
ep, &queue_dbg_fops);
|
|
|
|
if (!ep->debugfs_queue)
|
|
|
|
goto err_queue;
|
|
|
|
|
|
|
|
if (ep->can_dma) {
|
|
|
|
ep->debugfs_dma_status
|
|
|
|
= debugfs_create_u32("dma_status", 0400, ep_root,
|
|
|
|
&ep->last_dma_status);
|
|
|
|
if (!ep->debugfs_dma_status)
|
|
|
|
goto err_dma_status;
|
|
|
|
}
|
|
|
|
if (ep_is_control(ep)) {
|
|
|
|
ep->debugfs_state
|
|
|
|
= debugfs_create_u32("state", 0400, ep_root,
|
|
|
|
&ep->state);
|
|
|
|
if (!ep->debugfs_state)
|
|
|
|
goto err_state;
|
|
|
|
}
|
|
|
|
|
|
|
|
return;
|
|
|
|
|
|
|
|
err_state:
|
|
|
|
if (ep->can_dma)
|
|
|
|
debugfs_remove(ep->debugfs_dma_status);
|
|
|
|
err_dma_status:
|
|
|
|
debugfs_remove(ep->debugfs_queue);
|
|
|
|
err_queue:
|
|
|
|
debugfs_remove(ep_root);
|
|
|
|
err_root:
|
|
|
|
dev_err(&ep->udc->pdev->dev,
|
|
|
|
"failed to create debugfs directory for %s\n", ep->ep.name);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void usba_ep_cleanup_debugfs(struct usba_ep *ep)
|
|
|
|
{
|
|
|
|
debugfs_remove(ep->debugfs_queue);
|
|
|
|
debugfs_remove(ep->debugfs_dma_status);
|
|
|
|
debugfs_remove(ep->debugfs_state);
|
|
|
|
debugfs_remove(ep->debugfs_dir);
|
|
|
|
ep->debugfs_dma_status = NULL;
|
|
|
|
ep->debugfs_dir = NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void usba_init_debugfs(struct usba_udc *udc)
|
|
|
|
{
|
|
|
|
struct dentry *root, *regs;
|
|
|
|
struct resource *regs_resource;
|
|
|
|
|
|
|
|
root = debugfs_create_dir(udc->gadget.name, NULL);
|
|
|
|
if (IS_ERR(root) || !root)
|
|
|
|
goto err_root;
|
|
|
|
udc->debugfs_root = root;
|
|
|
|
|
|
|
|
regs_resource = platform_get_resource(udc->pdev, IORESOURCE_MEM,
|
|
|
|
CTRL_IOMEM_ID);
|
2015-01-21 20:03:40 +00:00
|
|
|
|
|
|
|
if (regs_resource) {
|
|
|
|
regs = debugfs_create_file_size("regs", 0400, root, udc,
|
|
|
|
®s_dbg_fops,
|
|
|
|
resource_size(regs_resource));
|
|
|
|
if (!regs)
|
|
|
|
goto err_regs;
|
|
|
|
udc->debugfs_regs = regs;
|
|
|
|
}
|
2007-10-10 09:29:43 +00:00
|
|
|
|
|
|
|
usba_ep_init_debugfs(udc, to_usba_ep(udc->gadget.ep0));
|
|
|
|
|
|
|
|
return;
|
|
|
|
|
|
|
|
err_regs:
|
|
|
|
debugfs_remove(root);
|
|
|
|
err_root:
|
|
|
|
udc->debugfs_root = NULL;
|
|
|
|
dev_err(&udc->pdev->dev, "debugfs is not available\n");
|
|
|
|
}
|
|
|
|
|
|
|
|
static void usba_cleanup_debugfs(struct usba_udc *udc)
|
|
|
|
{
|
|
|
|
usba_ep_cleanup_debugfs(to_usba_ep(udc->gadget.ep0));
|
|
|
|
debugfs_remove(udc->debugfs_regs);
|
|
|
|
debugfs_remove(udc->debugfs_root);
|
|
|
|
udc->debugfs_regs = NULL;
|
|
|
|
udc->debugfs_root = NULL;
|
|
|
|
}
|
|
|
|
#else
|
|
|
|
static inline void usba_ep_init_debugfs(struct usba_udc *udc,
|
|
|
|
struct usba_ep *ep)
|
|
|
|
{
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void usba_ep_cleanup_debugfs(struct usba_ep *ep)
|
|
|
|
{
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void usba_init_debugfs(struct usba_udc *udc)
|
|
|
|
{
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void usba_cleanup_debugfs(struct usba_udc *udc)
|
|
|
|
{
|
|
|
|
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2017-01-23 14:45:59 +00:00
|
|
|
static ushort fifo_mode;
|
|
|
|
|
|
|
|
module_param(fifo_mode, ushort, 0x0);
|
|
|
|
MODULE_PARM_DESC(fifo_mode, "Endpoint configuration mode");
|
|
|
|
|
|
|
|
/* mode 0 - uses autoconfig */
|
|
|
|
|
|
|
|
/* mode 1 - fits in 8KB, generic max fifo configuration */
|
|
|
|
static struct usba_fifo_cfg mode_1_cfg[] = {
|
|
|
|
{ .hw_ep_num = 0, .fifo_size = 64, .nr_banks = 1, },
|
|
|
|
{ .hw_ep_num = 1, .fifo_size = 1024, .nr_banks = 2, },
|
|
|
|
{ .hw_ep_num = 2, .fifo_size = 1024, .nr_banks = 1, },
|
|
|
|
{ .hw_ep_num = 3, .fifo_size = 1024, .nr_banks = 1, },
|
|
|
|
{ .hw_ep_num = 4, .fifo_size = 1024, .nr_banks = 1, },
|
|
|
|
{ .hw_ep_num = 5, .fifo_size = 1024, .nr_banks = 1, },
|
|
|
|
{ .hw_ep_num = 6, .fifo_size = 1024, .nr_banks = 1, },
|
|
|
|
};
|
|
|
|
|
|
|
|
/* mode 2 - fits in 8KB, performance max fifo configuration */
|
|
|
|
static struct usba_fifo_cfg mode_2_cfg[] = {
|
|
|
|
{ .hw_ep_num = 0, .fifo_size = 64, .nr_banks = 1, },
|
|
|
|
{ .hw_ep_num = 1, .fifo_size = 1024, .nr_banks = 3, },
|
|
|
|
{ .hw_ep_num = 2, .fifo_size = 1024, .nr_banks = 2, },
|
|
|
|
{ .hw_ep_num = 3, .fifo_size = 1024, .nr_banks = 2, },
|
|
|
|
};
|
|
|
|
|
|
|
|
/* mode 3 - fits in 8KB, mixed fifo configuration */
|
|
|
|
static struct usba_fifo_cfg mode_3_cfg[] = {
|
|
|
|
{ .hw_ep_num = 0, .fifo_size = 64, .nr_banks = 1, },
|
|
|
|
{ .hw_ep_num = 1, .fifo_size = 1024, .nr_banks = 2, },
|
|
|
|
{ .hw_ep_num = 2, .fifo_size = 512, .nr_banks = 2, },
|
|
|
|
{ .hw_ep_num = 3, .fifo_size = 512, .nr_banks = 2, },
|
|
|
|
{ .hw_ep_num = 4, .fifo_size = 512, .nr_banks = 2, },
|
|
|
|
{ .hw_ep_num = 5, .fifo_size = 512, .nr_banks = 2, },
|
|
|
|
{ .hw_ep_num = 6, .fifo_size = 512, .nr_banks = 2, },
|
|
|
|
};
|
|
|
|
|
|
|
|
/* mode 4 - fits in 8KB, custom fifo configuration */
|
|
|
|
static struct usba_fifo_cfg mode_4_cfg[] = {
|
|
|
|
{ .hw_ep_num = 0, .fifo_size = 64, .nr_banks = 1, },
|
|
|
|
{ .hw_ep_num = 1, .fifo_size = 512, .nr_banks = 2, },
|
|
|
|
{ .hw_ep_num = 2, .fifo_size = 512, .nr_banks = 2, },
|
|
|
|
{ .hw_ep_num = 3, .fifo_size = 8, .nr_banks = 2, },
|
|
|
|
{ .hw_ep_num = 4, .fifo_size = 512, .nr_banks = 2, },
|
|
|
|
{ .hw_ep_num = 5, .fifo_size = 512, .nr_banks = 2, },
|
|
|
|
{ .hw_ep_num = 6, .fifo_size = 16, .nr_banks = 2, },
|
|
|
|
{ .hw_ep_num = 7, .fifo_size = 8, .nr_banks = 2, },
|
|
|
|
{ .hw_ep_num = 8, .fifo_size = 8, .nr_banks = 2, },
|
|
|
|
};
|
|
|
|
/* Add additional configurations here */
|
|
|
|
|
2017-03-28 16:07:37 +00:00
|
|
|
static int usba_config_fifo_table(struct usba_udc *udc)
|
2017-01-23 14:45:59 +00:00
|
|
|
{
|
|
|
|
int n;
|
|
|
|
|
|
|
|
switch (fifo_mode) {
|
|
|
|
default:
|
|
|
|
fifo_mode = 0;
|
|
|
|
case 0:
|
|
|
|
udc->fifo_cfg = NULL;
|
|
|
|
n = 0;
|
|
|
|
break;
|
|
|
|
case 1:
|
|
|
|
udc->fifo_cfg = mode_1_cfg;
|
|
|
|
n = ARRAY_SIZE(mode_1_cfg);
|
|
|
|
break;
|
|
|
|
case 2:
|
|
|
|
udc->fifo_cfg = mode_2_cfg;
|
|
|
|
n = ARRAY_SIZE(mode_2_cfg);
|
|
|
|
break;
|
|
|
|
case 3:
|
|
|
|
udc->fifo_cfg = mode_3_cfg;
|
|
|
|
n = ARRAY_SIZE(mode_3_cfg);
|
|
|
|
break;
|
|
|
|
case 4:
|
|
|
|
udc->fifo_cfg = mode_4_cfg;
|
|
|
|
n = ARRAY_SIZE(mode_4_cfg);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
DBG(DBG_HW, "Setup fifo_mode %d\n", fifo_mode);
|
|
|
|
|
|
|
|
return n;
|
|
|
|
}
|
|
|
|
|
2015-01-06 13:47:02 +00:00
|
|
|
static inline u32 usba_int_enb_get(struct usba_udc *udc)
|
|
|
|
{
|
|
|
|
return udc->int_enb_cache;
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void usba_int_enb_set(struct usba_udc *udc, u32 val)
|
|
|
|
{
|
|
|
|
usba_writel(udc, INT_ENB, val);
|
|
|
|
udc->int_enb_cache = val;
|
|
|
|
}
|
|
|
|
|
2007-10-10 09:29:43 +00:00
|
|
|
static int vbus_is_present(struct usba_udc *udc)
|
|
|
|
{
|
2009-03-24 14:45:20 +00:00
|
|
|
if (gpio_is_valid(udc->vbus_pin))
|
2010-02-05 08:49:25 +00:00
|
|
|
return gpio_get_value(udc->vbus_pin) ^ udc->vbus_pin_inverted;
|
2007-10-10 09:29:43 +00:00
|
|
|
|
|
|
|
/* No Vbus detection: Assume always present */
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
|
2015-01-06 13:46:58 +00:00
|
|
|
static void toggle_bias(struct usba_udc *udc, int is_on)
|
2009-06-05 15:46:16 +00:00
|
|
|
{
|
2015-01-06 13:46:58 +00:00
|
|
|
if (udc->errata && udc->errata->toggle_bias)
|
|
|
|
udc->errata->toggle_bias(udc, is_on);
|
2009-06-05 15:46:16 +00:00
|
|
|
}
|
|
|
|
|
2015-01-06 13:46:59 +00:00
|
|
|
static void generate_bias_pulse(struct usba_udc *udc)
|
|
|
|
{
|
|
|
|
if (!udc->bias_pulse_needed)
|
|
|
|
return;
|
|
|
|
|
|
|
|
if (udc->errata && udc->errata->pulse_bias)
|
|
|
|
udc->errata->pulse_bias(udc);
|
|
|
|
|
|
|
|
udc->bias_pulse_needed = false;
|
|
|
|
}
|
|
|
|
|
2007-10-10 09:29:43 +00:00
|
|
|
static void next_fifo_transaction(struct usba_ep *ep, struct usba_request *req)
|
|
|
|
{
|
|
|
|
unsigned int transaction_len;
|
|
|
|
|
|
|
|
transaction_len = req->req.length - req->req.actual;
|
|
|
|
req->last_transaction = 1;
|
|
|
|
if (transaction_len > ep->ep.maxpacket) {
|
|
|
|
transaction_len = ep->ep.maxpacket;
|
|
|
|
req->last_transaction = 0;
|
|
|
|
} else if (transaction_len == ep->ep.maxpacket && req->req.zero)
|
|
|
|
req->last_transaction = 0;
|
|
|
|
|
|
|
|
DBG(DBG_QUEUE, "%s: submit_transaction, req %p (length %d)%s\n",
|
|
|
|
ep->ep.name, req, transaction_len,
|
|
|
|
req->last_transaction ? ", done" : "");
|
|
|
|
|
2008-03-04 14:48:37 +00:00
|
|
|
memcpy_toio(ep->fifo, req->req.buf + req->req.actual, transaction_len);
|
2007-10-10 09:29:43 +00:00
|
|
|
usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
|
|
|
|
req->req.actual += transaction_len;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void submit_request(struct usba_ep *ep, struct usba_request *req)
|
|
|
|
{
|
|
|
|
DBG(DBG_QUEUE, "%s: submit_request: req %p (length %d)\n",
|
|
|
|
ep->ep.name, req, req->req.length);
|
|
|
|
|
|
|
|
req->req.actual = 0;
|
|
|
|
req->submitted = 1;
|
|
|
|
|
|
|
|
if (req->using_dma) {
|
|
|
|
if (req->req.length == 0) {
|
|
|
|
usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (req->req.zero)
|
|
|
|
usba_ep_writel(ep, CTL_ENB, USBA_SHORT_PACKET);
|
|
|
|
else
|
|
|
|
usba_ep_writel(ep, CTL_DIS, USBA_SHORT_PACKET);
|
|
|
|
|
|
|
|
usba_dma_writel(ep, ADDRESS, req->req.dma);
|
|
|
|
usba_dma_writel(ep, CONTROL, req->ctrl);
|
|
|
|
} else {
|
|
|
|
next_fifo_transaction(ep, req);
|
|
|
|
if (req->last_transaction) {
|
|
|
|
usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY);
|
|
|
|
usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE);
|
|
|
|
} else {
|
|
|
|
usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
|
|
|
|
usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static void submit_next_request(struct usba_ep *ep)
|
|
|
|
{
|
|
|
|
struct usba_request *req;
|
|
|
|
|
|
|
|
if (list_empty(&ep->queue)) {
|
|
|
|
usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY | USBA_RX_BK_RDY);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
req = list_entry(ep->queue.next, struct usba_request, queue);
|
|
|
|
if (!req->submitted)
|
|
|
|
submit_request(ep, req);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void send_status(struct usba_udc *udc, struct usba_ep *ep)
|
|
|
|
{
|
|
|
|
ep->state = STATUS_STAGE_IN;
|
|
|
|
usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
|
|
|
|
usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void receive_data(struct usba_ep *ep)
|
|
|
|
{
|
|
|
|
struct usba_udc *udc = ep->udc;
|
|
|
|
struct usba_request *req;
|
|
|
|
unsigned long status;
|
|
|
|
unsigned int bytecount, nr_busy;
|
|
|
|
int is_complete = 0;
|
|
|
|
|
|
|
|
status = usba_ep_readl(ep, STA);
|
|
|
|
nr_busy = USBA_BFEXT(BUSY_BANKS, status);
|
|
|
|
|
|
|
|
DBG(DBG_QUEUE, "receive data: nr_busy=%u\n", nr_busy);
|
|
|
|
|
|
|
|
while (nr_busy > 0) {
|
|
|
|
if (list_empty(&ep->queue)) {
|
|
|
|
usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
req = list_entry(ep->queue.next,
|
|
|
|
struct usba_request, queue);
|
|
|
|
|
|
|
|
bytecount = USBA_BFEXT(BYTE_COUNT, status);
|
|
|
|
|
|
|
|
if (status & (1 << 31))
|
|
|
|
is_complete = 1;
|
|
|
|
if (req->req.actual + bytecount >= req->req.length) {
|
|
|
|
is_complete = 1;
|
|
|
|
bytecount = req->req.length - req->req.actual;
|
|
|
|
}
|
|
|
|
|
2008-03-04 14:48:37 +00:00
|
|
|
memcpy_fromio(req->req.buf + req->req.actual,
|
2007-10-10 09:29:43 +00:00
|
|
|
ep->fifo, bytecount);
|
|
|
|
req->req.actual += bytecount;
|
|
|
|
|
|
|
|
usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY);
|
|
|
|
|
|
|
|
if (is_complete) {
|
|
|
|
DBG(DBG_QUEUE, "%s: request done\n", ep->ep.name);
|
|
|
|
req->req.status = 0;
|
|
|
|
list_del_init(&req->queue);
|
|
|
|
usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
|
|
|
|
spin_unlock(&udc->lock);
|
2014-09-24 20:43:19 +00:00
|
|
|
usb_gadget_giveback_request(&ep->ep, &req->req);
|
2007-10-10 09:29:43 +00:00
|
|
|
spin_lock(&udc->lock);
|
|
|
|
}
|
|
|
|
|
|
|
|
status = usba_ep_readl(ep, STA);
|
|
|
|
nr_busy = USBA_BFEXT(BUSY_BANKS, status);
|
|
|
|
|
|
|
|
if (is_complete && ep_is_control(ep)) {
|
|
|
|
send_status(udc, ep);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
request_complete(struct usba_ep *ep, struct usba_request *req, int status)
|
|
|
|
{
|
|
|
|
struct usba_udc *udc = ep->udc;
|
|
|
|
|
|
|
|
WARN_ON(!list_empty(&req->queue));
|
|
|
|
|
|
|
|
if (req->req.status == -EINPROGRESS)
|
|
|
|
req->req.status = status;
|
|
|
|
|
2013-01-28 14:57:02 +00:00
|
|
|
if (req->using_dma)
|
|
|
|
usb_gadget_unmap_request(&udc->gadget, &req->req, ep->is_in);
|
2007-10-10 09:29:43 +00:00
|
|
|
|
|
|
|
DBG(DBG_GADGET | DBG_REQ,
|
|
|
|
"%s: req %p complete: status %d, actual %u\n",
|
|
|
|
ep->ep.name, req, req->req.status, req->req.actual);
|
|
|
|
|
|
|
|
spin_unlock(&udc->lock);
|
2014-09-24 20:43:19 +00:00
|
|
|
usb_gadget_giveback_request(&ep->ep, &req->req);
|
2007-10-10 09:29:43 +00:00
|
|
|
spin_lock(&udc->lock);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
request_complete_list(struct usba_ep *ep, struct list_head *list, int status)
|
|
|
|
{
|
|
|
|
struct usba_request *req, *tmp_req;
|
|
|
|
|
|
|
|
list_for_each_entry_safe(req, tmp_req, list, queue) {
|
|
|
|
list_del_init(&req->queue);
|
|
|
|
request_complete(ep, req, status);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
|
|
|
usba_ep_enable(struct usb_ep *_ep, const struct usb_endpoint_descriptor *desc)
|
|
|
|
{
|
|
|
|
struct usba_ep *ep = to_usba_ep(_ep);
|
|
|
|
struct usba_udc *udc = ep->udc;
|
2017-02-22 10:33:27 +00:00
|
|
|
unsigned long flags, maxpacket;
|
2007-10-10 09:29:43 +00:00
|
|
|
unsigned int nr_trans;
|
|
|
|
|
|
|
|
DBG(DBG_GADGET, "%s: ep_enable: desc=%p\n", ep->ep.name, desc);
|
|
|
|
|
2016-09-28 11:17:38 +00:00
|
|
|
maxpacket = usb_endpoint_maxp(desc);
|
2007-10-10 09:29:43 +00:00
|
|
|
|
|
|
|
if (((desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK) != ep->index)
|
|
|
|
|| ep->index == 0
|
|
|
|
|| desc->bDescriptorType != USB_DT_ENDPOINT
|
|
|
|
|| maxpacket == 0
|
|
|
|
|| maxpacket > ep->fifo_size) {
|
|
|
|
DBG(DBG_ERR, "ep_enable: Invalid argument");
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
ep->is_isoc = 0;
|
|
|
|
ep->is_in = 0;
|
|
|
|
|
2017-01-23 14:45:59 +00:00
|
|
|
DBG(DBG_ERR, "%s: EPT_CFG = 0x%lx (maxpacket = %lu)\n",
|
2017-02-22 10:33:27 +00:00
|
|
|
ep->ep.name, ep->ept_cfg, maxpacket);
|
2007-10-10 09:29:43 +00:00
|
|
|
|
2009-04-15 20:27:49 +00:00
|
|
|
if (usb_endpoint_dir_in(desc)) {
|
2007-10-10 09:29:43 +00:00
|
|
|
ep->is_in = 1;
|
2017-01-23 14:45:59 +00:00
|
|
|
ep->ept_cfg |= USBA_EPT_DIR_IN;
|
2007-10-10 09:29:43 +00:00
|
|
|
}
|
|
|
|
|
2009-04-15 20:27:49 +00:00
|
|
|
switch (usb_endpoint_type(desc)) {
|
2007-10-10 09:29:43 +00:00
|
|
|
case USB_ENDPOINT_XFER_CONTROL:
|
2017-01-23 14:45:59 +00:00
|
|
|
ep->ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_CONTROL);
|
2007-10-10 09:29:43 +00:00
|
|
|
break;
|
|
|
|
case USB_ENDPOINT_XFER_ISOC:
|
|
|
|
if (!ep->can_isoc) {
|
|
|
|
DBG(DBG_ERR, "ep_enable: %s is not isoc capable\n",
|
|
|
|
ep->ep.name);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Bits 11:12 specify number of _additional_
|
|
|
|
* transactions per microframe.
|
|
|
|
*/
|
2016-09-28 10:28:44 +00:00
|
|
|
nr_trans = usb_endpoint_maxp_mult(desc);
|
2007-10-10 09:29:43 +00:00
|
|
|
if (nr_trans > 3)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
ep->is_isoc = 1;
|
2017-01-23 14:45:59 +00:00
|
|
|
ep->ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_ISO);
|
|
|
|
ep->ept_cfg |= USBA_BF(NB_TRANS, nr_trans);
|
2007-10-10 09:29:43 +00:00
|
|
|
|
|
|
|
break;
|
|
|
|
case USB_ENDPOINT_XFER_BULK:
|
2017-01-23 14:45:59 +00:00
|
|
|
ep->ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK);
|
2007-10-10 09:29:43 +00:00
|
|
|
break;
|
|
|
|
case USB_ENDPOINT_XFER_INT:
|
2017-01-23 14:45:59 +00:00
|
|
|
ep->ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_INT);
|
2007-10-10 09:29:43 +00:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
spin_lock_irqsave(&ep->udc->lock, flags);
|
|
|
|
|
2012-03-12 18:25:27 +00:00
|
|
|
ep->ep.desc = desc;
|
2007-10-10 09:29:43 +00:00
|
|
|
ep->ep.maxpacket = maxpacket;
|
|
|
|
|
2017-01-23 14:45:59 +00:00
|
|
|
usba_ep_writel(ep, CFG, ep->ept_cfg);
|
2007-10-10 09:29:43 +00:00
|
|
|
usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE);
|
|
|
|
|
|
|
|
if (ep->can_dma) {
|
|
|
|
u32 ctrl;
|
|
|
|
|
2015-01-06 13:47:02 +00:00
|
|
|
usba_int_enb_set(udc, usba_int_enb_get(udc) |
|
|
|
|
USBA_BF(EPT_INT, 1 << ep->index) |
|
|
|
|
USBA_BF(DMA_INT, 1 << ep->index));
|
2007-10-10 09:29:43 +00:00
|
|
|
ctrl = USBA_AUTO_VALID | USBA_INTDIS_DMA;
|
|
|
|
usba_ep_writel(ep, CTL_ENB, ctrl);
|
|
|
|
} else {
|
2015-01-06 13:47:02 +00:00
|
|
|
usba_int_enb_set(udc, usba_int_enb_get(udc) |
|
|
|
|
USBA_BF(EPT_INT, 1 << ep->index));
|
2007-10-10 09:29:43 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
spin_unlock_irqrestore(&udc->lock, flags);
|
|
|
|
|
|
|
|
DBG(DBG_HW, "EPT_CFG%d after init: %#08lx\n", ep->index,
|
|
|
|
(unsigned long)usba_ep_readl(ep, CFG));
|
|
|
|
DBG(DBG_HW, "INT_ENB after init: %#08lx\n",
|
2015-01-06 13:47:02 +00:00
|
|
|
(unsigned long)usba_int_enb_get(udc));
|
2007-10-10 09:29:43 +00:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int usba_ep_disable(struct usb_ep *_ep)
|
|
|
|
{
|
|
|
|
struct usba_ep *ep = to_usba_ep(_ep);
|
|
|
|
struct usba_udc *udc = ep->udc;
|
|
|
|
LIST_HEAD(req_list);
|
|
|
|
unsigned long flags;
|
|
|
|
|
|
|
|
DBG(DBG_GADGET, "ep_disable: %s\n", ep->ep.name);
|
|
|
|
|
|
|
|
spin_lock_irqsave(&udc->lock, flags);
|
|
|
|
|
2012-03-12 18:25:27 +00:00
|
|
|
if (!ep->ep.desc) {
|
2007-10-10 09:29:43 +00:00
|
|
|
spin_unlock_irqrestore(&udc->lock, flags);
|
2008-05-11 05:46:38 +00:00
|
|
|
/* REVISIT because this driver disables endpoints in
|
|
|
|
* reset_all_endpoints() before calling disconnect(),
|
|
|
|
* most gadget drivers would trigger this non-error ...
|
|
|
|
*/
|
|
|
|
if (udc->gadget.speed != USB_SPEED_UNKNOWN)
|
|
|
|
DBG(DBG_ERR, "ep_disable: %s not enabled\n",
|
|
|
|
ep->ep.name);
|
2007-10-10 09:29:43 +00:00
|
|
|
return -EINVAL;
|
|
|
|
}
|
2012-02-08 11:56:48 +00:00
|
|
|
ep->ep.desc = NULL;
|
2007-10-10 09:29:43 +00:00
|
|
|
|
|
|
|
list_splice_init(&ep->queue, &req_list);
|
|
|
|
if (ep->can_dma) {
|
|
|
|
usba_dma_writel(ep, CONTROL, 0);
|
|
|
|
usba_dma_writel(ep, ADDRESS, 0);
|
|
|
|
usba_dma_readl(ep, STATUS);
|
|
|
|
}
|
|
|
|
usba_ep_writel(ep, CTL_DIS, USBA_EPT_ENABLE);
|
2015-01-06 13:47:02 +00:00
|
|
|
usba_int_enb_set(udc, usba_int_enb_get(udc) &
|
|
|
|
~USBA_BF(EPT_INT, 1 << ep->index));
|
2007-10-10 09:29:43 +00:00
|
|
|
|
|
|
|
request_complete_list(ep, &req_list, -ESHUTDOWN);
|
|
|
|
|
|
|
|
spin_unlock_irqrestore(&udc->lock, flags);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct usb_request *
|
|
|
|
usba_ep_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags)
|
|
|
|
{
|
|
|
|
struct usba_request *req;
|
|
|
|
|
|
|
|
DBG(DBG_GADGET, "ep_alloc_request: %p, 0x%x\n", _ep, gfp_flags);
|
|
|
|
|
|
|
|
req = kzalloc(sizeof(*req), gfp_flags);
|
|
|
|
if (!req)
|
|
|
|
return NULL;
|
|
|
|
|
|
|
|
INIT_LIST_HEAD(&req->queue);
|
|
|
|
|
|
|
|
return &req->req;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
usba_ep_free_request(struct usb_ep *_ep, struct usb_request *_req)
|
|
|
|
{
|
|
|
|
struct usba_request *req = to_usba_req(_req);
|
|
|
|
|
|
|
|
DBG(DBG_GADGET, "ep_free_request: %p, %p\n", _ep, _req);
|
|
|
|
|
|
|
|
kfree(req);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int queue_dma(struct usba_udc *udc, struct usba_ep *ep,
|
|
|
|
struct usba_request *req, gfp_t gfp_flags)
|
|
|
|
{
|
|
|
|
unsigned long flags;
|
|
|
|
int ret;
|
|
|
|
|
2015-05-26 20:34:45 +00:00
|
|
|
DBG(DBG_DMA, "%s: req l/%u d/%pad %c%c%c\n",
|
|
|
|
ep->ep.name, req->req.length, &req->req.dma,
|
2007-10-10 09:29:43 +00:00
|
|
|
req->req.zero ? 'Z' : 'z',
|
|
|
|
req->req.short_not_ok ? 'S' : 's',
|
|
|
|
req->req.no_interrupt ? 'I' : 'i');
|
|
|
|
|
|
|
|
if (req->req.length > 0x10000) {
|
|
|
|
/* Lengths from 0 to 65536 (inclusive) are supported */
|
|
|
|
DBG(DBG_ERR, "invalid request length %u\n", req->req.length);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2013-01-28 14:57:02 +00:00
|
|
|
ret = usb_gadget_map_request(&udc->gadget, &req->req, ep->is_in);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
2007-10-10 09:29:43 +00:00
|
|
|
|
2013-01-28 14:57:02 +00:00
|
|
|
req->using_dma = 1;
|
2007-10-10 09:29:43 +00:00
|
|
|
req->ctrl = USBA_BF(DMA_BUF_LEN, req->req.length)
|
|
|
|
| USBA_DMA_CH_EN | USBA_DMA_END_BUF_IE
|
2014-12-17 09:18:48 +00:00
|
|
|
| USBA_DMA_END_BUF_EN;
|
2007-10-10 09:29:43 +00:00
|
|
|
|
2014-12-17 09:18:48 +00:00
|
|
|
if (!ep->is_in)
|
|
|
|
req->ctrl |= USBA_DMA_END_TR_EN | USBA_DMA_END_TR_IE;
|
2007-10-10 09:29:43 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Add this request to the queue and submit for DMA if
|
|
|
|
* possible. Check if we're still alive first -- we may have
|
|
|
|
* received a reset since last time we checked.
|
|
|
|
*/
|
|
|
|
ret = -ESHUTDOWN;
|
|
|
|
spin_lock_irqsave(&udc->lock, flags);
|
2012-03-12 18:25:27 +00:00
|
|
|
if (ep->ep.desc) {
|
2007-10-10 09:29:43 +00:00
|
|
|
if (list_empty(&ep->queue))
|
|
|
|
submit_request(ep, req);
|
|
|
|
|
|
|
|
list_add_tail(&req->queue, &ep->queue);
|
|
|
|
ret = 0;
|
|
|
|
}
|
|
|
|
spin_unlock_irqrestore(&udc->lock, flags);
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
|
|
|
usba_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)
|
|
|
|
{
|
|
|
|
struct usba_request *req = to_usba_req(_req);
|
|
|
|
struct usba_ep *ep = to_usba_ep(_ep);
|
|
|
|
struct usba_udc *udc = ep->udc;
|
|
|
|
unsigned long flags;
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
DBG(DBG_GADGET | DBG_QUEUE | DBG_REQ, "%s: queue req %p, len %u\n",
|
|
|
|
ep->ep.name, req, _req->length);
|
|
|
|
|
2012-03-12 18:25:27 +00:00
|
|
|
if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN ||
|
|
|
|
!ep->ep.desc)
|
2007-10-10 09:29:43 +00:00
|
|
|
return -ESHUTDOWN;
|
|
|
|
|
|
|
|
req->submitted = 0;
|
|
|
|
req->using_dma = 0;
|
|
|
|
req->last_transaction = 0;
|
|
|
|
|
|
|
|
_req->status = -EINPROGRESS;
|
|
|
|
_req->actual = 0;
|
|
|
|
|
|
|
|
if (ep->can_dma)
|
|
|
|
return queue_dma(udc, ep, req, gfp_flags);
|
|
|
|
|
|
|
|
/* May have received a reset since last time we checked */
|
|
|
|
ret = -ESHUTDOWN;
|
|
|
|
spin_lock_irqsave(&udc->lock, flags);
|
2012-03-12 18:25:27 +00:00
|
|
|
if (ep->ep.desc) {
|
2007-10-10 09:29:43 +00:00
|
|
|
list_add_tail(&req->queue, &ep->queue);
|
|
|
|
|
2009-05-01 15:21:11 +00:00
|
|
|
if ((!ep_is_control(ep) && ep->is_in) ||
|
|
|
|
(ep_is_control(ep)
|
2007-10-10 09:29:43 +00:00
|
|
|
&& (ep->state == DATA_STAGE_IN
|
|
|
|
|| ep->state == STATUS_STAGE_IN)))
|
|
|
|
usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY);
|
|
|
|
else
|
|
|
|
usba_ep_writel(ep, CTL_ENB, USBA_RX_BK_RDY);
|
|
|
|
ret = 0;
|
|
|
|
}
|
|
|
|
spin_unlock_irqrestore(&udc->lock, flags);
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
usba_update_req(struct usba_ep *ep, struct usba_request *req, u32 status)
|
|
|
|
{
|
|
|
|
req->req.actual = req->req.length - USBA_BFEXT(DMA_BUF_LEN, status);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int stop_dma(struct usba_ep *ep, u32 *pstatus)
|
|
|
|
{
|
|
|
|
unsigned int timeout;
|
|
|
|
u32 status;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Stop the DMA controller. When writing both CH_EN
|
|
|
|
* and LINK to 0, the other bits are not affected.
|
|
|
|
*/
|
|
|
|
usba_dma_writel(ep, CONTROL, 0);
|
|
|
|
|
|
|
|
/* Wait for the FIFO to empty */
|
|
|
|
for (timeout = 40; timeout; --timeout) {
|
|
|
|
status = usba_dma_readl(ep, STATUS);
|
|
|
|
if (!(status & USBA_DMA_CH_EN))
|
|
|
|
break;
|
|
|
|
udelay(1);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (pstatus)
|
|
|
|
*pstatus = status;
|
|
|
|
|
|
|
|
if (timeout == 0) {
|
|
|
|
dev_err(&ep->udc->pdev->dev,
|
|
|
|
"%s: timed out waiting for DMA FIFO to empty\n",
|
|
|
|
ep->ep.name);
|
|
|
|
return -ETIMEDOUT;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int usba_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
|
|
|
|
{
|
|
|
|
struct usba_ep *ep = to_usba_ep(_ep);
|
|
|
|
struct usba_udc *udc = ep->udc;
|
2015-01-09 16:11:24 +00:00
|
|
|
struct usba_request *req;
|
2007-10-10 09:29:43 +00:00
|
|
|
unsigned long flags;
|
|
|
|
u32 status;
|
|
|
|
|
|
|
|
DBG(DBG_GADGET | DBG_QUEUE, "ep_dequeue: %s, req %p\n",
|
|
|
|
ep->ep.name, req);
|
|
|
|
|
|
|
|
spin_lock_irqsave(&udc->lock, flags);
|
|
|
|
|
2015-01-09 16:11:24 +00:00
|
|
|
list_for_each_entry(req, &ep->queue, queue) {
|
|
|
|
if (&req->req == _req)
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (&req->req != _req) {
|
|
|
|
spin_unlock_irqrestore(&udc->lock, flags);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2007-10-10 09:29:43 +00:00
|
|
|
if (req->using_dma) {
|
|
|
|
/*
|
|
|
|
* If this request is currently being transferred,
|
|
|
|
* stop the DMA controller and reset the FIFO.
|
|
|
|
*/
|
|
|
|
if (ep->queue.next == &req->queue) {
|
|
|
|
status = usba_dma_readl(ep, STATUS);
|
|
|
|
if (status & USBA_DMA_CH_EN)
|
|
|
|
stop_dma(ep, &status);
|
|
|
|
|
|
|
|
#ifdef CONFIG_USB_GADGET_DEBUG_FS
|
|
|
|
ep->last_dma_status = status;
|
|
|
|
#endif
|
|
|
|
|
|
|
|
usba_writel(udc, EPT_RST, 1 << ep->index);
|
|
|
|
|
|
|
|
usba_update_req(ep, req, status);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Errors should stop the queue from advancing until the
|
|
|
|
* completion function returns.
|
|
|
|
*/
|
|
|
|
list_del_init(&req->queue);
|
|
|
|
|
|
|
|
request_complete(ep, req, -ECONNRESET);
|
|
|
|
|
|
|
|
/* Process the next request if any */
|
|
|
|
submit_next_request(ep);
|
|
|
|
spin_unlock_irqrestore(&udc->lock, flags);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int usba_ep_set_halt(struct usb_ep *_ep, int value)
|
|
|
|
{
|
|
|
|
struct usba_ep *ep = to_usba_ep(_ep);
|
|
|
|
struct usba_udc *udc = ep->udc;
|
|
|
|
unsigned long flags;
|
|
|
|
int ret = 0;
|
|
|
|
|
|
|
|
DBG(DBG_GADGET, "endpoint %s: %s HALT\n", ep->ep.name,
|
|
|
|
value ? "set" : "clear");
|
|
|
|
|
2012-03-12 18:25:27 +00:00
|
|
|
if (!ep->ep.desc) {
|
2007-10-10 09:29:43 +00:00
|
|
|
DBG(DBG_ERR, "Attempted to halt uninitialized ep %s\n",
|
|
|
|
ep->ep.name);
|
|
|
|
return -ENODEV;
|
|
|
|
}
|
|
|
|
if (ep->is_isoc) {
|
|
|
|
DBG(DBG_ERR, "Attempted to halt isochronous ep %s\n",
|
|
|
|
ep->ep.name);
|
|
|
|
return -ENOTTY;
|
|
|
|
}
|
|
|
|
|
|
|
|
spin_lock_irqsave(&udc->lock, flags);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* We can't halt IN endpoints while there are still data to be
|
|
|
|
* transferred
|
|
|
|
*/
|
|
|
|
if (!list_empty(&ep->queue)
|
|
|
|
|| ((value && ep->is_in && (usba_ep_readl(ep, STA)
|
|
|
|
& USBA_BF(BUSY_BANKS, -1L))))) {
|
|
|
|
ret = -EAGAIN;
|
|
|
|
} else {
|
|
|
|
if (value)
|
|
|
|
usba_ep_writel(ep, SET_STA, USBA_FORCE_STALL);
|
|
|
|
else
|
|
|
|
usba_ep_writel(ep, CLR_STA,
|
|
|
|
USBA_FORCE_STALL | USBA_TOGGLE_CLR);
|
|
|
|
usba_ep_readl(ep, STA);
|
|
|
|
}
|
|
|
|
|
|
|
|
spin_unlock_irqrestore(&udc->lock, flags);
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int usba_ep_fifo_status(struct usb_ep *_ep)
|
|
|
|
{
|
|
|
|
struct usba_ep *ep = to_usba_ep(_ep);
|
|
|
|
|
|
|
|
return USBA_BFEXT(BYTE_COUNT, usba_ep_readl(ep, STA));
|
|
|
|
}
|
|
|
|
|
|
|
|
static void usba_ep_fifo_flush(struct usb_ep *_ep)
|
|
|
|
{
|
|
|
|
struct usba_ep *ep = to_usba_ep(_ep);
|
|
|
|
struct usba_udc *udc = ep->udc;
|
|
|
|
|
|
|
|
usba_writel(udc, EPT_RST, 1 << ep->index);
|
|
|
|
}
|
|
|
|
|
|
|
|
static const struct usb_ep_ops usba_ep_ops = {
|
|
|
|
.enable = usba_ep_enable,
|
|
|
|
.disable = usba_ep_disable,
|
|
|
|
.alloc_request = usba_ep_alloc_request,
|
|
|
|
.free_request = usba_ep_free_request,
|
|
|
|
.queue = usba_ep_queue,
|
|
|
|
.dequeue = usba_ep_dequeue,
|
|
|
|
.set_halt = usba_ep_set_halt,
|
|
|
|
.fifo_status = usba_ep_fifo_status,
|
|
|
|
.fifo_flush = usba_ep_fifo_flush,
|
|
|
|
};
|
|
|
|
|
|
|
|
static int usba_udc_get_frame(struct usb_gadget *gadget)
|
|
|
|
{
|
|
|
|
struct usba_udc *udc = to_usba_udc(gadget);
|
|
|
|
|
|
|
|
return USBA_BFEXT(FRAME_NUMBER, usba_readl(udc, FNUM));
|
|
|
|
}
|
|
|
|
|
2007-10-11 20:40:30 +00:00
|
|
|
static int usba_udc_wakeup(struct usb_gadget *gadget)
|
|
|
|
{
|
|
|
|
struct usba_udc *udc = to_usba_udc(gadget);
|
|
|
|
unsigned long flags;
|
|
|
|
u32 ctrl;
|
|
|
|
int ret = -EINVAL;
|
|
|
|
|
|
|
|
spin_lock_irqsave(&udc->lock, flags);
|
|
|
|
if (udc->devstatus & (1 << USB_DEVICE_REMOTE_WAKEUP)) {
|
|
|
|
ctrl = usba_readl(udc, CTRL);
|
|
|
|
usba_writel(udc, CTRL, ctrl | USBA_REMOTE_WAKE_UP);
|
|
|
|
ret = 0;
|
|
|
|
}
|
|
|
|
spin_unlock_irqrestore(&udc->lock, flags);
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
|
|
|
usba_udc_set_selfpowered(struct usb_gadget *gadget, int is_selfpowered)
|
|
|
|
{
|
|
|
|
struct usba_udc *udc = to_usba_udc(gadget);
|
|
|
|
unsigned long flags;
|
|
|
|
|
2015-01-28 08:32:38 +00:00
|
|
|
gadget->is_selfpowered = (is_selfpowered != 0);
|
2007-10-11 20:40:30 +00:00
|
|
|
spin_lock_irqsave(&udc->lock, flags);
|
|
|
|
if (is_selfpowered)
|
|
|
|
udc->devstatus |= 1 << USB_DEVICE_SELF_POWERED;
|
|
|
|
else
|
|
|
|
udc->devstatus &= ~(1 << USB_DEVICE_SELF_POWERED);
|
|
|
|
spin_unlock_irqrestore(&udc->lock, flags);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2012-02-04 17:55:24 +00:00
|
|
|
static int atmel_usba_start(struct usb_gadget *gadget,
|
|
|
|
struct usb_gadget_driver *driver);
|
2014-10-17 17:05:12 +00:00
|
|
|
static int atmel_usba_stop(struct usb_gadget *gadget);
|
|
|
|
|
2017-03-28 16:07:37 +00:00
|
|
|
static struct usb_ep *atmel_usba_match_ep(struct usb_gadget *gadget,
|
|
|
|
struct usb_endpoint_descriptor *desc,
|
|
|
|
struct usb_ss_ep_comp_descriptor *ep_comp)
|
2017-01-23 14:45:59 +00:00
|
|
|
{
|
|
|
|
struct usb_ep *_ep;
|
|
|
|
struct usba_ep *ep;
|
|
|
|
|
|
|
|
/* Look at endpoints until an unclaimed one looks usable */
|
|
|
|
list_for_each_entry(_ep, &gadget->ep_list, ep_list) {
|
|
|
|
if (usb_gadget_ep_match_desc(gadget, _ep, desc, ep_comp))
|
|
|
|
goto found_ep;
|
|
|
|
}
|
|
|
|
/* Fail */
|
|
|
|
return NULL;
|
|
|
|
|
|
|
|
found_ep:
|
|
|
|
|
|
|
|
if (fifo_mode == 0) {
|
|
|
|
/* Optimize hw fifo size based on ep type and other info */
|
|
|
|
ep = to_usba_ep(_ep);
|
|
|
|
|
|
|
|
switch (usb_endpoint_type(desc)) {
|
|
|
|
case USB_ENDPOINT_XFER_CONTROL:
|
|
|
|
break;
|
|
|
|
|
|
|
|
case USB_ENDPOINT_XFER_ISOC:
|
|
|
|
ep->fifo_size = 1024;
|
|
|
|
ep->nr_banks = 2;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case USB_ENDPOINT_XFER_BULK:
|
|
|
|
ep->fifo_size = 512;
|
|
|
|
ep->nr_banks = 1;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case USB_ENDPOINT_XFER_INT:
|
|
|
|
if (desc->wMaxPacketSize == 0)
|
|
|
|
ep->fifo_size =
|
|
|
|
roundup_pow_of_two(_ep->maxpacket_limit);
|
|
|
|
else
|
|
|
|
ep->fifo_size =
|
|
|
|
roundup_pow_of_two(le16_to_cpu(desc->wMaxPacketSize));
|
|
|
|
ep->nr_banks = 1;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* It might be a little bit late to set this */
|
|
|
|
usb_ep_set_maxpacket_limit(&ep->ep, ep->fifo_size);
|
|
|
|
|
|
|
|
/* Generate ept_cfg basd on FIFO size and number of banks */
|
|
|
|
if (ep->fifo_size <= 8)
|
|
|
|
ep->ept_cfg = USBA_BF(EPT_SIZE, USBA_EPT_SIZE_8);
|
|
|
|
else
|
|
|
|
/* LSB is bit 1, not 0 */
|
|
|
|
ep->ept_cfg =
|
|
|
|
USBA_BF(EPT_SIZE, fls(ep->fifo_size - 1) - 3);
|
|
|
|
|
|
|
|
ep->ept_cfg |= USBA_BF(BK_NUMBER, ep->nr_banks);
|
|
|
|
|
|
|
|
ep->udc->configured_ep++;
|
|
|
|
}
|
|
|
|
|
2017-03-28 16:07:37 +00:00
|
|
|
return _ep;
|
2017-01-23 14:45:59 +00:00
|
|
|
}
|
|
|
|
|
2007-10-10 09:29:43 +00:00
|
|
|
static const struct usb_gadget_ops usba_udc_ops = {
|
2007-10-11 20:40:30 +00:00
|
|
|
.get_frame = usba_udc_get_frame,
|
|
|
|
.wakeup = usba_udc_wakeup,
|
|
|
|
.set_selfpowered = usba_udc_set_selfpowered,
|
2012-02-04 17:55:24 +00:00
|
|
|
.udc_start = atmel_usba_start,
|
|
|
|
.udc_stop = atmel_usba_stop,
|
2017-01-23 14:45:59 +00:00
|
|
|
.match_ep = atmel_usba_match_ep,
|
2007-10-10 09:29:43 +00:00
|
|
|
};
|
|
|
|
|
|
|
|
static struct usb_endpoint_descriptor usba_ep0_desc = {
|
|
|
|
.bLength = USB_DT_ENDPOINT_SIZE,
|
|
|
|
.bDescriptorType = USB_DT_ENDPOINT,
|
|
|
|
.bEndpointAddress = 0,
|
|
|
|
.bmAttributes = USB_ENDPOINT_XFER_CONTROL,
|
2009-02-11 22:11:36 +00:00
|
|
|
.wMaxPacketSize = cpu_to_le16(64),
|
2007-10-10 09:29:43 +00:00
|
|
|
/* FIXME: I have no idea what to put here */
|
|
|
|
.bInterval = 1,
|
|
|
|
};
|
|
|
|
|
2013-12-16 06:14:23 +00:00
|
|
|
static struct usb_gadget usba_gadget_template = {
|
2013-05-20 14:46:02 +00:00
|
|
|
.ops = &usba_udc_ops,
|
|
|
|
.max_speed = USB_SPEED_HIGH,
|
|
|
|
.name = "atmel_usba_udc",
|
2007-10-10 09:29:43 +00:00
|
|
|
};
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Called with interrupts disabled and udc->lock held.
|
|
|
|
*/
|
|
|
|
static void reset_all_endpoints(struct usba_udc *udc)
|
|
|
|
{
|
|
|
|
struct usba_ep *ep;
|
|
|
|
struct usba_request *req, *tmp_req;
|
|
|
|
|
|
|
|
usba_writel(udc, EPT_RST, ~0UL);
|
|
|
|
|
|
|
|
ep = to_usba_ep(udc->gadget.ep0);
|
|
|
|
list_for_each_entry_safe(req, tmp_req, &ep->queue, queue) {
|
|
|
|
list_del_init(&req->queue);
|
|
|
|
request_complete(ep, req, -ECONNRESET);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct usba_ep *get_ep_by_addr(struct usba_udc *udc, u16 wIndex)
|
|
|
|
{
|
|
|
|
struct usba_ep *ep;
|
|
|
|
|
|
|
|
if ((wIndex & USB_ENDPOINT_NUMBER_MASK) == 0)
|
|
|
|
return to_usba_ep(udc->gadget.ep0);
|
|
|
|
|
|
|
|
list_for_each_entry (ep, &udc->gadget.ep_list, ep.ep_list) {
|
|
|
|
u8 bEndpointAddress;
|
|
|
|
|
2012-03-12 18:25:27 +00:00
|
|
|
if (!ep->ep.desc)
|
2007-10-10 09:29:43 +00:00
|
|
|
continue;
|
2012-03-12 18:25:27 +00:00
|
|
|
bEndpointAddress = ep->ep.desc->bEndpointAddress;
|
2007-10-10 09:29:43 +00:00
|
|
|
if ((wIndex ^ bEndpointAddress) & USB_DIR_IN)
|
|
|
|
continue;
|
|
|
|
if ((bEndpointAddress & USB_ENDPOINT_NUMBER_MASK)
|
|
|
|
== (wIndex & USB_ENDPOINT_NUMBER_MASK))
|
|
|
|
return ep;
|
|
|
|
}
|
|
|
|
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Called with interrupts disabled and udc->lock held */
|
|
|
|
static inline void set_protocol_stall(struct usba_udc *udc, struct usba_ep *ep)
|
|
|
|
{
|
|
|
|
usba_ep_writel(ep, SET_STA, USBA_FORCE_STALL);
|
|
|
|
ep->state = WAIT_FOR_SETUP;
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline int is_stalled(struct usba_udc *udc, struct usba_ep *ep)
|
|
|
|
{
|
|
|
|
if (usba_ep_readl(ep, STA) & USBA_FORCE_STALL)
|
|
|
|
return 1;
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void set_address(struct usba_udc *udc, unsigned int addr)
|
|
|
|
{
|
|
|
|
u32 regval;
|
|
|
|
|
|
|
|
DBG(DBG_BUS, "setting address %u...\n", addr);
|
|
|
|
regval = usba_readl(udc, CTRL);
|
|
|
|
regval = USBA_BFINS(DEV_ADDR, addr, regval);
|
|
|
|
usba_writel(udc, CTRL, regval);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int do_test_mode(struct usba_udc *udc)
|
|
|
|
{
|
|
|
|
static const char test_packet_buffer[] = {
|
|
|
|
/* JKJKJKJK * 9 */
|
|
|
|
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
|
|
|
/* JJKKJJKK * 8 */
|
|
|
|
0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA,
|
|
|
|
/* JJKKJJKK * 8 */
|
|
|
|
0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE,
|
|
|
|
/* JJJJJJJKKKKKKK * 8 */
|
|
|
|
0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
|
|
|
|
0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
|
|
|
|
/* JJJJJJJK * 8 */
|
|
|
|
0x7F, 0xBF, 0xDF, 0xEF, 0xF7, 0xFB, 0xFD,
|
|
|
|
/* {JKKKKKKK * 10}, JK */
|
|
|
|
0xFC, 0x7E, 0xBF, 0xDF, 0xEF, 0xF7, 0xFB, 0xFD, 0x7E
|
|
|
|
};
|
|
|
|
struct usba_ep *ep;
|
|
|
|
struct device *dev = &udc->pdev->dev;
|
|
|
|
int test_mode;
|
|
|
|
|
|
|
|
test_mode = udc->test_mode;
|
|
|
|
|
|
|
|
/* Start from a clean slate */
|
|
|
|
reset_all_endpoints(udc);
|
|
|
|
|
|
|
|
switch (test_mode) {
|
|
|
|
case 0x0100:
|
|
|
|
/* Test_J */
|
|
|
|
usba_writel(udc, TST, USBA_TST_J_MODE);
|
|
|
|
dev_info(dev, "Entering Test_J mode...\n");
|
|
|
|
break;
|
|
|
|
case 0x0200:
|
|
|
|
/* Test_K */
|
|
|
|
usba_writel(udc, TST, USBA_TST_K_MODE);
|
|
|
|
dev_info(dev, "Entering Test_K mode...\n");
|
|
|
|
break;
|
|
|
|
case 0x0300:
|
|
|
|
/*
|
|
|
|
* Test_SE0_NAK: Force high-speed mode and set up ep0
|
|
|
|
* for Bulk IN transfers
|
|
|
|
*/
|
2013-05-20 14:36:23 +00:00
|
|
|
ep = &udc->usba_ep[0];
|
2007-10-10 09:29:43 +00:00
|
|
|
usba_writel(udc, TST,
|
|
|
|
USBA_BF(SPEED_CFG, USBA_SPEED_CFG_FORCE_HIGH));
|
|
|
|
usba_ep_writel(ep, CFG,
|
|
|
|
USBA_BF(EPT_SIZE, USBA_EPT_SIZE_64)
|
|
|
|
| USBA_EPT_DIR_IN
|
|
|
|
| USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK)
|
|
|
|
| USBA_BF(BK_NUMBER, 1));
|
|
|
|
if (!(usba_ep_readl(ep, CFG) & USBA_EPT_MAPPED)) {
|
|
|
|
set_protocol_stall(udc, ep);
|
|
|
|
dev_err(dev, "Test_SE0_NAK: ep0 not mapped\n");
|
|
|
|
} else {
|
|
|
|
usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE);
|
|
|
|
dev_info(dev, "Entering Test_SE0_NAK mode...\n");
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
case 0x0400:
|
|
|
|
/* Test_Packet */
|
2013-05-20 14:36:23 +00:00
|
|
|
ep = &udc->usba_ep[0];
|
2007-10-10 09:29:43 +00:00
|
|
|
usba_ep_writel(ep, CFG,
|
|
|
|
USBA_BF(EPT_SIZE, USBA_EPT_SIZE_64)
|
|
|
|
| USBA_EPT_DIR_IN
|
|
|
|
| USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK)
|
|
|
|
| USBA_BF(BK_NUMBER, 1));
|
|
|
|
if (!(usba_ep_readl(ep, CFG) & USBA_EPT_MAPPED)) {
|
|
|
|
set_protocol_stall(udc, ep);
|
|
|
|
dev_err(dev, "Test_Packet: ep0 not mapped\n");
|
|
|
|
} else {
|
|
|
|
usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE);
|
|
|
|
usba_writel(udc, TST, USBA_TST_PKT_MODE);
|
2008-03-04 14:48:37 +00:00
|
|
|
memcpy_toio(ep->fifo, test_packet_buffer,
|
2007-10-10 09:29:43 +00:00
|
|
|
sizeof(test_packet_buffer));
|
|
|
|
usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
|
|
|
|
dev_info(dev, "Entering Test_Packet mode...\n");
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
dev_err(dev, "Invalid test mode: 0x%04x\n", test_mode);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Avoid overly long expressions */
|
|
|
|
static inline bool feature_is_dev_remote_wakeup(struct usb_ctrlrequest *crq)
|
|
|
|
{
|
2009-02-11 22:11:36 +00:00
|
|
|
if (crq->wValue == cpu_to_le16(USB_DEVICE_REMOTE_WAKEUP))
|
2007-10-10 09:29:43 +00:00
|
|
|
return true;
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline bool feature_is_dev_test_mode(struct usb_ctrlrequest *crq)
|
|
|
|
{
|
2009-02-11 22:11:36 +00:00
|
|
|
if (crq->wValue == cpu_to_le16(USB_DEVICE_TEST_MODE))
|
2007-10-10 09:29:43 +00:00
|
|
|
return true;
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline bool feature_is_ep_halt(struct usb_ctrlrequest *crq)
|
|
|
|
{
|
2009-02-11 22:11:36 +00:00
|
|
|
if (crq->wValue == cpu_to_le16(USB_ENDPOINT_HALT))
|
2007-10-10 09:29:43 +00:00
|
|
|
return true;
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int handle_ep0_setup(struct usba_udc *udc, struct usba_ep *ep,
|
|
|
|
struct usb_ctrlrequest *crq)
|
|
|
|
{
|
2008-05-11 05:46:38 +00:00
|
|
|
int retval = 0;
|
2007-10-10 09:29:43 +00:00
|
|
|
|
|
|
|
switch (crq->bRequest) {
|
|
|
|
case USB_REQ_GET_STATUS: {
|
|
|
|
u16 status;
|
|
|
|
|
|
|
|
if (crq->bRequestType == (USB_DIR_IN | USB_RECIP_DEVICE)) {
|
2007-10-11 20:40:30 +00:00
|
|
|
status = cpu_to_le16(udc->devstatus);
|
2007-10-10 09:29:43 +00:00
|
|
|
} else if (crq->bRequestType
|
|
|
|
== (USB_DIR_IN | USB_RECIP_INTERFACE)) {
|
2009-02-11 22:11:36 +00:00
|
|
|
status = cpu_to_le16(0);
|
2007-10-10 09:29:43 +00:00
|
|
|
} else if (crq->bRequestType
|
|
|
|
== (USB_DIR_IN | USB_RECIP_ENDPOINT)) {
|
|
|
|
struct usba_ep *target;
|
|
|
|
|
|
|
|
target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex));
|
|
|
|
if (!target)
|
|
|
|
goto stall;
|
|
|
|
|
|
|
|
status = 0;
|
|
|
|
if (is_stalled(udc, target))
|
2009-02-11 22:11:36 +00:00
|
|
|
status |= cpu_to_le16(1);
|
2007-10-10 09:29:43 +00:00
|
|
|
} else
|
|
|
|
goto delegate;
|
|
|
|
|
|
|
|
/* Write directly to the FIFO. No queueing is done. */
|
2009-02-11 22:11:36 +00:00
|
|
|
if (crq->wLength != cpu_to_le16(sizeof(status)))
|
2007-10-10 09:29:43 +00:00
|
|
|
goto stall;
|
|
|
|
ep->state = DATA_STAGE_IN;
|
2015-03-18 15:53:09 +00:00
|
|
|
usba_io_writew(status, ep->fifo);
|
2007-10-10 09:29:43 +00:00
|
|
|
usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
case USB_REQ_CLEAR_FEATURE: {
|
|
|
|
if (crq->bRequestType == USB_RECIP_DEVICE) {
|
2007-10-11 20:40:30 +00:00
|
|
|
if (feature_is_dev_remote_wakeup(crq))
|
|
|
|
udc->devstatus
|
|
|
|
&= ~(1 << USB_DEVICE_REMOTE_WAKEUP);
|
|
|
|
else
|
2007-10-10 09:29:43 +00:00
|
|
|
/* Can't CLEAR_FEATURE TEST_MODE */
|
|
|
|
goto stall;
|
|
|
|
} else if (crq->bRequestType == USB_RECIP_ENDPOINT) {
|
|
|
|
struct usba_ep *target;
|
|
|
|
|
2009-02-11 22:11:36 +00:00
|
|
|
if (crq->wLength != cpu_to_le16(0)
|
2007-10-10 09:29:43 +00:00
|
|
|
|| !feature_is_ep_halt(crq))
|
|
|
|
goto stall;
|
|
|
|
target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex));
|
|
|
|
if (!target)
|
|
|
|
goto stall;
|
|
|
|
|
|
|
|
usba_ep_writel(target, CLR_STA, USBA_FORCE_STALL);
|
|
|
|
if (target->index != 0)
|
|
|
|
usba_ep_writel(target, CLR_STA,
|
|
|
|
USBA_TOGGLE_CLR);
|
|
|
|
} else {
|
|
|
|
goto delegate;
|
|
|
|
}
|
|
|
|
|
|
|
|
send_status(udc, ep);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
case USB_REQ_SET_FEATURE: {
|
|
|
|
if (crq->bRequestType == USB_RECIP_DEVICE) {
|
|
|
|
if (feature_is_dev_test_mode(crq)) {
|
|
|
|
send_status(udc, ep);
|
|
|
|
ep->state = STATUS_STAGE_TEST;
|
|
|
|
udc->test_mode = le16_to_cpu(crq->wIndex);
|
|
|
|
return 0;
|
|
|
|
} else if (feature_is_dev_remote_wakeup(crq)) {
|
2007-10-11 20:40:30 +00:00
|
|
|
udc->devstatus |= 1 << USB_DEVICE_REMOTE_WAKEUP;
|
2007-10-10 09:29:43 +00:00
|
|
|
} else {
|
|
|
|
goto stall;
|
|
|
|
}
|
|
|
|
} else if (crq->bRequestType == USB_RECIP_ENDPOINT) {
|
|
|
|
struct usba_ep *target;
|
|
|
|
|
2009-02-11 22:11:36 +00:00
|
|
|
if (crq->wLength != cpu_to_le16(0)
|
2007-10-10 09:29:43 +00:00
|
|
|
|| !feature_is_ep_halt(crq))
|
|
|
|
goto stall;
|
|
|
|
|
|
|
|
target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex));
|
|
|
|
if (!target)
|
|
|
|
goto stall;
|
|
|
|
|
|
|
|
usba_ep_writel(target, SET_STA, USBA_FORCE_STALL);
|
|
|
|
} else
|
|
|
|
goto delegate;
|
|
|
|
|
|
|
|
send_status(udc, ep);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
case USB_REQ_SET_ADDRESS:
|
|
|
|
if (crq->bRequestType != (USB_DIR_OUT | USB_RECIP_DEVICE))
|
|
|
|
goto delegate;
|
|
|
|
|
|
|
|
set_address(udc, le16_to_cpu(crq->wValue));
|
|
|
|
send_status(udc, ep);
|
|
|
|
ep->state = STATUS_STAGE_ADDR;
|
|
|
|
break;
|
|
|
|
|
|
|
|
default:
|
|
|
|
delegate:
|
|
|
|
spin_unlock(&udc->lock);
|
|
|
|
retval = udc->driver->setup(&udc->gadget, crq);
|
|
|
|
spin_lock(&udc->lock);
|
|
|
|
}
|
|
|
|
|
|
|
|
return retval;
|
|
|
|
|
|
|
|
stall:
|
2007-11-19 20:58:36 +00:00
|
|
|
pr_err("udc: %s: Invalid setup request: %02x.%02x v%04x i%04x l%d, "
|
2007-10-10 09:29:43 +00:00
|
|
|
"halting endpoint...\n",
|
|
|
|
ep->ep.name, crq->bRequestType, crq->bRequest,
|
|
|
|
le16_to_cpu(crq->wValue), le16_to_cpu(crq->wIndex),
|
|
|
|
le16_to_cpu(crq->wLength));
|
|
|
|
set_protocol_stall(udc, ep);
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void usba_control_irq(struct usba_udc *udc, struct usba_ep *ep)
|
|
|
|
{
|
|
|
|
struct usba_request *req;
|
|
|
|
u32 epstatus;
|
|
|
|
u32 epctrl;
|
|
|
|
|
|
|
|
restart:
|
|
|
|
epstatus = usba_ep_readl(ep, STA);
|
|
|
|
epctrl = usba_ep_readl(ep, CTL);
|
|
|
|
|
|
|
|
DBG(DBG_INT, "%s [%d]: s/%08x c/%08x\n",
|
|
|
|
ep->ep.name, ep->state, epstatus, epctrl);
|
|
|
|
|
|
|
|
req = NULL;
|
|
|
|
if (!list_empty(&ep->queue))
|
|
|
|
req = list_entry(ep->queue.next,
|
|
|
|
struct usba_request, queue);
|
|
|
|
|
|
|
|
if ((epctrl & USBA_TX_PK_RDY) && !(epstatus & USBA_TX_PK_RDY)) {
|
|
|
|
if (req->submitted)
|
|
|
|
next_fifo_transaction(ep, req);
|
|
|
|
else
|
|
|
|
submit_request(ep, req);
|
|
|
|
|
|
|
|
if (req->last_transaction) {
|
|
|
|
usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY);
|
|
|
|
usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE);
|
|
|
|
}
|
|
|
|
goto restart;
|
|
|
|
}
|
|
|
|
if ((epstatus & epctrl) & USBA_TX_COMPLETE) {
|
|
|
|
usba_ep_writel(ep, CLR_STA, USBA_TX_COMPLETE);
|
|
|
|
|
|
|
|
switch (ep->state) {
|
|
|
|
case DATA_STAGE_IN:
|
|
|
|
usba_ep_writel(ep, CTL_ENB, USBA_RX_BK_RDY);
|
|
|
|
usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
|
|
|
|
ep->state = STATUS_STAGE_OUT;
|
|
|
|
break;
|
|
|
|
case STATUS_STAGE_ADDR:
|
|
|
|
/* Activate our new address */
|
|
|
|
usba_writel(udc, CTRL, (usba_readl(udc, CTRL)
|
|
|
|
| USBA_FADDR_EN));
|
|
|
|
usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
|
|
|
|
ep->state = WAIT_FOR_SETUP;
|
|
|
|
break;
|
|
|
|
case STATUS_STAGE_IN:
|
|
|
|
if (req) {
|
|
|
|
list_del_init(&req->queue);
|
|
|
|
request_complete(ep, req, 0);
|
|
|
|
submit_next_request(ep);
|
|
|
|
}
|
|
|
|
usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
|
|
|
|
ep->state = WAIT_FOR_SETUP;
|
|
|
|
break;
|
|
|
|
case STATUS_STAGE_TEST:
|
|
|
|
usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
|
|
|
|
ep->state = WAIT_FOR_SETUP;
|
|
|
|
if (do_test_mode(udc))
|
|
|
|
set_protocol_stall(udc, ep);
|
|
|
|
break;
|
|
|
|
default:
|
2007-11-19 20:58:36 +00:00
|
|
|
pr_err("udc: %s: TXCOMP: Invalid endpoint state %d, "
|
2007-10-10 09:29:43 +00:00
|
|
|
"halting endpoint...\n",
|
|
|
|
ep->ep.name, ep->state);
|
|
|
|
set_protocol_stall(udc, ep);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
goto restart;
|
|
|
|
}
|
|
|
|
if ((epstatus & epctrl) & USBA_RX_BK_RDY) {
|
|
|
|
switch (ep->state) {
|
|
|
|
case STATUS_STAGE_OUT:
|
|
|
|
usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY);
|
|
|
|
usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
|
|
|
|
|
|
|
|
if (req) {
|
|
|
|
list_del_init(&req->queue);
|
|
|
|
request_complete(ep, req, 0);
|
|
|
|
}
|
|
|
|
ep->state = WAIT_FOR_SETUP;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case DATA_STAGE_OUT:
|
|
|
|
receive_data(ep);
|
|
|
|
break;
|
|
|
|
|
|
|
|
default:
|
|
|
|
usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY);
|
|
|
|
usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
|
2007-11-19 20:58:36 +00:00
|
|
|
pr_err("udc: %s: RXRDY: Invalid endpoint state %d, "
|
2007-10-10 09:29:43 +00:00
|
|
|
"halting endpoint...\n",
|
|
|
|
ep->ep.name, ep->state);
|
|
|
|
set_protocol_stall(udc, ep);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
goto restart;
|
|
|
|
}
|
|
|
|
if (epstatus & USBA_RX_SETUP) {
|
|
|
|
union {
|
|
|
|
struct usb_ctrlrequest crq;
|
|
|
|
unsigned long data[2];
|
|
|
|
} crq;
|
|
|
|
unsigned int pkt_len;
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
if (ep->state != WAIT_FOR_SETUP) {
|
|
|
|
/*
|
|
|
|
* Didn't expect a SETUP packet at this
|
|
|
|
* point. Clean up any pending requests (which
|
|
|
|
* may be successful).
|
|
|
|
*/
|
|
|
|
int status = -EPROTO;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* RXRDY and TXCOMP are dropped when SETUP
|
|
|
|
* packets arrive. Just pretend we received
|
|
|
|
* the status packet.
|
|
|
|
*/
|
|
|
|
if (ep->state == STATUS_STAGE_OUT
|
|
|
|
|| ep->state == STATUS_STAGE_IN) {
|
|
|
|
usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
|
|
|
|
status = 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (req) {
|
|
|
|
list_del_init(&req->queue);
|
|
|
|
request_complete(ep, req, status);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
pkt_len = USBA_BFEXT(BYTE_COUNT, usba_ep_readl(ep, STA));
|
|
|
|
DBG(DBG_HW, "Packet length: %u\n", pkt_len);
|
|
|
|
if (pkt_len != sizeof(crq)) {
|
2016-09-27 16:16:59 +00:00
|
|
|
pr_warn("udc: Invalid packet length %u (expected %zu)\n",
|
|
|
|
pkt_len, sizeof(crq));
|
2007-10-10 09:29:43 +00:00
|
|
|
set_protocol_stall(udc, ep);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
DBG(DBG_FIFO, "Copying ctrl request from 0x%p:\n", ep->fifo);
|
2008-03-04 14:48:37 +00:00
|
|
|
memcpy_fromio(crq.data, ep->fifo, sizeof(crq));
|
2007-10-10 09:29:43 +00:00
|
|
|
|
|
|
|
/* Free up one bank in the FIFO so that we can
|
|
|
|
* generate or receive a reply right away. */
|
|
|
|
usba_ep_writel(ep, CLR_STA, USBA_RX_SETUP);
|
|
|
|
|
|
|
|
/* printk(KERN_DEBUG "setup: %d: %02x.%02x\n",
|
|
|
|
ep->state, crq.crq.bRequestType,
|
|
|
|
crq.crq.bRequest); */
|
|
|
|
|
|
|
|
if (crq.crq.bRequestType & USB_DIR_IN) {
|
|
|
|
/*
|
|
|
|
* The USB 2.0 spec states that "if wLength is
|
|
|
|
* zero, there is no data transfer phase."
|
|
|
|
* However, testusb #14 seems to actually
|
|
|
|
* expect a data phase even if wLength = 0...
|
|
|
|
*/
|
|
|
|
ep->state = DATA_STAGE_IN;
|
|
|
|
} else {
|
2009-02-11 22:11:36 +00:00
|
|
|
if (crq.crq.wLength != cpu_to_le16(0))
|
2007-10-10 09:29:43 +00:00
|
|
|
ep->state = DATA_STAGE_OUT;
|
|
|
|
else
|
|
|
|
ep->state = STATUS_STAGE_IN;
|
|
|
|
}
|
|
|
|
|
|
|
|
ret = -1;
|
|
|
|
if (ep->index == 0)
|
|
|
|
ret = handle_ep0_setup(udc, ep, &crq.crq);
|
|
|
|
else {
|
|
|
|
spin_unlock(&udc->lock);
|
|
|
|
ret = udc->driver->setup(&udc->gadget, &crq.crq);
|
|
|
|
spin_lock(&udc->lock);
|
|
|
|
}
|
|
|
|
|
|
|
|
DBG(DBG_BUS, "req %02x.%02x, length %d, state %d, ret %d\n",
|
|
|
|
crq.crq.bRequestType, crq.crq.bRequest,
|
|
|
|
le16_to_cpu(crq.crq.wLength), ep->state, ret);
|
|
|
|
|
|
|
|
if (ret < 0) {
|
|
|
|
/* Let the host know that we failed */
|
|
|
|
set_protocol_stall(udc, ep);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static void usba_ep_irq(struct usba_udc *udc, struct usba_ep *ep)
|
|
|
|
{
|
|
|
|
struct usba_request *req;
|
|
|
|
u32 epstatus;
|
|
|
|
u32 epctrl;
|
|
|
|
|
|
|
|
epstatus = usba_ep_readl(ep, STA);
|
|
|
|
epctrl = usba_ep_readl(ep, CTL);
|
|
|
|
|
|
|
|
DBG(DBG_INT, "%s: interrupt, status: 0x%08x\n", ep->ep.name, epstatus);
|
|
|
|
|
|
|
|
while ((epctrl & USBA_TX_PK_RDY) && !(epstatus & USBA_TX_PK_RDY)) {
|
|
|
|
DBG(DBG_BUS, "%s: TX PK ready\n", ep->ep.name);
|
|
|
|
|
|
|
|
if (list_empty(&ep->queue)) {
|
|
|
|
dev_warn(&udc->pdev->dev, "ep_irq: queue empty\n");
|
|
|
|
usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
req = list_entry(ep->queue.next, struct usba_request, queue);
|
|
|
|
|
|
|
|
if (req->using_dma) {
|
|
|
|
/* Send a zero-length packet */
|
|
|
|
usba_ep_writel(ep, SET_STA,
|
|
|
|
USBA_TX_PK_RDY);
|
|
|
|
usba_ep_writel(ep, CTL_DIS,
|
|
|
|
USBA_TX_PK_RDY);
|
|
|
|
list_del_init(&req->queue);
|
|
|
|
submit_next_request(ep);
|
|
|
|
request_complete(ep, req, 0);
|
|
|
|
} else {
|
|
|
|
if (req->submitted)
|
|
|
|
next_fifo_transaction(ep, req);
|
|
|
|
else
|
|
|
|
submit_request(ep, req);
|
|
|
|
|
|
|
|
if (req->last_transaction) {
|
|
|
|
list_del_init(&req->queue);
|
|
|
|
submit_next_request(ep);
|
|
|
|
request_complete(ep, req, 0);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
epstatus = usba_ep_readl(ep, STA);
|
|
|
|
epctrl = usba_ep_readl(ep, CTL);
|
|
|
|
}
|
|
|
|
if ((epstatus & epctrl) & USBA_RX_BK_RDY) {
|
|
|
|
DBG(DBG_BUS, "%s: RX data ready\n", ep->ep.name);
|
|
|
|
receive_data(ep);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static void usba_dma_irq(struct usba_udc *udc, struct usba_ep *ep)
|
|
|
|
{
|
|
|
|
struct usba_request *req;
|
|
|
|
u32 status, control, pending;
|
|
|
|
|
|
|
|
status = usba_dma_readl(ep, STATUS);
|
|
|
|
control = usba_dma_readl(ep, CONTROL);
|
|
|
|
#ifdef CONFIG_USB_GADGET_DEBUG_FS
|
|
|
|
ep->last_dma_status = status;
|
|
|
|
#endif
|
|
|
|
pending = status & control;
|
|
|
|
DBG(DBG_INT | DBG_DMA, "dma irq, s/%#08x, c/%#08x\n", status, control);
|
|
|
|
|
|
|
|
if (status & USBA_DMA_CH_EN) {
|
|
|
|
dev_err(&udc->pdev->dev,
|
|
|
|
"DMA_CH_EN is set after transfer is finished!\n");
|
|
|
|
dev_err(&udc->pdev->dev,
|
|
|
|
"status=%#08x, pending=%#08x, control=%#08x\n",
|
|
|
|
status, pending, control);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* try to pretend nothing happened. We might have to
|
|
|
|
* do something here...
|
|
|
|
*/
|
|
|
|
}
|
|
|
|
|
|
|
|
if (list_empty(&ep->queue))
|
|
|
|
/* Might happen if a reset comes along at the right moment */
|
|
|
|
return;
|
|
|
|
|
|
|
|
if (pending & (USBA_DMA_END_TR_ST | USBA_DMA_END_BUF_ST)) {
|
|
|
|
req = list_entry(ep->queue.next, struct usba_request, queue);
|
|
|
|
usba_update_req(ep, req, status);
|
|
|
|
|
|
|
|
list_del_init(&req->queue);
|
|
|
|
submit_next_request(ep);
|
|
|
|
request_complete(ep, req, 0);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static irqreturn_t usba_udc_irq(int irq, void *devid)
|
|
|
|
{
|
|
|
|
struct usba_udc *udc = devid;
|
2015-01-06 13:47:02 +00:00
|
|
|
u32 status, int_enb;
|
2007-10-10 09:29:43 +00:00
|
|
|
u32 dma_status;
|
|
|
|
u32 ep_status;
|
|
|
|
|
|
|
|
spin_lock(&udc->lock);
|
|
|
|
|
2015-01-06 13:47:02 +00:00
|
|
|
int_enb = usba_int_enb_get(udc);
|
2015-11-16 18:22:08 +00:00
|
|
|
status = usba_readl(udc, INT_STA) & (int_enb | USBA_HIGH_SPEED);
|
2007-10-10 09:29:43 +00:00
|
|
|
DBG(DBG_INT, "irq, status=%#08x\n", status);
|
|
|
|
|
|
|
|
if (status & USBA_DET_SUSPEND) {
|
2015-01-06 13:46:58 +00:00
|
|
|
toggle_bias(udc, 0);
|
2007-10-10 09:29:43 +00:00
|
|
|
usba_writel(udc, INT_CLR, USBA_DET_SUSPEND);
|
2015-01-06 13:47:02 +00:00
|
|
|
usba_int_enb_set(udc, int_enb | USBA_WAKE_UP);
|
2015-01-06 13:46:59 +00:00
|
|
|
udc->bias_pulse_needed = true;
|
2007-10-10 09:29:43 +00:00
|
|
|
DBG(DBG_BUS, "Suspend detected\n");
|
|
|
|
if (udc->gadget.speed != USB_SPEED_UNKNOWN
|
|
|
|
&& udc->driver && udc->driver->suspend) {
|
|
|
|
spin_unlock(&udc->lock);
|
|
|
|
udc->driver->suspend(&udc->gadget);
|
|
|
|
spin_lock(&udc->lock);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
if (status & USBA_WAKE_UP) {
|
2015-01-06 13:46:58 +00:00
|
|
|
toggle_bias(udc, 1);
|
2007-10-10 09:29:43 +00:00
|
|
|
usba_writel(udc, INT_CLR, USBA_WAKE_UP);
|
2015-01-06 13:47:02 +00:00
|
|
|
usba_int_enb_set(udc, int_enb & ~USBA_WAKE_UP);
|
2007-10-10 09:29:43 +00:00
|
|
|
DBG(DBG_BUS, "Wake Up CPU detected\n");
|
|
|
|
}
|
|
|
|
|
|
|
|
if (status & USBA_END_OF_RESUME) {
|
|
|
|
usba_writel(udc, INT_CLR, USBA_END_OF_RESUME);
|
2015-01-06 13:46:59 +00:00
|
|
|
generate_bias_pulse(udc);
|
2007-10-10 09:29:43 +00:00
|
|
|
DBG(DBG_BUS, "Resume detected\n");
|
|
|
|
if (udc->gadget.speed != USB_SPEED_UNKNOWN
|
|
|
|
&& udc->driver && udc->driver->resume) {
|
|
|
|
spin_unlock(&udc->lock);
|
|
|
|
udc->driver->resume(&udc->gadget);
|
|
|
|
spin_lock(&udc->lock);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
dma_status = USBA_BFEXT(DMA_INT, status);
|
|
|
|
if (dma_status) {
|
|
|
|
int i;
|
|
|
|
|
2014-08-07 03:43:07 +00:00
|
|
|
for (i = 1; i <= USBA_NR_DMAS; i++)
|
2007-10-10 09:29:43 +00:00
|
|
|
if (dma_status & (1 << i))
|
2013-05-20 14:36:23 +00:00
|
|
|
usba_dma_irq(udc, &udc->usba_ep[i]);
|
2007-10-10 09:29:43 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
ep_status = USBA_BFEXT(EPT_INT, status);
|
|
|
|
if (ep_status) {
|
|
|
|
int i;
|
|
|
|
|
2014-02-19 02:07:43 +00:00
|
|
|
for (i = 0; i < udc->num_ep; i++)
|
2007-10-10 09:29:43 +00:00
|
|
|
if (ep_status & (1 << i)) {
|
2013-05-20 14:36:23 +00:00
|
|
|
if (ep_is_control(&udc->usba_ep[i]))
|
|
|
|
usba_control_irq(udc, &udc->usba_ep[i]);
|
2007-10-10 09:29:43 +00:00
|
|
|
else
|
2013-05-20 14:36:23 +00:00
|
|
|
usba_ep_irq(udc, &udc->usba_ep[i]);
|
2007-10-10 09:29:43 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
if (status & USBA_END_OF_RESET) {
|
2017-01-23 14:45:59 +00:00
|
|
|
struct usba_ep *ep0, *ep;
|
|
|
|
int i, n;
|
2007-10-10 09:29:43 +00:00
|
|
|
|
|
|
|
usba_writel(udc, INT_CLR, USBA_END_OF_RESET);
|
2015-01-06 13:46:59 +00:00
|
|
|
generate_bias_pulse(udc);
|
2007-10-10 09:29:43 +00:00
|
|
|
reset_all_endpoints(udc);
|
|
|
|
|
2014-11-06 06:28:09 +00:00
|
|
|
if (udc->gadget.speed != USB_SPEED_UNKNOWN && udc->driver) {
|
2008-05-11 05:46:38 +00:00
|
|
|
udc->gadget.speed = USB_SPEED_UNKNOWN;
|
|
|
|
spin_unlock(&udc->lock);
|
2014-11-06 06:28:09 +00:00
|
|
|
usb_gadget_udc_reset(&udc->gadget, udc->driver);
|
2008-05-11 05:46:38 +00:00
|
|
|
spin_lock(&udc->lock);
|
|
|
|
}
|
|
|
|
|
2011-08-30 15:11:19 +00:00
|
|
|
if (status & USBA_HIGH_SPEED)
|
2007-10-10 09:29:43 +00:00
|
|
|
udc->gadget.speed = USB_SPEED_HIGH;
|
2011-08-30 15:11:19 +00:00
|
|
|
else
|
2007-10-10 09:29:43 +00:00
|
|
|
udc->gadget.speed = USB_SPEED_FULL;
|
2011-08-30 15:11:19 +00:00
|
|
|
DBG(DBG_BUS, "%s bus reset detected\n",
|
|
|
|
usb_speed_string(udc->gadget.speed));
|
2007-10-10 09:29:43 +00:00
|
|
|
|
2013-05-20 14:36:23 +00:00
|
|
|
ep0 = &udc->usba_ep[0];
|
2012-03-12 18:25:27 +00:00
|
|
|
ep0->ep.desc = &usba_ep0_desc;
|
2007-10-10 09:29:43 +00:00
|
|
|
ep0->state = WAIT_FOR_SETUP;
|
|
|
|
usba_ep_writel(ep0, CFG,
|
|
|
|
(USBA_BF(EPT_SIZE, EP0_EPT_SIZE)
|
|
|
|
| USBA_BF(EPT_TYPE, USBA_EPT_TYPE_CONTROL)
|
|
|
|
| USBA_BF(BK_NUMBER, USBA_BK_NUMBER_ONE)));
|
|
|
|
usba_ep_writel(ep0, CTL_ENB,
|
|
|
|
USBA_EPT_ENABLE | USBA_RX_SETUP);
|
2015-01-06 13:47:02 +00:00
|
|
|
usba_int_enb_set(udc, int_enb | USBA_BF(EPT_INT, 1) |
|
|
|
|
USBA_DET_SUSPEND | USBA_END_OF_RESUME);
|
2007-10-10 09:29:43 +00:00
|
|
|
|
2008-05-11 05:46:38 +00:00
|
|
|
/*
|
|
|
|
* Unclear why we hit this irregularly, e.g. in usbtest,
|
|
|
|
* but it's clearly harmless...
|
|
|
|
*/
|
2007-10-10 09:29:43 +00:00
|
|
|
if (!(usba_ep_readl(ep0, CFG) & USBA_EPT_MAPPED))
|
2008-05-11 05:46:38 +00:00
|
|
|
dev_dbg(&udc->pdev->dev,
|
|
|
|
"ODD: EP0 configuration is invalid!\n");
|
2017-01-23 14:45:59 +00:00
|
|
|
|
|
|
|
/* Preallocate other endpoints */
|
|
|
|
n = fifo_mode ? udc->num_ep : udc->configured_ep;
|
|
|
|
for (i = 1; i < n; i++) {
|
|
|
|
ep = &udc->usba_ep[i];
|
|
|
|
usba_ep_writel(ep, CFG, ep->ept_cfg);
|
|
|
|
if (!(usba_ep_readl(ep, CFG) & USBA_EPT_MAPPED))
|
|
|
|
dev_dbg(&udc->pdev->dev,
|
|
|
|
"ODD: EP%d configuration is invalid!\n", i);
|
|
|
|
}
|
2007-10-10 09:29:43 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
spin_unlock(&udc->lock);
|
|
|
|
|
|
|
|
return IRQ_HANDLED;
|
|
|
|
}
|
|
|
|
|
2015-02-12 17:54:06 +00:00
|
|
|
static int start_clock(struct usba_udc *udc)
|
|
|
|
{
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
if (udc->clocked)
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
ret = clk_prepare_enable(udc->pclk);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
ret = clk_prepare_enable(udc->hclk);
|
|
|
|
if (ret) {
|
|
|
|
clk_disable_unprepare(udc->pclk);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
udc->clocked = true;
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void stop_clock(struct usba_udc *udc)
|
|
|
|
{
|
|
|
|
if (!udc->clocked)
|
|
|
|
return;
|
|
|
|
|
|
|
|
clk_disable_unprepare(udc->hclk);
|
|
|
|
clk_disable_unprepare(udc->pclk);
|
|
|
|
|
|
|
|
udc->clocked = false;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int usba_start(struct usba_udc *udc)
|
|
|
|
{
|
|
|
|
unsigned long flags;
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
ret = start_clock(udc);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
spin_lock_irqsave(&udc->lock, flags);
|
|
|
|
toggle_bias(udc, 1);
|
|
|
|
usba_writel(udc, CTRL, USBA_ENABLE_MASK);
|
|
|
|
usba_int_enb_set(udc, USBA_END_OF_RESET);
|
|
|
|
spin_unlock_irqrestore(&udc->lock, flags);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void usba_stop(struct usba_udc *udc)
|
|
|
|
{
|
|
|
|
unsigned long flags;
|
|
|
|
|
|
|
|
spin_lock_irqsave(&udc->lock, flags);
|
|
|
|
udc->gadget.speed = USB_SPEED_UNKNOWN;
|
|
|
|
reset_all_endpoints(udc);
|
|
|
|
|
|
|
|
/* This will also disable the DP pullup */
|
|
|
|
toggle_bias(udc, 0);
|
|
|
|
usba_writel(udc, CTRL, USBA_DISABLE_MASK);
|
|
|
|
spin_unlock_irqrestore(&udc->lock, flags);
|
|
|
|
|
|
|
|
stop_clock(udc);
|
|
|
|
}
|
|
|
|
|
|
|
|
static irqreturn_t usba_vbus_irq_thread(int irq, void *devid)
|
2007-10-10 09:29:43 +00:00
|
|
|
{
|
|
|
|
struct usba_udc *udc = devid;
|
|
|
|
int vbus;
|
|
|
|
|
|
|
|
/* debounce */
|
|
|
|
udelay(10);
|
|
|
|
|
2015-02-12 17:54:06 +00:00
|
|
|
mutex_lock(&udc->vbus_mutex);
|
2007-10-10 09:29:43 +00:00
|
|
|
|
2010-02-05 08:49:25 +00:00
|
|
|
vbus = vbus_is_present(udc);
|
2007-10-10 09:29:43 +00:00
|
|
|
if (vbus != udc->vbus_prev) {
|
|
|
|
if (vbus) {
|
2015-02-12 17:54:06 +00:00
|
|
|
usba_start(udc);
|
2007-10-10 09:29:43 +00:00
|
|
|
} else {
|
2015-02-12 17:54:06 +00:00
|
|
|
usba_stop(udc);
|
|
|
|
|
|
|
|
if (udc->driver->disconnect)
|
2008-05-11 05:46:38 +00:00
|
|
|
udc->driver->disconnect(&udc->gadget);
|
2007-10-10 09:29:43 +00:00
|
|
|
}
|
|
|
|
udc->vbus_prev = vbus;
|
|
|
|
}
|
|
|
|
|
2015-02-12 17:54:06 +00:00
|
|
|
mutex_unlock(&udc->vbus_mutex);
|
2007-10-10 09:29:43 +00:00
|
|
|
return IRQ_HANDLED;
|
|
|
|
}
|
|
|
|
|
2012-02-04 17:55:24 +00:00
|
|
|
static int atmel_usba_start(struct usb_gadget *gadget,
|
|
|
|
struct usb_gadget_driver *driver)
|
2007-10-10 09:29:43 +00:00
|
|
|
{
|
2013-08-21 08:42:24 +00:00
|
|
|
int ret;
|
2012-02-04 17:55:24 +00:00
|
|
|
struct usba_udc *udc = container_of(gadget, struct usba_udc, gadget);
|
2007-10-10 09:29:43 +00:00
|
|
|
unsigned long flags;
|
|
|
|
|
|
|
|
spin_lock_irqsave(&udc->lock, flags);
|
2007-10-11 20:40:30 +00:00
|
|
|
udc->devstatus = 1 << USB_DEVICE_SELF_POWERED;
|
2007-10-10 09:29:43 +00:00
|
|
|
udc->driver = driver;
|
|
|
|
spin_unlock_irqrestore(&udc->lock, flags);
|
|
|
|
|
2015-02-12 17:54:06 +00:00
|
|
|
mutex_lock(&udc->vbus_mutex);
|
2007-10-10 09:29:43 +00:00
|
|
|
|
2009-03-24 14:45:20 +00:00
|
|
|
if (gpio_is_valid(udc->vbus_pin))
|
2007-10-10 09:29:43 +00:00
|
|
|
enable_irq(gpio_to_irq(udc->vbus_pin));
|
|
|
|
|
|
|
|
/* If Vbus is present, enable the controller and wait for reset */
|
2015-02-12 17:54:06 +00:00
|
|
|
udc->vbus_prev = vbus_is_present(udc);
|
|
|
|
if (udc->vbus_prev) {
|
|
|
|
ret = usba_start(udc);
|
|
|
|
if (ret)
|
|
|
|
goto err;
|
2007-10-10 09:29:43 +00:00
|
|
|
}
|
|
|
|
|
2015-02-12 17:54:06 +00:00
|
|
|
mutex_unlock(&udc->vbus_mutex);
|
2013-08-21 08:42:24 +00:00
|
|
|
return 0;
|
2015-02-12 17:54:06 +00:00
|
|
|
|
|
|
|
err:
|
|
|
|
if (gpio_is_valid(udc->vbus_pin))
|
|
|
|
disable_irq(gpio_to_irq(udc->vbus_pin));
|
|
|
|
|
|
|
|
mutex_unlock(&udc->vbus_mutex);
|
|
|
|
|
|
|
|
spin_lock_irqsave(&udc->lock, flags);
|
|
|
|
udc->devstatus &= ~(1 << USB_DEVICE_SELF_POWERED);
|
|
|
|
udc->driver = NULL;
|
|
|
|
spin_unlock_irqrestore(&udc->lock, flags);
|
|
|
|
return ret;
|
2007-10-10 09:29:43 +00:00
|
|
|
}
|
|
|
|
|
2014-10-17 17:05:12 +00:00
|
|
|
static int atmel_usba_stop(struct usb_gadget *gadget)
|
2007-10-10 09:29:43 +00:00
|
|
|
{
|
2012-02-04 17:55:24 +00:00
|
|
|
struct usba_udc *udc = container_of(gadget, struct usba_udc, gadget);
|
2007-10-10 09:29:43 +00:00
|
|
|
|
2009-03-24 14:45:20 +00:00
|
|
|
if (gpio_is_valid(udc->vbus_pin))
|
2007-10-10 09:29:43 +00:00
|
|
|
disable_irq(gpio_to_irq(udc->vbus_pin));
|
|
|
|
|
2017-01-23 14:45:59 +00:00
|
|
|
if (fifo_mode == 0)
|
|
|
|
udc->configured_ep = 1;
|
|
|
|
|
2015-02-12 17:54:06 +00:00
|
|
|
usba_stop(udc);
|
2007-10-10 09:29:43 +00:00
|
|
|
|
2014-03-03 16:48:34 +00:00
|
|
|
udc->driver = NULL;
|
2007-10-10 09:29:43 +00:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2013-05-03 12:22:57 +00:00
|
|
|
#ifdef CONFIG_OF
|
2015-01-06 13:46:58 +00:00
|
|
|
static void at91sam9rl_toggle_bias(struct usba_udc *udc, int is_on)
|
|
|
|
{
|
2015-09-30 10:57:10 +00:00
|
|
|
regmap_update_bits(udc->pmc, AT91_CKGR_UCKR, AT91_PMC_BIASEN,
|
|
|
|
is_on ? AT91_PMC_BIASEN : 0);
|
2015-01-06 13:46:58 +00:00
|
|
|
}
|
|
|
|
|
2015-01-06 13:46:59 +00:00
|
|
|
static void at91sam9g45_pulse_bias(struct usba_udc *udc)
|
|
|
|
{
|
2015-09-30 10:57:10 +00:00
|
|
|
regmap_update_bits(udc->pmc, AT91_CKGR_UCKR, AT91_PMC_BIASEN, 0);
|
|
|
|
regmap_update_bits(udc->pmc, AT91_CKGR_UCKR, AT91_PMC_BIASEN,
|
|
|
|
AT91_PMC_BIASEN);
|
2015-01-06 13:46:59 +00:00
|
|
|
}
|
|
|
|
|
2015-01-06 13:46:58 +00:00
|
|
|
static const struct usba_udc_errata at91sam9rl_errata = {
|
|
|
|
.toggle_bias = at91sam9rl_toggle_bias,
|
|
|
|
};
|
|
|
|
|
2015-01-06 13:46:59 +00:00
|
|
|
static const struct usba_udc_errata at91sam9g45_errata = {
|
|
|
|
.pulse_bias = at91sam9g45_pulse_bias,
|
|
|
|
};
|
|
|
|
|
2015-01-06 13:46:58 +00:00
|
|
|
static const struct of_device_id atmel_udc_dt_ids[] = {
|
|
|
|
{ .compatible = "atmel,at91sam9rl-udc", .data = &at91sam9rl_errata },
|
2015-01-06 13:46:59 +00:00
|
|
|
{ .compatible = "atmel,at91sam9g45-udc", .data = &at91sam9g45_errata },
|
2015-01-06 13:46:58 +00:00
|
|
|
{ .compatible = "atmel,sama5d3-udc" },
|
|
|
|
{ /* sentinel */ }
|
|
|
|
};
|
|
|
|
|
|
|
|
MODULE_DEVICE_TABLE(of, atmel_udc_dt_ids);
|
|
|
|
|
2013-05-03 12:22:57 +00:00
|
|
|
static struct usba_ep * atmel_udc_of_init(struct platform_device *pdev,
|
|
|
|
struct usba_udc *udc)
|
|
|
|
{
|
|
|
|
u32 val;
|
|
|
|
const char *name;
|
|
|
|
enum of_gpio_flags flags;
|
|
|
|
struct device_node *np = pdev->dev.of_node;
|
2015-01-06 13:46:58 +00:00
|
|
|
const struct of_device_id *match;
|
2013-05-03 12:22:57 +00:00
|
|
|
struct device_node *pp;
|
|
|
|
int i, ret;
|
|
|
|
struct usba_ep *eps, *ep;
|
|
|
|
|
2015-01-06 13:46:58 +00:00
|
|
|
match = of_match_node(atmel_udc_dt_ids, np);
|
|
|
|
if (!match)
|
|
|
|
return ERR_PTR(-EINVAL);
|
|
|
|
|
|
|
|
udc->errata = match->data;
|
2015-09-30 10:57:10 +00:00
|
|
|
udc->pmc = syscon_regmap_lookup_by_compatible("atmel,at91sam9g45-pmc");
|
2016-06-13 08:47:30 +00:00
|
|
|
if (IS_ERR(udc->pmc))
|
|
|
|
udc->pmc = syscon_regmap_lookup_by_compatible("atmel,at91sam9x5-pmc");
|
2015-09-30 10:57:10 +00:00
|
|
|
if (udc->errata && IS_ERR(udc->pmc))
|
|
|
|
return ERR_CAST(udc->pmc);
|
2015-01-06 13:46:58 +00:00
|
|
|
|
2013-05-03 12:22:57 +00:00
|
|
|
udc->num_ep = 0;
|
|
|
|
|
|
|
|
udc->vbus_pin = of_get_named_gpio_flags(np, "atmel,vbus-gpio", 0,
|
|
|
|
&flags);
|
|
|
|
udc->vbus_pin_inverted = (flags & OF_GPIO_ACTIVE_LOW) ? 1 : 0;
|
|
|
|
|
2017-01-23 14:45:59 +00:00
|
|
|
if (fifo_mode == 0) {
|
|
|
|
pp = NULL;
|
|
|
|
while ((pp = of_get_next_child(np, pp)))
|
|
|
|
udc->num_ep++;
|
|
|
|
udc->configured_ep = 1;
|
2017-03-28 16:07:37 +00:00
|
|
|
} else {
|
2017-01-23 14:45:59 +00:00
|
|
|
udc->num_ep = usba_config_fifo_table(udc);
|
2017-03-28 16:07:37 +00:00
|
|
|
}
|
2013-05-03 12:22:57 +00:00
|
|
|
|
|
|
|
eps = devm_kzalloc(&pdev->dev, sizeof(struct usba_ep) * udc->num_ep,
|
|
|
|
GFP_KERNEL);
|
|
|
|
if (!eps)
|
|
|
|
return ERR_PTR(-ENOMEM);
|
|
|
|
|
|
|
|
udc->gadget.ep0 = &eps[0].ep;
|
|
|
|
|
|
|
|
INIT_LIST_HEAD(&eps[0].ep.ep_list);
|
|
|
|
|
|
|
|
pp = NULL;
|
|
|
|
i = 0;
|
2017-01-23 14:45:59 +00:00
|
|
|
while ((pp = of_get_next_child(np, pp)) && i < udc->num_ep) {
|
2013-05-03 12:22:57 +00:00
|
|
|
ep = &eps[i];
|
|
|
|
|
|
|
|
ret = of_property_read_u32(pp, "reg", &val);
|
|
|
|
if (ret) {
|
|
|
|
dev_err(&pdev->dev, "of_probe: reg error(%d)\n", ret);
|
|
|
|
goto err;
|
|
|
|
}
|
2017-01-23 14:45:59 +00:00
|
|
|
ep->index = fifo_mode ? udc->fifo_cfg[i].hw_ep_num : val;
|
2013-05-03 12:22:57 +00:00
|
|
|
|
|
|
|
ret = of_property_read_u32(pp, "atmel,fifo-size", &val);
|
|
|
|
if (ret) {
|
|
|
|
dev_err(&pdev->dev, "of_probe: fifo-size error(%d)\n", ret);
|
|
|
|
goto err;
|
|
|
|
}
|
2017-04-03 07:19:51 +00:00
|
|
|
if (fifo_mode) {
|
|
|
|
if (val < udc->fifo_cfg[i].fifo_size) {
|
|
|
|
dev_warn(&pdev->dev,
|
|
|
|
"Using max fifo-size value from DT\n");
|
|
|
|
ep->fifo_size = val;
|
|
|
|
} else {
|
|
|
|
ep->fifo_size = udc->fifo_cfg[i].fifo_size;
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
ep->fifo_size = val;
|
|
|
|
}
|
2013-05-03 12:22:57 +00:00
|
|
|
|
|
|
|
ret = of_property_read_u32(pp, "atmel,nb-banks", &val);
|
|
|
|
if (ret) {
|
|
|
|
dev_err(&pdev->dev, "of_probe: nb-banks error(%d)\n", ret);
|
|
|
|
goto err;
|
|
|
|
}
|
2017-04-03 07:19:51 +00:00
|
|
|
if (fifo_mode) {
|
|
|
|
if (val < udc->fifo_cfg[i].nr_banks) {
|
|
|
|
dev_warn(&pdev->dev,
|
|
|
|
"Using max nb-banks value from DT\n");
|
|
|
|
ep->nr_banks = val;
|
|
|
|
} else {
|
|
|
|
ep->nr_banks = udc->fifo_cfg[i].nr_banks;
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
ep->nr_banks = val;
|
|
|
|
}
|
2013-05-03 12:22:57 +00:00
|
|
|
|
|
|
|
ep->can_dma = of_property_read_bool(pp, "atmel,can-dma");
|
|
|
|
ep->can_isoc = of_property_read_bool(pp, "atmel,can-isoc");
|
|
|
|
|
|
|
|
ret = of_property_read_string(pp, "name", &name);
|
2015-07-13 09:03:54 +00:00
|
|
|
if (ret) {
|
|
|
|
dev_err(&pdev->dev, "of_probe: name error(%d)\n", ret);
|
|
|
|
goto err;
|
|
|
|
}
|
2017-01-11 12:11:08 +00:00
|
|
|
sprintf(ep->name, "ep%d", ep->index);
|
|
|
|
ep->ep.name = ep->name;
|
2013-05-03 12:22:57 +00:00
|
|
|
|
|
|
|
ep->ep_regs = udc->regs + USBA_EPT_BASE(i);
|
|
|
|
ep->dma_regs = udc->regs + USBA_DMA_BASE(i);
|
|
|
|
ep->fifo = udc->fifo + USBA_FIFO_BASE(i);
|
|
|
|
ep->ep.ops = &usba_ep_ops;
|
2013-12-13 11:23:38 +00:00
|
|
|
usb_ep_set_maxpacket_limit(&ep->ep, ep->fifo_size);
|
2013-05-03 12:22:57 +00:00
|
|
|
ep->udc = udc;
|
|
|
|
INIT_LIST_HEAD(&ep->queue);
|
|
|
|
|
2015-09-18 14:58:28 +00:00
|
|
|
if (ep->index == 0) {
|
|
|
|
ep->ep.caps.type_control = true;
|
|
|
|
} else {
|
|
|
|
ep->ep.caps.type_iso = ep->can_isoc;
|
|
|
|
ep->ep.caps.type_bulk = true;
|
|
|
|
ep->ep.caps.type_int = true;
|
|
|
|
}
|
|
|
|
|
|
|
|
ep->ep.caps.dir_in = true;
|
|
|
|
ep->ep.caps.dir_out = true;
|
|
|
|
|
2017-01-23 14:45:59 +00:00
|
|
|
if (fifo_mode != 0) {
|
|
|
|
/*
|
|
|
|
* Generate ept_cfg based on FIFO size and
|
|
|
|
* banks number
|
|
|
|
*/
|
|
|
|
if (ep->fifo_size <= 8)
|
|
|
|
ep->ept_cfg = USBA_BF(EPT_SIZE, USBA_EPT_SIZE_8);
|
|
|
|
else
|
|
|
|
/* LSB is bit 1, not 0 */
|
|
|
|
ep->ept_cfg =
|
|
|
|
USBA_BF(EPT_SIZE, fls(ep->fifo_size - 1) - 3);
|
|
|
|
|
|
|
|
ep->ept_cfg |= USBA_BF(BK_NUMBER, ep->nr_banks);
|
|
|
|
}
|
|
|
|
|
2013-05-03 12:22:57 +00:00
|
|
|
if (i)
|
|
|
|
list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list);
|
|
|
|
|
|
|
|
i++;
|
|
|
|
}
|
|
|
|
|
2014-02-27 15:42:13 +00:00
|
|
|
if (i == 0) {
|
|
|
|
dev_err(&pdev->dev, "of_probe: no endpoint specified\n");
|
|
|
|
ret = -EINVAL;
|
|
|
|
goto err;
|
|
|
|
}
|
|
|
|
|
2013-05-03 12:22:57 +00:00
|
|
|
return eps;
|
|
|
|
err:
|
|
|
|
return ERR_PTR(ret);
|
|
|
|
}
|
|
|
|
#else
|
|
|
|
static struct usba_ep * atmel_udc_of_init(struct platform_device *pdev,
|
|
|
|
struct usba_udc *udc)
|
|
|
|
{
|
|
|
|
return ERR_PTR(-ENOSYS);
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
static struct usba_ep * usba_udc_pdata(struct platform_device *pdev,
|
|
|
|
struct usba_udc *udc)
|
2007-10-10 09:29:43 +00:00
|
|
|
{
|
2013-07-30 08:00:51 +00:00
|
|
|
struct usba_platform_data *pdata = dev_get_platdata(&pdev->dev);
|
2013-05-03 12:22:57 +00:00
|
|
|
struct usba_ep *eps;
|
|
|
|
int i;
|
|
|
|
|
|
|
|
if (!pdata)
|
|
|
|
return ERR_PTR(-ENXIO);
|
|
|
|
|
|
|
|
eps = devm_kzalloc(&pdev->dev, sizeof(struct usba_ep) * pdata->num_ep,
|
|
|
|
GFP_KERNEL);
|
|
|
|
if (!eps)
|
|
|
|
return ERR_PTR(-ENOMEM);
|
|
|
|
|
|
|
|
udc->gadget.ep0 = &eps[0].ep;
|
|
|
|
|
|
|
|
udc->vbus_pin = pdata->vbus_pin;
|
|
|
|
udc->vbus_pin_inverted = pdata->vbus_pin_inverted;
|
|
|
|
udc->num_ep = pdata->num_ep;
|
|
|
|
|
|
|
|
INIT_LIST_HEAD(&eps[0].ep.ep_list);
|
|
|
|
|
|
|
|
for (i = 0; i < pdata->num_ep; i++) {
|
|
|
|
struct usba_ep *ep = &eps[i];
|
|
|
|
|
|
|
|
ep->ep_regs = udc->regs + USBA_EPT_BASE(i);
|
|
|
|
ep->dma_regs = udc->regs + USBA_DMA_BASE(i);
|
|
|
|
ep->fifo = udc->fifo + USBA_FIFO_BASE(i);
|
|
|
|
ep->ep.ops = &usba_ep_ops;
|
|
|
|
ep->ep.name = pdata->ep[i].name;
|
2013-12-13 11:23:38 +00:00
|
|
|
ep->fifo_size = pdata->ep[i].fifo_size;
|
|
|
|
usb_ep_set_maxpacket_limit(&ep->ep, ep->fifo_size);
|
2013-05-03 12:22:57 +00:00
|
|
|
ep->udc = udc;
|
|
|
|
INIT_LIST_HEAD(&ep->queue);
|
|
|
|
ep->nr_banks = pdata->ep[i].nr_banks;
|
|
|
|
ep->index = pdata->ep[i].index;
|
|
|
|
ep->can_dma = pdata->ep[i].can_dma;
|
|
|
|
ep->can_isoc = pdata->ep[i].can_isoc;
|
|
|
|
|
2015-07-31 14:00:48 +00:00
|
|
|
if (i == 0) {
|
|
|
|
ep->ep.caps.type_control = true;
|
|
|
|
} else {
|
|
|
|
ep->ep.caps.type_iso = ep->can_isoc;
|
|
|
|
ep->ep.caps.type_bulk = true;
|
|
|
|
ep->ep.caps.type_int = true;
|
|
|
|
}
|
|
|
|
|
|
|
|
ep->ep.caps.dir_in = true;
|
|
|
|
ep->ep.caps.dir_out = true;
|
|
|
|
|
2013-05-03 12:22:57 +00:00
|
|
|
if (i)
|
|
|
|
list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list);
|
|
|
|
}
|
|
|
|
|
|
|
|
return eps;
|
|
|
|
}
|
|
|
|
|
2014-05-18 07:19:02 +00:00
|
|
|
static int usba_udc_probe(struct platform_device *pdev)
|
2013-05-03 12:22:57 +00:00
|
|
|
{
|
2007-10-10 09:29:43 +00:00
|
|
|
struct resource *regs, *fifo;
|
|
|
|
struct clk *pclk, *hclk;
|
2013-05-20 14:46:02 +00:00
|
|
|
struct usba_udc *udc;
|
2007-10-10 09:29:43 +00:00
|
|
|
int irq, ret, i;
|
|
|
|
|
2013-05-20 14:46:02 +00:00
|
|
|
udc = devm_kzalloc(&pdev->dev, sizeof(*udc), GFP_KERNEL);
|
|
|
|
if (!udc)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
udc->gadget = usba_gadget_template;
|
|
|
|
INIT_LIST_HEAD(&udc->gadget.ep_list);
|
|
|
|
|
2007-10-10 09:29:43 +00:00
|
|
|
regs = platform_get_resource(pdev, IORESOURCE_MEM, CTRL_IOMEM_ID);
|
|
|
|
fifo = platform_get_resource(pdev, IORESOURCE_MEM, FIFO_IOMEM_ID);
|
2013-05-03 12:22:57 +00:00
|
|
|
if (!regs || !fifo)
|
2007-10-10 09:29:43 +00:00
|
|
|
return -ENXIO;
|
|
|
|
|
|
|
|
irq = platform_get_irq(pdev, 0);
|
|
|
|
if (irq < 0)
|
|
|
|
return irq;
|
|
|
|
|
2013-12-16 06:13:31 +00:00
|
|
|
pclk = devm_clk_get(&pdev->dev, "pclk");
|
2007-10-10 09:29:43 +00:00
|
|
|
if (IS_ERR(pclk))
|
|
|
|
return PTR_ERR(pclk);
|
2013-12-16 06:13:31 +00:00
|
|
|
hclk = devm_clk_get(&pdev->dev, "hclk");
|
|
|
|
if (IS_ERR(hclk))
|
|
|
|
return PTR_ERR(hclk);
|
2007-10-10 09:29:43 +00:00
|
|
|
|
2008-05-11 05:46:38 +00:00
|
|
|
spin_lock_init(&udc->lock);
|
2015-02-12 17:54:06 +00:00
|
|
|
mutex_init(&udc->vbus_mutex);
|
2007-10-10 09:29:43 +00:00
|
|
|
udc->pdev = pdev;
|
|
|
|
udc->pclk = pclk;
|
|
|
|
udc->hclk = hclk;
|
2009-03-24 14:45:20 +00:00
|
|
|
udc->vbus_pin = -ENODEV;
|
2007-10-10 09:29:43 +00:00
|
|
|
|
|
|
|
ret = -ENOMEM;
|
2013-12-16 06:13:31 +00:00
|
|
|
udc->regs = devm_ioremap(&pdev->dev, regs->start, resource_size(regs));
|
2007-10-10 09:29:43 +00:00
|
|
|
if (!udc->regs) {
|
|
|
|
dev_err(&pdev->dev, "Unable to map I/O memory, aborting.\n");
|
2013-12-16 06:13:31 +00:00
|
|
|
return ret;
|
2007-10-10 09:29:43 +00:00
|
|
|
}
|
|
|
|
dev_info(&pdev->dev, "MMIO registers at 0x%08lx mapped at %p\n",
|
|
|
|
(unsigned long)regs->start, udc->regs);
|
2013-12-16 06:13:31 +00:00
|
|
|
udc->fifo = devm_ioremap(&pdev->dev, fifo->start, resource_size(fifo));
|
2007-10-10 09:29:43 +00:00
|
|
|
if (!udc->fifo) {
|
|
|
|
dev_err(&pdev->dev, "Unable to map FIFO, aborting.\n");
|
2013-12-16 06:13:31 +00:00
|
|
|
return ret;
|
2007-10-10 09:29:43 +00:00
|
|
|
}
|
|
|
|
dev_info(&pdev->dev, "FIFO at 0x%08lx mapped at %p\n",
|
|
|
|
(unsigned long)fifo->start, udc->fifo);
|
|
|
|
|
|
|
|
platform_set_drvdata(pdev, udc);
|
|
|
|
|
|
|
|
/* Make sure we start from a clean slate */
|
2013-07-18 07:43:08 +00:00
|
|
|
ret = clk_prepare_enable(pclk);
|
|
|
|
if (ret) {
|
|
|
|
dev_err(&pdev->dev, "Unable to enable pclk, aborting.\n");
|
2013-12-16 06:13:31 +00:00
|
|
|
return ret;
|
2013-07-18 07:43:08 +00:00
|
|
|
}
|
2015-01-06 13:46:58 +00:00
|
|
|
|
2008-04-05 20:25:47 +00:00
|
|
|
usba_writel(udc, CTRL, USBA_DISABLE_MASK);
|
2013-07-18 07:43:08 +00:00
|
|
|
clk_disable_unprepare(pclk);
|
2007-10-10 09:29:43 +00:00
|
|
|
|
2013-05-03 12:22:57 +00:00
|
|
|
if (pdev->dev.of_node)
|
|
|
|
udc->usba_ep = atmel_udc_of_init(pdev, udc);
|
|
|
|
else
|
|
|
|
udc->usba_ep = usba_udc_pdata(pdev, udc);
|
2007-10-10 09:29:43 +00:00
|
|
|
|
2015-01-06 13:46:58 +00:00
|
|
|
toggle_bias(udc, 0);
|
|
|
|
|
2013-12-16 06:13:31 +00:00
|
|
|
if (IS_ERR(udc->usba_ep))
|
|
|
|
return PTR_ERR(udc->usba_ep);
|
2007-10-10 09:29:43 +00:00
|
|
|
|
2013-12-16 06:13:31 +00:00
|
|
|
ret = devm_request_irq(&pdev->dev, irq, usba_udc_irq, 0,
|
|
|
|
"atmel_usba_udc", udc);
|
2007-10-10 09:29:43 +00:00
|
|
|
if (ret) {
|
|
|
|
dev_err(&pdev->dev, "Cannot request irq %d (error %d)\n",
|
|
|
|
irq, ret);
|
2013-12-16 06:13:31 +00:00
|
|
|
return ret;
|
2007-10-10 09:29:43 +00:00
|
|
|
}
|
|
|
|
udc->irq = irq;
|
|
|
|
|
2013-05-03 12:22:57 +00:00
|
|
|
if (gpio_is_valid(udc->vbus_pin)) {
|
|
|
|
if (!devm_gpio_request(&pdev->dev, udc->vbus_pin, "atmel_usba_udc")) {
|
2015-02-12 17:54:05 +00:00
|
|
|
irq_set_status_flags(gpio_to_irq(udc->vbus_pin),
|
|
|
|
IRQ_NOAUTOEN);
|
2015-02-12 17:54:06 +00:00
|
|
|
ret = devm_request_threaded_irq(&pdev->dev,
|
|
|
|
gpio_to_irq(udc->vbus_pin), NULL,
|
|
|
|
usba_vbus_irq_thread, IRQF_ONESHOT,
|
2007-10-10 09:29:43 +00:00
|
|
|
"atmel_usba_udc", udc);
|
|
|
|
if (ret) {
|
2009-03-24 14:45:20 +00:00
|
|
|
udc->vbus_pin = -ENODEV;
|
2007-10-10 09:29:43 +00:00
|
|
|
dev_warn(&udc->pdev->dev,
|
|
|
|
"failed to request vbus irq; "
|
|
|
|
"assuming always on\n");
|
|
|
|
}
|
2010-09-20 16:31:07 +00:00
|
|
|
} else {
|
|
|
|
/* gpio_request fail so use -EINVAL for gpio_is_valid */
|
2010-11-16 10:51:32 +00:00
|
|
|
udc->vbus_pin = -EINVAL;
|
2007-10-10 09:29:43 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2011-06-28 13:33:47 +00:00
|
|
|
ret = usb_add_gadget_udc(&pdev->dev, &udc->gadget);
|
|
|
|
if (ret)
|
2013-12-16 06:13:31 +00:00
|
|
|
return ret;
|
2015-02-12 17:54:07 +00:00
|
|
|
device_init_wakeup(&pdev->dev, 1);
|
2011-06-28 13:33:47 +00:00
|
|
|
|
2007-10-10 09:29:43 +00:00
|
|
|
usba_init_debugfs(udc);
|
2013-05-03 12:22:57 +00:00
|
|
|
for (i = 1; i < udc->num_ep; i++)
|
|
|
|
usba_ep_init_debugfs(udc, &udc->usba_ep[i]);
|
2007-10-10 09:29:43 +00:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2015-04-10 22:14:21 +00:00
|
|
|
static int usba_udc_remove(struct platform_device *pdev)
|
2007-10-10 09:29:43 +00:00
|
|
|
{
|
|
|
|
struct usba_udc *udc;
|
|
|
|
int i;
|
|
|
|
|
|
|
|
udc = platform_get_drvdata(pdev);
|
|
|
|
|
2015-02-12 17:54:07 +00:00
|
|
|
device_init_wakeup(&pdev->dev, 0);
|
2011-06-28 13:33:47 +00:00
|
|
|
usb_del_gadget_udc(&udc->gadget);
|
|
|
|
|
2013-05-03 12:22:57 +00:00
|
|
|
for (i = 1; i < udc->num_ep; i++)
|
2013-05-20 14:36:23 +00:00
|
|
|
usba_ep_cleanup_debugfs(&udc->usba_ep[i]);
|
2007-10-10 09:29:43 +00:00
|
|
|
usba_cleanup_debugfs(udc);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2015-05-27 17:29:18 +00:00
|
|
|
#ifdef CONFIG_PM_SLEEP
|
2015-02-12 17:54:07 +00:00
|
|
|
static int usba_udc_suspend(struct device *dev)
|
|
|
|
{
|
|
|
|
struct usba_udc *udc = dev_get_drvdata(dev);
|
|
|
|
|
|
|
|
/* Not started */
|
|
|
|
if (!udc->driver)
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
mutex_lock(&udc->vbus_mutex);
|
|
|
|
|
|
|
|
if (!device_may_wakeup(dev)) {
|
|
|
|
usba_stop(udc);
|
|
|
|
goto out;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Device may wake up. We stay clocked if we failed
|
|
|
|
* to request vbus irq, assuming always on.
|
|
|
|
*/
|
|
|
|
if (gpio_is_valid(udc->vbus_pin)) {
|
|
|
|
usba_stop(udc);
|
|
|
|
enable_irq_wake(gpio_to_irq(udc->vbus_pin));
|
|
|
|
}
|
|
|
|
|
|
|
|
out:
|
|
|
|
mutex_unlock(&udc->vbus_mutex);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int usba_udc_resume(struct device *dev)
|
|
|
|
{
|
|
|
|
struct usba_udc *udc = dev_get_drvdata(dev);
|
|
|
|
|
|
|
|
/* Not started */
|
|
|
|
if (!udc->driver)
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
if (device_may_wakeup(dev) && gpio_is_valid(udc->vbus_pin))
|
|
|
|
disable_irq_wake(gpio_to_irq(udc->vbus_pin));
|
|
|
|
|
|
|
|
/* If Vbus is present, enable the controller and wait for reset */
|
|
|
|
mutex_lock(&udc->vbus_mutex);
|
|
|
|
udc->vbus_prev = vbus_is_present(udc);
|
|
|
|
if (udc->vbus_prev)
|
|
|
|
usba_start(udc);
|
|
|
|
mutex_unlock(&udc->vbus_mutex);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
static SIMPLE_DEV_PM_OPS(usba_udc_pm_ops, usba_udc_suspend, usba_udc_resume);
|
|
|
|
|
2007-10-10 09:29:43 +00:00
|
|
|
static struct platform_driver udc_driver = {
|
2015-04-10 22:14:21 +00:00
|
|
|
.remove = usba_udc_remove,
|
2007-10-10 09:29:43 +00:00
|
|
|
.driver = {
|
|
|
|
.name = "atmel_usba_udc",
|
2015-02-12 17:54:07 +00:00
|
|
|
.pm = &usba_udc_pm_ops,
|
2013-05-03 12:22:57 +00:00
|
|
|
.of_match_table = of_match_ptr(atmel_udc_dt_ids),
|
2007-10-10 09:29:43 +00:00
|
|
|
},
|
|
|
|
};
|
|
|
|
|
2013-01-09 11:15:28 +00:00
|
|
|
module_platform_driver_probe(udc_driver, usba_udc_probe);
|
2007-10-10 09:29:43 +00:00
|
|
|
|
|
|
|
MODULE_DESCRIPTION("Atmel USBA UDC driver");
|
2011-05-18 14:49:24 +00:00
|
|
|
MODULE_AUTHOR("Haavard Skinnemoen (Atmel)");
|
2007-10-10 09:29:43 +00:00
|
|
|
MODULE_LICENSE("GPL");
|
2008-04-11 04:29:21 +00:00
|
|
|
MODULE_ALIAS("platform:atmel_usba_udc");
|