2014-10-08 08:55:02 +00:00
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/*
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* Copyright 2014 IBM Corp.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#include <linux/spinlock.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/device.h>
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#include <linux/mutex.h>
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#include <linux/init.h>
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#include <linux/list.h>
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#include <linux/mm.h>
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#include <linux/of.h>
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#include <linux/slab.h>
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#include <linux/idr.h>
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#include <linux/pci.h>
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#include <asm/cputable.h>
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2015-05-27 06:07:16 +00:00
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#include <misc/cxl-base.h>
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2014-10-08 08:55:02 +00:00
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#include "cxl.h"
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2015-01-09 09:34:36 +00:00
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#include "trace.h"
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2014-10-08 08:55:02 +00:00
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static DEFINE_SPINLOCK(adapter_idr_lock);
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static DEFINE_IDR(cxl_adapter_idr);
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uint cxl_verbose;
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module_param_named(verbose, cxl_verbose, uint, 0600);
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MODULE_PARM_DESC(verbose, "Enable verbose dmesg output");
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static inline void _cxl_slbia(struct cxl_context *ctx, struct mm_struct *mm)
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{
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struct task_struct *task;
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unsigned long flags;
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if (!(task = get_pid_task(ctx->pid, PIDTYPE_PID))) {
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pr_devel("%s unable to get task %i\n",
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__func__, pid_nr(ctx->pid));
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return;
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}
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if (task->mm != mm)
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goto out_put;
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pr_devel("%s matched mm - card: %i afu: %i pe: %i\n", __func__,
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ctx->afu->adapter->adapter_num, ctx->afu->slice, ctx->pe);
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spin_lock_irqsave(&ctx->sste_lock, flags);
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2015-01-09 09:34:36 +00:00
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trace_cxl_slbia(ctx);
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2014-10-08 08:55:02 +00:00
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memset(ctx->sstp, 0, ctx->sst_size);
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spin_unlock_irqrestore(&ctx->sste_lock, flags);
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mb();
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cxl_afu_slbia(ctx->afu);
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out_put:
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put_task_struct(task);
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}
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static inline void cxl_slbia_core(struct mm_struct *mm)
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{
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struct cxl *adapter;
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struct cxl_afu *afu;
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struct cxl_context *ctx;
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int card, slice, id;
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pr_devel("%s called\n", __func__);
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spin_lock(&adapter_idr_lock);
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idr_for_each_entry(&cxl_adapter_idr, adapter, card) {
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/* XXX: Make this lookup faster with link from mm to ctx */
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spin_lock(&adapter->afu_list_lock);
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for (slice = 0; slice < adapter->slices; slice++) {
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afu = adapter->afu[slice];
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if (!afu->enabled)
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continue;
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rcu_read_lock();
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idr_for_each_entry(&afu->contexts_idr, ctx, id)
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_cxl_slbia(ctx, mm);
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rcu_read_unlock();
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}
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spin_unlock(&adapter->afu_list_lock);
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}
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spin_unlock(&adapter_idr_lock);
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}
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static struct cxl_calls cxl_calls = {
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.cxl_slbia = cxl_slbia_core,
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.owner = THIS_MODULE,
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};
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int cxl_alloc_sst(struct cxl_context *ctx)
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{
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unsigned long vsid;
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u64 ea_mask, size, sstp0, sstp1;
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sstp0 = 0;
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sstp1 = 0;
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ctx->sst_size = PAGE_SIZE;
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ctx->sst_lru = 0;
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ctx->sstp = (struct cxl_sste *)get_zeroed_page(GFP_KERNEL);
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if (!ctx->sstp) {
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pr_err("cxl_alloc_sst: Unable to allocate segment table\n");
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return -ENOMEM;
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}
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pr_devel("SSTP allocated at 0x%p\n", ctx->sstp);
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vsid = get_kernel_vsid((u64)ctx->sstp, mmu_kernel_ssize) << 12;
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sstp0 |= (u64)mmu_kernel_ssize << CXL_SSTP0_An_B_SHIFT;
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sstp0 |= (SLB_VSID_KERNEL | mmu_psize_defs[mmu_linear_psize].sllp) << 50;
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size = (((u64)ctx->sst_size >> 8) - 1) << CXL_SSTP0_An_SegTableSize_SHIFT;
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if (unlikely(size & ~CXL_SSTP0_An_SegTableSize_MASK)) {
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WARN(1, "Impossible segment table size\n");
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return -EINVAL;
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}
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sstp0 |= size;
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if (mmu_kernel_ssize == MMU_SEGSIZE_256M)
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ea_mask = 0xfffff00ULL;
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else
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ea_mask = 0xffffffff00ULL;
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sstp0 |= vsid >> (50-14); /* Top 14 bits of VSID */
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sstp1 |= (vsid << (64-(50-14))) & ~ea_mask;
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sstp1 |= (u64)ctx->sstp & ea_mask;
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sstp1 |= CXL_SSTP1_An_V;
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pr_devel("Looked up %#llx: slbfee. %#llx (ssize: %x, vsid: %#lx), copied to SSTP0: %#llx, SSTP1: %#llx\n",
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(u64)ctx->sstp, (u64)ctx->sstp & ESID_MASK, mmu_kernel_ssize, vsid, sstp0, sstp1);
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/* Store calculated sstp hardware points for use later */
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ctx->sstp0 = sstp0;
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ctx->sstp1 = sstp1;
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return 0;
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}
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/* Find a CXL adapter by it's number and increase it's refcount */
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struct cxl *get_cxl_adapter(int num)
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{
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struct cxl *adapter;
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spin_lock(&adapter_idr_lock);
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if ((adapter = idr_find(&cxl_adapter_idr, num)))
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get_device(&adapter->dev);
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spin_unlock(&adapter_idr_lock);
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return adapter;
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}
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int cxl_alloc_adapter_nr(struct cxl *adapter)
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{
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int i;
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idr_preload(GFP_KERNEL);
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spin_lock(&adapter_idr_lock);
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i = idr_alloc(&cxl_adapter_idr, adapter, 0, 0, GFP_NOWAIT);
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spin_unlock(&adapter_idr_lock);
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idr_preload_end();
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if (i < 0)
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return i;
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adapter->adapter_num = i;
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return 0;
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}
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void cxl_remove_adapter_nr(struct cxl *adapter)
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{
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idr_remove(&cxl_adapter_idr, adapter->adapter_num);
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}
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int cxl_afu_select_best_mode(struct cxl_afu *afu)
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{
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if (afu->modes_supported & CXL_MODE_DIRECTED)
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return cxl_afu_activate_mode(afu, CXL_MODE_DIRECTED);
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if (afu->modes_supported & CXL_MODE_DEDICATED)
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return cxl_afu_activate_mode(afu, CXL_MODE_DEDICATED);
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dev_warn(&afu->dev, "No supported programming modes available\n");
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/* We don't fail this so the user can inspect sysfs */
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return 0;
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}
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static int __init init_cxl(void)
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{
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int rc = 0;
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if (!cpu_has_feature(CPU_FTR_HVMODE))
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return -EPERM;
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if ((rc = cxl_file_init()))
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return rc;
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cxl_debugfs_init();
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if ((rc = register_cxl_calls(&cxl_calls)))
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goto err;
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if ((rc = pci_register_driver(&cxl_pci_driver)))
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goto err1;
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return 0;
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err1:
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unregister_cxl_calls(&cxl_calls);
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err:
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cxl_debugfs_exit();
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cxl_file_exit();
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return rc;
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}
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static void exit_cxl(void)
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{
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pci_unregister_driver(&cxl_pci_driver);
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cxl_debugfs_exit();
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cxl_file_exit();
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unregister_cxl_calls(&cxl_calls);
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}
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module_init(init_cxl);
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module_exit(exit_cxl);
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MODULE_DESCRIPTION("IBM Coherent Accelerator");
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MODULE_AUTHOR("Ian Munsie <imunsie@au1.ibm.com>");
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MODULE_LICENSE("GPL");
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