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147 lines
3.4 KiB
C
147 lines
3.4 KiB
C
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/*
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This files contains card eeprom (93c46 or 93c56) programming routines,
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memory is addressed by 16 bits words.
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This is part of rtl8180 OpenSource driver.
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Copyright (C) Andrea Merello 2004 <andreamrl@tiscali.it>
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Released under the terms of GPL (General Public Licence)
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Parts of this driver are based on the GPL part of the
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official realtek driver.
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Parts of this driver are based on the rtl8180 driver skeleton
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from Patric Schenke & Andres Salomon.
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Parts of this driver are based on the Intel Pro Wireless 2100 GPL driver.
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We want to tanks the Authors of those projects and the Ndiswrapper
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project Authors.
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*/
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#include "r8180_93cx6.h"
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void eprom_cs(struct net_device *dev, short bit)
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{
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if(bit)
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write_nic_byte_E(dev, EPROM_CMD,
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(1<<EPROM_CS_SHIFT) | \
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read_nic_byte_E(dev, EPROM_CMD)); //enable EPROM
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else
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write_nic_byte_E(dev, EPROM_CMD, read_nic_byte_E(dev, EPROM_CMD)\
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&~(1<<EPROM_CS_SHIFT)); //disable EPROM
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force_pci_posting(dev);
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udelay(EPROM_DELAY);
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}
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void eprom_ck_cycle(struct net_device *dev)
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{
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write_nic_byte_E(dev, EPROM_CMD,
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(1<<EPROM_CK_SHIFT) | read_nic_byte_E(dev,EPROM_CMD));
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force_pci_posting(dev);
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udelay(EPROM_DELAY);
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write_nic_byte_E(dev, EPROM_CMD,
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read_nic_byte_E(dev, EPROM_CMD) &~ (1<<EPROM_CK_SHIFT));
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force_pci_posting(dev);
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udelay(EPROM_DELAY);
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}
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void eprom_w(struct net_device *dev,short bit)
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{
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if(bit)
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write_nic_byte_E(dev, EPROM_CMD, (1<<EPROM_W_SHIFT) | \
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read_nic_byte_E(dev,EPROM_CMD));
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else
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write_nic_byte_E(dev, EPROM_CMD, read_nic_byte_E(dev,EPROM_CMD)\
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&~(1<<EPROM_W_SHIFT));
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force_pci_posting(dev);
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udelay(EPROM_DELAY);
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}
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short eprom_r(struct net_device *dev)
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{
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short bit;
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bit=(read_nic_byte_E(dev, EPROM_CMD) & (1<<EPROM_R_SHIFT) );
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udelay(EPROM_DELAY);
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if(bit) return 1;
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return 0;
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}
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void eprom_send_bits_string(struct net_device *dev, short b[], int len)
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{
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int i;
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for(i=0; i<len; i++){
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eprom_w(dev, b[i]);
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eprom_ck_cycle(dev);
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}
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}
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u32 eprom_read(struct net_device *dev, u32 addr)
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{
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struct r8192_priv *priv = ieee80211_priv(dev);
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short read_cmd[]={1,1,0};
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short addr_str[8];
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int i;
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int addr_len;
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u32 ret;
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ret=0;
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//enable EPROM programming
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write_nic_byte_E(dev, EPROM_CMD,
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(EPROM_CMD_PROGRAM<<EPROM_CMD_OPERATING_MODE_SHIFT));
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force_pci_posting(dev);
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udelay(EPROM_DELAY);
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if (priv->epromtype==EPROM_93c56){
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addr_str[7]=addr & 1;
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addr_str[6]=addr & (1<<1);
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addr_str[5]=addr & (1<<2);
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addr_str[4]=addr & (1<<3);
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addr_str[3]=addr & (1<<4);
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addr_str[2]=addr & (1<<5);
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addr_str[1]=addr & (1<<6);
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addr_str[0]=addr & (1<<7);
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addr_len=8;
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}else{
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addr_str[5]=addr & 1;
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addr_str[4]=addr & (1<<1);
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addr_str[3]=addr & (1<<2);
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addr_str[2]=addr & (1<<3);
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addr_str[1]=addr & (1<<4);
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addr_str[0]=addr & (1<<5);
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addr_len=6;
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}
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eprom_cs(dev, 1);
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eprom_ck_cycle(dev);
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eprom_send_bits_string(dev, read_cmd, 3);
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eprom_send_bits_string(dev, addr_str, addr_len);
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//keep chip pin D to low state while reading.
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//I'm unsure if it is necessary, but anyway shouldn't hurt
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eprom_w(dev, 0);
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for(i=0;i<16;i++){
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//eeprom needs a clk cycle between writing opcode&adr
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//and reading data. (eeprom outs a dummy 0)
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eprom_ck_cycle(dev);
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ret |= (eprom_r(dev)<<(15-i));
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}
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eprom_cs(dev, 0);
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eprom_ck_cycle(dev);
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//disable EPROM programming
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write_nic_byte_E(dev, EPROM_CMD,
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(EPROM_CMD_NORMAL<<EPROM_CMD_OPERATING_MODE_SHIFT));
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return ret;
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}
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