2012-11-07 17:30:29 +00:00
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/*
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* CLPS711X SPI bus driver
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*
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2014-01-10 13:02:05 +00:00
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* Copyright (C) 2012-2014 Alexander Shiyan <shc_work@mail.ru>
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2012-11-07 17:30:29 +00:00
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#include <linux/io.h>
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#include <linux/clk.h>
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#include <linux/init.h>
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#include <linux/gpio.h>
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#include <linux/delay.h>
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#include <linux/module.h>
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#include <linux/interrupt.h>
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#include <linux/platform_device.h>
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#include <linux/spi/spi.h>
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#include <linux/platform_data/spi-clps711x.h>
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#include <mach/hardware.h>
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#define DRIVER_NAME "spi-clps711x"
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struct spi_clps711x_data {
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struct clk *spi_clk;
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u32 max_speed_hz;
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u8 *tx_buf;
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u8 *rx_buf;
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2014-02-02 06:59:49 +00:00
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unsigned int bpw;
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2012-11-07 17:30:29 +00:00
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int len;
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};
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static int spi_clps711x_setup(struct spi_device *spi)
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{
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/* We are expect that SPI-device is not selected */
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2014-02-02 06:59:50 +00:00
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gpio_direction_output(spi->cs_gpio, !(spi->mode & SPI_CS_HIGH));
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2012-11-07 17:30:29 +00:00
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return 0;
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}
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2014-02-02 06:59:49 +00:00
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static void spi_clps711x_setup_xfer(struct spi_device *spi,
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struct spi_transfer *xfer)
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2012-11-07 17:30:29 +00:00
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{
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struct spi_clps711x_data *hw = spi_master_get_devdata(spi->master);
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/* Setup SPI frequency divider */
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2014-03-02 15:24:18 +00:00
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if (!xfer->speed_hz || (xfer->speed_hz >= hw->max_speed_hz))
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2012-11-07 17:30:29 +00:00
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clps_writel((clps_readl(SYSCON1) & ~SYSCON1_ADCKSEL_MASK) |
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SYSCON1_ADCKSEL(3), SYSCON1);
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2014-03-02 15:24:18 +00:00
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else if (xfer->speed_hz >= (hw->max_speed_hz / 2))
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2012-11-07 17:30:29 +00:00
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clps_writel((clps_readl(SYSCON1) & ~SYSCON1_ADCKSEL_MASK) |
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SYSCON1_ADCKSEL(2), SYSCON1);
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2014-03-02 15:24:18 +00:00
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else if (xfer->speed_hz >= (hw->max_speed_hz / 8))
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2012-11-07 17:30:29 +00:00
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clps_writel((clps_readl(SYSCON1) & ~SYSCON1_ADCKSEL_MASK) |
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SYSCON1_ADCKSEL(1), SYSCON1);
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else
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clps_writel((clps_readl(SYSCON1) & ~SYSCON1_ADCKSEL_MASK) |
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SYSCON1_ADCKSEL(0), SYSCON1);
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}
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2014-02-18 09:15:54 +00:00
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static int spi_clps711x_prepare_message(struct spi_master *master,
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struct spi_message *msg)
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2012-11-07 17:30:29 +00:00
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{
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2014-02-02 06:59:49 +00:00
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struct spi_device *spi = msg->spi;
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2012-11-07 17:30:29 +00:00
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2014-02-18 09:15:54 +00:00
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/* Setup edge for transfer */
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if (spi->mode & SPI_CPHA)
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clps_writew(clps_readw(SYSCON3) | SYSCON3_ADCCKNSEN, SYSCON3);
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else
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clps_writew(clps_readw(SYSCON3) & ~SYSCON3_ADCCKNSEN, SYSCON3);
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2012-11-07 17:30:29 +00:00
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2014-02-18 09:15:54 +00:00
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return 0;
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}
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2012-11-07 17:30:29 +00:00
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2014-02-18 09:15:54 +00:00
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static int spi_clps711x_transfer_one(struct spi_master *master,
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struct spi_device *spi,
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struct spi_transfer *xfer)
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{
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struct spi_clps711x_data *hw = spi_master_get_devdata(master);
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u8 data;
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2012-11-07 17:30:29 +00:00
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2014-02-18 09:15:54 +00:00
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spi_clps711x_setup_xfer(spi, xfer);
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2012-11-07 17:30:29 +00:00
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2014-02-18 09:15:54 +00:00
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hw->len = xfer->len;
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2014-03-02 15:24:18 +00:00
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hw->bpw = xfer->bits_per_word;
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2014-02-18 09:15:54 +00:00
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hw->tx_buf = (u8 *)xfer->tx_buf;
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hw->rx_buf = (u8 *)xfer->rx_buf;
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2012-11-07 17:30:29 +00:00
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2014-02-18 09:15:54 +00:00
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/* Initiate transfer */
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data = hw->tx_buf ? *hw->tx_buf++ : 0;
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clps_writel(data | SYNCIO_FRMLEN(hw->bpw) | SYNCIO_TXFRMEN, SYNCIO);
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return 1;
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2012-11-07 17:30:29 +00:00
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}
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static irqreturn_t spi_clps711x_isr(int irq, void *dev_id)
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{
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2014-02-18 09:15:54 +00:00
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struct spi_master *master = dev_id;
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struct spi_clps711x_data *hw = spi_master_get_devdata(master);
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2014-02-02 06:59:48 +00:00
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u8 data;
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2012-11-07 17:30:29 +00:00
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/* Handle RX */
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data = clps_readb(SYNCIO);
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if (hw->rx_buf)
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2014-02-02 06:59:48 +00:00
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*hw->rx_buf++ = data;
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2012-11-07 17:30:29 +00:00
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/* Handle TX */
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2014-02-02 06:59:48 +00:00
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if (--hw->len > 0) {
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data = hw->tx_buf ? *hw->tx_buf++ : 0;
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2014-02-02 06:59:49 +00:00
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clps_writel(data | SYNCIO_FRMLEN(hw->bpw) | SYNCIO_TXFRMEN,
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SYNCIO);
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2012-11-07 17:30:29 +00:00
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} else
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2014-02-18 09:15:54 +00:00
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spi_finalize_current_transfer(master);
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2012-11-07 17:30:29 +00:00
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return IRQ_HANDLED;
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}
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2012-12-07 16:57:14 +00:00
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static int spi_clps711x_probe(struct platform_device *pdev)
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2012-11-07 17:30:29 +00:00
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{
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int i, ret;
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struct spi_master *master;
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struct spi_clps711x_data *hw;
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struct spi_clps711x_pdata *pdata = dev_get_platdata(&pdev->dev);
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if (!pdata) {
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dev_err(&pdev->dev, "No platform data supplied\n");
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return -EINVAL;
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}
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if (pdata->num_chipselect < 1) {
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dev_err(&pdev->dev, "At least one CS must be defined\n");
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return -EINVAL;
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}
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2014-02-02 06:59:50 +00:00
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master = spi_alloc_master(&pdev->dev, sizeof(*hw));
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if (!master)
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2012-11-07 17:30:29 +00:00
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return -ENOMEM;
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2014-02-02 06:59:50 +00:00
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master->cs_gpios = devm_kzalloc(&pdev->dev, sizeof(int) *
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pdata->num_chipselect, GFP_KERNEL);
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if (!master->cs_gpios) {
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ret = -ENOMEM;
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goto err_out;
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2012-11-07 17:30:29 +00:00
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}
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master->bus_num = pdev->id;
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master->mode_bits = SPI_CPHA | SPI_CS_HIGH;
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2014-02-02 06:59:49 +00:00
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master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 8);
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2012-11-07 17:30:29 +00:00
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master->num_chipselect = pdata->num_chipselect;
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master->setup = spi_clps711x_setup;
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2014-02-18 09:15:54 +00:00
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master->prepare_message = spi_clps711x_prepare_message;
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master->transfer_one = spi_clps711x_transfer_one;
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2012-11-07 17:30:29 +00:00
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hw = spi_master_get_devdata(master);
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for (i = 0; i < master->num_chipselect; i++) {
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2014-02-02 06:59:50 +00:00
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master->cs_gpios[i] = pdata->chipselect[i];
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2014-03-04 04:59:53 +00:00
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ret = devm_gpio_request(&pdev->dev, master->cs_gpios[i],
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DRIVER_NAME);
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if (ret) {
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2012-11-07 17:30:29 +00:00
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dev_err(&pdev->dev, "Can't get CS GPIO %i\n", i);
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goto err_out;
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}
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}
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hw->spi_clk = devm_clk_get(&pdev->dev, "spi");
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if (IS_ERR(hw->spi_clk)) {
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dev_err(&pdev->dev, "Can't get clocks\n");
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ret = PTR_ERR(hw->spi_clk);
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goto err_out;
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}
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hw->max_speed_hz = clk_get_rate(hw->spi_clk);
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platform_set_drvdata(pdev, master);
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/* Disable extended mode due hardware problems */
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clps_writew(clps_readw(SYSCON3) & ~SYSCON3_ADCCON, SYSCON3);
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/* Clear possible pending interrupt */
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clps_readl(SYNCIO);
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ret = devm_request_irq(&pdev->dev, IRQ_SSEOTI, spi_clps711x_isr, 0,
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2014-02-18 09:15:54 +00:00
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dev_name(&pdev->dev), master);
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2012-11-07 17:30:29 +00:00
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if (ret) {
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dev_err(&pdev->dev, "Can't request IRQ\n");
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2013-09-27 10:02:53 +00:00
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goto err_out;
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2012-11-07 17:30:29 +00:00
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}
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2013-09-24 04:27:48 +00:00
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ret = devm_spi_register_master(&pdev->dev, master);
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2012-11-07 17:30:29 +00:00
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if (!ret) {
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dev_info(&pdev->dev,
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"SPI bus driver initialized. Master clock %u Hz\n",
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hw->max_speed_hz);
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return 0;
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}
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dev_err(&pdev->dev, "Failed to register master\n");
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err_out:
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spi_master_put(master);
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return ret;
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}
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static struct platform_driver clps711x_spi_driver = {
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.driver = {
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.name = DRIVER_NAME,
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.owner = THIS_MODULE,
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},
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.probe = spi_clps711x_probe,
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};
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module_platform_driver(clps711x_spi_driver);
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MODULE_LICENSE("GPL");
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MODULE_AUTHOR("Alexander Shiyan <shc_work@mail.ru>");
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MODULE_DESCRIPTION("CLPS711X SPI bus driver");
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2014-01-14 09:01:54 +00:00
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MODULE_ALIAS("platform:" DRIVER_NAME);
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