2013-07-07 14:25:49 +00:00
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/*
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2015-04-02 14:07:30 +00:00
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* Copyright (c) 2013-2015, Mellanox Technologies. All rights reserved.
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2013-07-07 14:25:49 +00:00
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*
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* This software is available to you under a choice of one of two
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* licenses. You may choose to be licensed under the terms of the GNU
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* General Public License (GPL) Version 2, available from the file
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* COPYING in the main directory of this source tree, or the
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* OpenIB.org BSD license below:
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*
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* Redistribution and use in source and binary forms, with or
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* without modification, are permitted provided that the following
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* conditions are met:
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*
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* - Redistributions of source code must retain the above
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* copyright notice, this list of conditions and the following
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* disclaimer.
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*
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* - Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials
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* provided with the distribution.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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#ifndef MLX5_IB_USER_H
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#define MLX5_IB_USER_H
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#include <linux/types.h>
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2016-01-14 17:12:57 +00:00
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#include "mlx5_ib.h"
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2013-07-07 14:25:49 +00:00
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enum {
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MLX5_QP_FLAG_SIGNATURE = 1 << 0,
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MLX5_QP_FLAG_SCATTER_CQE = 1 << 1,
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};
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enum {
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MLX5_SRQ_FLAG_SIGNATURE = 1 << 0,
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};
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2016-05-23 12:20:50 +00:00
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enum {
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MLX5_WQ_FLAG_SIGNATURE = 1 << 0,
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};
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2013-07-07 14:25:49 +00:00
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/* Increment this value if any changes that break userspace ABI
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* compatibility are made.
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*/
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#define MLX5_IB_UVERBS_ABI_VERSION 1
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/* Make sure that all structs defined in this file remain laid out so
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* that they pack the same way on 32-bit and 64-bit architectures (to
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* avoid incompatibility between 32-bit userspace and 64-bit kernels).
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* In particular do not use pointer types -- pass pointers in __u64
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* instead.
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*/
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struct mlx5_ib_alloc_ucontext_req {
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__u32 total_num_uuars;
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__u32 num_low_latency_uuars;
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};
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2014-01-30 11:49:48 +00:00
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struct mlx5_ib_alloc_ucontext_req_v2 {
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__u32 total_num_uuars;
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__u32 num_low_latency_uuars;
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__u32 flags;
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2015-12-15 18:30:12 +00:00
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__u32 comp_mask;
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2016-01-14 17:12:58 +00:00
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__u8 max_cqe_version;
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__u8 reserved0;
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__u16 reserved1;
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__u32 reserved2;
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2015-12-15 18:30:12 +00:00
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};
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enum mlx5_ib_alloc_ucontext_resp_mask {
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MLX5_IB_ALLOC_UCONTEXT_RESP_MASK_CORE_CLOCK_OFFSET = 1UL << 0,
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2014-01-30 11:49:48 +00:00
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};
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2013-07-07 14:25:49 +00:00
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struct mlx5_ib_alloc_ucontext_resp {
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__u32 qp_tab_size;
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__u32 bf_reg_size;
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__u32 tot_uuars;
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__u32 cache_line_size;
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__u16 max_sq_desc_sz;
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__u16 max_rq_desc_sz;
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__u32 max_send_wqebb;
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__u32 max_recv_wr;
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__u32 max_srq_recv_wr;
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__u16 num_ports;
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2015-12-15 18:30:12 +00:00
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__u16 reserved1;
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__u32 comp_mask;
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__u32 response_length;
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2016-01-14 17:12:58 +00:00
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__u8 cqe_version;
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__u8 reserved2;
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__u16 reserved3;
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2015-12-15 18:30:12 +00:00
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__u64 hca_core_clock_offset;
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2013-07-07 14:25:49 +00:00
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};
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struct mlx5_ib_alloc_pd_resp {
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__u32 pdn;
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};
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struct mlx5_ib_create_cq {
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__u64 buf_addr;
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__u64 db_addr;
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__u32 cqe_size;
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IB/mlx5: add missing padding at end of struct mlx5_ib_create_cq
The i386 ABI disagrees with most other ABIs regarding alignment of
data type larger than 4 bytes: on most ABIs a padding must be added at
end of the structures, while it is not required on i386.
So for most ABI struct mlx5_ib_create_cq get padded to be aligned on a
8 bytes multiple, while for i386, such padding is not added.
The tool pahole can be used to find such implicit padding:
$ pahole --anon_include \
--nested_anon_include \
--recursive \
--class_name mlx5_ib_create_cq \
drivers/infiniband/hw/mlx5/mlx5_ib.o
Then, structure layout can be compared between i386 and x86_64:
+++ obj-i386/drivers/infiniband/hw/mlx5/mlx5_ib.o.pahole.txt 2014-03-28 11:43:07.386413682 +0100
--- obj-x86_64/drivers/infiniband/hw/mlx5/mlx5_ib.o.pahole.txt 2014-03-27 13:06:17.788472721 +0100
@@ -34,9 +34,8 @@ struct mlx5_ib_create_cq {
__u64 db_addr; /* 8 8 */
__u32 cqe_size; /* 16 4 */
- /* size: 20, cachelines: 1, members: 3 */
- /* last cacheline: 20 bytes */
+ /* size: 24, cachelines: 1, members: 3 */
+ /* padding: 4 */
+ /* last cacheline: 24 bytes */
};
This ABI disagreement will make an x86_64 kernel try to read past the
buffer provided by an i386 binary.
When boundary check will be implemented, a x86_64 kernel will refuse
to read past the i386 userspace provided buffer and the uverb will
fail.
Anyway, if the structure lies in memory on a page boundary and next
page is not mapped, ib_copy_from_udata() will fail when trying to read
the 4 bytes of padding and the uverb will fail.
This patch makes create_cq_user() takes care of the input data size to
handle the case where no padding is provided.
This way, x86_64 kernel will be able to handle struct
mlx5_ib_create_cq as sent by unpatched and patched i386 libmlx5.
Link: http://marc.info/?i=cover.1399309513.git.ydroneaud@opteya.com
Cc: <stable@vger.kernel.org>
Fixes: e126ba97dba9e ("mlx5: Add driver for Mellanox Connect-IB adapter")
Signed-off-by: Yann Droneaud <ydroneaud@opteya.com>
Signed-off-by: Roland Dreier <roland@purestorage.com>
2014-05-05 17:33:21 +00:00
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__u32 reserved; /* explicit padding (optional on i386) */
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2013-07-07 14:25:49 +00:00
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};
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struct mlx5_ib_create_cq_resp {
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__u32 cqn;
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__u32 reserved;
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};
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struct mlx5_ib_resize_cq {
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__u64 buf_addr;
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2014-01-14 15:45:18 +00:00
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__u16 cqe_size;
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__u16 reserved0;
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__u32 reserved1;
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2013-07-07 14:25:49 +00:00
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};
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struct mlx5_ib_create_srq {
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__u64 buf_addr;
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__u64 db_addr;
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__u32 flags;
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2016-01-14 17:12:57 +00:00
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__u32 reserved0; /* explicit padding (optional on i386) */
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__u32 uidx;
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__u32 reserved1;
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2013-07-07 14:25:49 +00:00
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};
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struct mlx5_ib_create_srq_resp {
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__u32 srqn;
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__u32 reserved;
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};
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struct mlx5_ib_create_qp {
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__u64 buf_addr;
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__u64 db_addr;
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__u32 sq_wqe_count;
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__u32 rq_wqe_count;
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__u32 rq_wqe_shift;
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__u32 flags;
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2016-01-14 17:12:57 +00:00
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__u32 uidx;
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__u32 reserved0;
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2016-01-14 17:13:04 +00:00
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__u64 sq_buf_addr;
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2013-07-07 14:25:49 +00:00
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};
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struct mlx5_ib_create_qp_resp {
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__u32 uuar_index;
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};
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2016-01-14 17:12:57 +00:00
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2016-02-29 16:05:30 +00:00
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struct mlx5_ib_alloc_mw {
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__u32 comp_mask;
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__u8 num_klms;
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__u8 reserved1;
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__u16 reserved2;
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};
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2016-05-23 12:20:50 +00:00
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struct mlx5_ib_create_wq {
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__u64 buf_addr;
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__u64 db_addr;
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__u32 rq_wqe_count;
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__u32 rq_wqe_shift;
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__u32 user_index;
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__u32 flags;
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__u32 comp_mask;
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__u32 reserved;
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};
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struct mlx5_ib_create_wq_resp {
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__u32 response_length;
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__u32 reserved;
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};
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2016-05-23 12:20:53 +00:00
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struct mlx5_ib_create_rwq_ind_tbl_resp {
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__u32 response_length;
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__u32 reserved;
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};
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2016-05-23 12:20:50 +00:00
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struct mlx5_ib_modify_wq {
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__u32 comp_mask;
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__u32 reserved;
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};
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2016-01-14 17:12:57 +00:00
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static inline int get_qp_user_index(struct mlx5_ib_ucontext *ucontext,
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struct mlx5_ib_create_qp *ucmd,
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int inlen,
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u32 *user_index)
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{
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u8 cqe_version = ucontext->cqe_version;
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if (field_avail(struct mlx5_ib_create_qp, uidx, inlen) &&
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!cqe_version && (ucmd->uidx == MLX5_IB_DEFAULT_UIDX))
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return 0;
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if (!!(field_avail(struct mlx5_ib_create_qp, uidx, inlen) !=
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!!cqe_version))
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return -EINVAL;
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return verify_assign_uidx(cqe_version, ucmd->uidx, user_index);
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}
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static inline int get_srq_user_index(struct mlx5_ib_ucontext *ucontext,
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struct mlx5_ib_create_srq *ucmd,
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int inlen,
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u32 *user_index)
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{
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u8 cqe_version = ucontext->cqe_version;
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if (field_avail(struct mlx5_ib_create_srq, uidx, inlen) &&
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!cqe_version && (ucmd->uidx == MLX5_IB_DEFAULT_UIDX))
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return 0;
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if (!!(field_avail(struct mlx5_ib_create_srq, uidx, inlen) !=
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!!cqe_version))
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return -EINVAL;
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return verify_assign_uidx(cqe_version, ucmd->uidx, user_index);
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}
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2013-07-07 14:25:49 +00:00
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#endif /* MLX5_IB_USER_H */
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