2015-05-28 19:28:46 +00:00
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/*
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* Copyright (c) 2015, Mellanox Technologies. All rights reserved.
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*
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* This software is available to you under a choice of one of two
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* licenses. You may choose to be licensed under the terms of the GNU
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* General Public License (GPL) Version 2, available from the file
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* COPYING in the main directory of this source tree, or the
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* OpenIB.org BSD license below:
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*
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* Redistribution and use in source and binary forms, with or
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* without modification, are permitted provided that the following
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* conditions are met:
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*
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* - Redistributions of source code must retain the above
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* copyright notice, this list of conditions and the following
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* disclaimer.
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*
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* - Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials
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* provided with the distribution.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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#include "en.h"
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struct mlx5_cqe64 *mlx5e_get_cqe(struct mlx5e_cq *cq)
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{
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struct mlx5_cqwq *wq = &cq->wq;
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u32 ci = mlx5_cqwq_get_ci(wq);
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struct mlx5_cqe64 *cqe = mlx5_cqwq_get_wqe(wq, ci);
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int cqe_ownership_bit = cqe->op_own & MLX5_CQE_OWNER_MASK;
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int sw_ownership_val = mlx5_cqwq_get_wrap_cnt(wq) & 1;
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if (cqe_ownership_bit != sw_ownership_val)
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return NULL;
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/* ensure cqe content is read after cqe ownership bit */
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rmb();
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return cqe;
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}
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2016-04-20 19:02:14 +00:00
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static void mlx5e_poll_ico_cq(struct mlx5e_cq *cq)
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{
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struct mlx5_wq_cyc *wq;
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struct mlx5_cqe64 *cqe;
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struct mlx5e_sq *sq;
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u16 sqcc;
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cqe = mlx5e_get_cqe(cq);
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if (likely(!cqe))
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return;
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sq = container_of(cq, struct mlx5e_sq, cq);
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wq = &sq->wq;
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/* sq->cc must be updated only after mlx5_cqwq_update_db_record(),
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* otherwise a cq overrun may occur
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*/
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sqcc = sq->cc;
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do {
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u16 ci = be16_to_cpu(cqe->wqe_counter) & wq->sz_m1;
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struct mlx5e_ico_wqe_info *icowi = &sq->ico_wqe_info[ci];
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mlx5_cqwq_pop(&cq->wq);
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sqcc += icowi->num_wqebbs;
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if (unlikely((cqe->op_own >> 4) != MLX5_CQE_REQ)) {
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WARN_ONCE(true, "mlx5e: Bad OP in ICOSQ CQE: 0x%x\n",
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cqe->op_own);
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break;
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}
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switch (icowi->opcode) {
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case MLX5_OPCODE_NOP:
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break;
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2016-04-20 19:02:15 +00:00
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case MLX5_OPCODE_UMR:
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mlx5e_post_rx_fragmented_mpwqe(&sq->channel->rq);
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break;
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2016-04-20 19:02:14 +00:00
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default:
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WARN_ONCE(true,
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"mlx5e: Bad OPCODE in ICOSQ WQE info: 0x%x\n",
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icowi->opcode);
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}
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} while ((cqe = mlx5e_get_cqe(cq)));
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mlx5_cqwq_update_db_record(&cq->wq);
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/* ensure cq space is freed before enabling more cqes */
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wmb();
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sq->cc = sqcc;
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}
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2015-05-28 19:28:46 +00:00
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int mlx5e_napi_poll(struct napi_struct *napi, int budget)
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{
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struct mlx5e_channel *c = container_of(napi, struct mlx5e_channel,
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napi);
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bool busy = false;
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2015-11-18 14:30:56 +00:00
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int work_done;
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2015-05-28 19:28:46 +00:00
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int i;
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clear_bit(MLX5E_CHANNEL_NAPI_SCHED, &c->flags);
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for (i = 0; i < c->num_tc; i++)
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2016-03-11 08:44:17 +00:00
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busy |= mlx5e_poll_tx_cq(&c->sq[i].cq, budget);
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2015-05-28 19:28:46 +00:00
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2015-11-18 14:30:56 +00:00
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work_done = mlx5e_poll_rx_cq(&c->rq.cq, budget);
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busy |= work_done == budget;
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2016-04-20 19:02:14 +00:00
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mlx5e_poll_ico_cq(&c->icosq.cq);
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2015-06-23 14:14:20 +00:00
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busy |= mlx5e_post_rx_wqes(&c->rq);
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2015-05-28 19:28:46 +00:00
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if (busy)
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return budget;
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2015-11-18 14:30:56 +00:00
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napi_complete_done(napi, work_done);
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2015-05-28 19:28:46 +00:00
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/* avoid losing completion event during/after polling cqs */
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if (test_bit(MLX5E_CHANNEL_NAPI_SCHED, &c->flags)) {
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napi_schedule(napi);
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2015-11-18 14:30:56 +00:00
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return work_done;
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2015-05-28 19:28:46 +00:00
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}
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for (i = 0; i < c->num_tc; i++)
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mlx5e_cq_arm(&c->sq[i].cq);
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2016-06-23 14:02:41 +00:00
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if (test_bit(MLX5E_RQ_STATE_AM, &c->rq.state))
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mlx5e_rx_am(&c->rq);
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2015-05-28 19:28:46 +00:00
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mlx5e_cq_arm(&c->rq.cq);
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2016-04-20 19:02:14 +00:00
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mlx5e_cq_arm(&c->icosq.cq);
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2015-05-28 19:28:46 +00:00
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2015-11-18 14:30:56 +00:00
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return work_done;
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2015-05-28 19:28:46 +00:00
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}
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void mlx5e_completion_event(struct mlx5_core_cq *mcq)
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{
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struct mlx5e_cq *cq = container_of(mcq, struct mlx5e_cq, mcq);
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2016-06-23 14:02:41 +00:00
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cq->event_ctr++;
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2015-05-28 19:28:46 +00:00
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set_bit(MLX5E_CHANNEL_NAPI_SCHED, &cq->channel->flags);
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napi_schedule(cq->napi);
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}
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void mlx5e_cq_error_event(struct mlx5_core_cq *mcq, enum mlx5_event event)
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{
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struct mlx5e_cq *cq = container_of(mcq, struct mlx5e_cq, mcq);
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struct mlx5e_channel *c = cq->channel;
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struct mlx5e_priv *priv = c->priv;
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struct net_device *netdev = priv->netdev;
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netdev_err(netdev, "%s: cqn=0x%.6x event=0x%.2x\n",
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__func__, mcq->cqn, event);
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}
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