linux-stable/include/linux/platform_data/clk-davinci-pll.h

// SPDX-License-Identifier: GPL-2.0
/*
 * PLL clock driver for TI Davinci SoCs
 *
 * Copyright (C) 2018 David Lechner <david@lechnology.com>
 */

#ifndef __LINUX_PLATFORM_DATA_CLK_DAVINCI_PLL_H__
#define __LINUX_PLATFORM_DATA_CLK_DAVINCI_PLL_H__

#include <linux/regmap.h>

/**
 * davinci_pll_platform_data
 * @cfgchip: CFGCHIP syscon regmap
 */
struct davinci_pll_platform_data {
	struct regmap *cfgchip;
};

#endif /* __LINUX_PLATFORM_DATA_CLK_DAVINCI_PLL_H__ */
clk: davinci: New driver for davinci PLL clocks This adds a new driver for mach-davinci PLL clocks. This is porting the code from arch/arm/mach-davinci/clock.c to the common clock framework. Additionally, it adds device tree support for these clocks. The ifeq ($(CONFIG_COMMON_CLK), y) in the Makefile is needed to prevent compile errors until the clock code in arch/arm/mach-davinci is removed. Note: although there are similar clocks for TI Keystone we are not able to share the code for a few reasons. The keystone clocks are device tree only and use legacy one-node-per-clock bindings. Also the register layouts are a bit different, which would add even more if/else mess to the keystone clocks. And the keystone PLL driver doesn't support setting clock rates. Signed-off-by: David Lechner <david@lechnology.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org> 2018-03-16 02:52:18 +00:00			`// SPDX-License-Identifier: GPL-2.0`
			`/*`
			`* PLL clock driver for TI Davinci SoCs`
			`*`
			`* Copyright (C) 2018 David Lechner <david@lechnology.com>`
			`*/`

			`#ifndef __LINUX_PLATFORM_DATA_CLK_DAVINCI_PLL_H__`
			`#define __LINUX_PLATFORM_DATA_CLK_DAVINCI_PLL_H__`

			`#include <linux/regmap.h>`

			`/**`
			`* davinci_pll_platform_data`
			`* @cfgchip: CFGCHIP syscon regmap`
			`*/`
			`struct davinci_pll_platform_data {`
			`struct regmap *cfgchip;`
			`};`

			`#endif /* __LINUX_PLATFORM_DATA_CLK_DAVINCI_PLL_H__ */`