linux-stable/arch/mips/lantiq/xway/Makefile

obj-y := prom.o sysctrl.o clk.o dma.o gptu.o dcdc.o

obj-y += vmmc.o
MIPS: lantiq: Remove the arch/mips/lantiq/xway/reset.c implementation The RCU register are now access through separates drivers. remove the last pieces of the old implementation. The GPHY reset bits are now set by the GPHY driver which registers a reboot notifier. The reboot is triggered by a syscon-reboot driver and the MIPS specific parts are done by the generic MIPS implementation in arch/mips/kernel/reset.c. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Cc: john@phrozen.org Cc: robh@kernel.org Cc: andy.shevchenko@gmail.com Cc: p.zabel@pengutronix.de Cc: kishon@ti.com Cc: mark.rutland@arm.com Cc: linux-mips@linux-mips.org Cc: linux-mtd@lists.infradead.org Cc: linux-watchdog@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-spi@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/17131/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org> 2017-08-19 22:18:23 +00:00			`obj-y := prom.o sysctrl.o clk.o dma.o gptu.o dcdc.o`
MIPS: lantiq: adds GPHY firmware loader The internal GPHYs need a firmware blob to function properly. This patch adds the code needed to request the blob and load it to the PHY. Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4523 2012-10-22 05:52:50 +00:00
MIPS: lantiq: handle vmmc memory reservation The Lantiq SoCs have a 2nd mips core called "voice mips macro core (vmmc)" which is used to run the voice firmware. This driver allows us to register a chunk of memory that the voice driver can later use for the 2nd core. Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/8042/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org> 2013-03-13 09:04:01 +00:00			`obj-y += vmmc.o`