2019-06-04 08:11:33 +00:00
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// SPDX-License-Identifier: GPL-2.0-only
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2005-04-16 22:20:36 +00:00
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/*
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* linux/drivers/mtd/maps/pci.c
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*
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* Copyright (C) 2001 Russell King, All rights reserved.
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*
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* Generic PCI memory map driver. We support the following boards:
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* - Intel IQ80310 ATU.
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* - Intel EBSA285 (blank rom programming mode). Tested working 27/09/2001
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/pci.h>
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2005-10-30 23:03:48 +00:00
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#include <linux/slab.h>
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2005-04-16 22:20:36 +00:00
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/map.h>
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#include <linux/mtd/partitions.h>
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struct map_pci_info;
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struct mtd_pci_info {
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int (*init)(struct pci_dev *dev, struct map_pci_info *map);
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void (*exit)(struct pci_dev *dev, struct map_pci_info *map);
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unsigned long (*translate)(struct map_pci_info *map, unsigned long ofs);
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const char *map_name;
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};
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struct map_pci_info {
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struct map_info map;
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void __iomem *base;
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void (*exit)(struct pci_dev *dev, struct map_pci_info *map);
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unsigned long (*translate)(struct map_pci_info *map, unsigned long ofs);
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struct pci_dev *dev;
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2005-11-07 11:15:40 +00:00
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};
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2005-04-16 22:20:36 +00:00
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static map_word mtd_pci_read8(struct map_info *_map, unsigned long ofs)
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{
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struct map_pci_info *map = (struct map_pci_info *)_map;
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map_word val;
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val.x[0]= readb(map->base + map->translate(map, ofs));
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return val;
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}
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static map_word mtd_pci_read32(struct map_info *_map, unsigned long ofs)
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{
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struct map_pci_info *map = (struct map_pci_info *)_map;
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map_word val;
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val.x[0] = readl(map->base + map->translate(map, ofs));
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return val;
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}
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static void mtd_pci_copyfrom(struct map_info *_map, void *to, unsigned long from, ssize_t len)
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{
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struct map_pci_info *map = (struct map_pci_info *)_map;
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memcpy_fromio(to, map->base + map->translate(map, from), len);
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}
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static void mtd_pci_write8(struct map_info *_map, map_word val, unsigned long ofs)
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{
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struct map_pci_info *map = (struct map_pci_info *)_map;
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writeb(val.x[0], map->base + map->translate(map, ofs));
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}
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static void mtd_pci_write32(struct map_info *_map, map_word val, unsigned long ofs)
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{
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struct map_pci_info *map = (struct map_pci_info *)_map;
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writel(val.x[0], map->base + map->translate(map, ofs));
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}
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static void mtd_pci_copyto(struct map_info *_map, unsigned long to, const void *from, ssize_t len)
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{
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struct map_pci_info *map = (struct map_pci_info *)_map;
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memcpy_toio(map->base + map->translate(map, to), from, len);
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}
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2005-11-17 08:20:31 +00:00
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static const struct map_info mtd_pci_map = {
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2005-04-16 22:20:36 +00:00
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.phys = NO_XIP,
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.copy_from = mtd_pci_copyfrom,
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.copy_to = mtd_pci_copyto,
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};
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/*
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* Intel IOP80310 Flash driver
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*/
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static int
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intel_iq80310_init(struct pci_dev *dev, struct map_pci_info *map)
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{
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u32 win_base;
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map->map.bankwidth = 1;
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2021-01-08 09:23:00 +00:00
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map->map.read = mtd_pci_read8;
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map->map.write = mtd_pci_write8;
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2005-04-16 22:20:36 +00:00
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map->map.size = 0x00800000;
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2020-01-06 08:43:50 +00:00
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map->base = ioremap(pci_resource_start(dev, 0),
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2005-04-16 22:20:36 +00:00
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pci_resource_len(dev, 0));
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if (!map->base)
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return -ENOMEM;
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/*
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* We want to base the memory window at Xscale
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* bus address 0, not 0x1000.
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*/
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pci_read_config_dword(dev, 0x44, &win_base);
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pci_write_config_dword(dev, 0x44, 0);
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map->map.map_priv_2 = win_base;
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return 0;
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}
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static void
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intel_iq80310_exit(struct pci_dev *dev, struct map_pci_info *map)
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{
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if (map->base)
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iounmap(map->base);
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pci_write_config_dword(dev, 0x44, map->map.map_priv_2);
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}
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static unsigned long
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intel_iq80310_translate(struct map_pci_info *map, unsigned long ofs)
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{
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unsigned long page_addr = ofs & 0x00400000;
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/*
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* This mundges the flash location so we avoid
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* the first 80 bytes (they appear to read nonsense).
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*/
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if (page_addr) {
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writel(0x00000008, map->base + 0x1558);
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writel(0x00000000, map->base + 0x1550);
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} else {
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writel(0x00000007, map->base + 0x1558);
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writel(0x00800000, map->base + 0x1550);
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ofs += 0x00800000;
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}
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return ofs;
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}
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static struct mtd_pci_info intel_iq80310_info = {
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.init = intel_iq80310_init,
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.exit = intel_iq80310_exit,
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.translate = intel_iq80310_translate,
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.map_name = "cfi_probe",
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};
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/*
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* Intel DC21285 driver
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*/
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static int
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intel_dc21285_init(struct pci_dev *dev, struct map_pci_info *map)
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{
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unsigned long base, len;
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base = pci_resource_start(dev, PCI_ROM_RESOURCE);
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len = pci_resource_len(dev, PCI_ROM_RESOURCE);
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if (!len || !base) {
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/*
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* No ROM resource
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*/
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base = pci_resource_start(dev, 2);
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len = pci_resource_len(dev, 2);
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/*
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* We need to re-allocate PCI BAR2 address range to the
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* PCI ROM BAR, and disable PCI BAR2.
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*/
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} else {
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/*
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* Hmm, if an address was allocated to the ROM resource, but
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* not enabled, should we be allocating a new resource for it
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* or simply enabling it?
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*/
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2008-09-23 16:25:10 +00:00
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pci_enable_rom(dev);
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printk("%s: enabling expansion ROM\n", pci_name(dev));
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2005-04-16 22:20:36 +00:00
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}
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if (!len || !base)
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return -ENXIO;
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map->map.bankwidth = 4;
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2021-01-08 09:23:00 +00:00
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map->map.read = mtd_pci_read32;
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map->map.write = mtd_pci_write32;
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2005-04-16 22:20:36 +00:00
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map->map.size = len;
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2020-01-06 08:43:50 +00:00
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map->base = ioremap(base, len);
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2005-04-16 22:20:36 +00:00
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if (!map->base)
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return -ENOMEM;
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return 0;
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}
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static void
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intel_dc21285_exit(struct pci_dev *dev, struct map_pci_info *map)
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{
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if (map->base)
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iounmap(map->base);
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/*
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* We need to undo the PCI BAR2/PCI ROM BAR address alteration.
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*/
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2008-09-23 16:25:10 +00:00
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pci_disable_rom(dev);
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2005-04-16 22:20:36 +00:00
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}
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static unsigned long
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intel_dc21285_translate(struct map_pci_info *map, unsigned long ofs)
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{
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return ofs & 0x00ffffc0 ? ofs : (ofs ^ (1 << 5));
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}
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static struct mtd_pci_info intel_dc21285_info = {
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.init = intel_dc21285_init,
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.exit = intel_dc21285_exit,
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.translate = intel_dc21285_translate,
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.map_name = "jedec_probe",
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};
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/*
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* PCI device ID table
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*/
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2017-08-03 16:22:10 +00:00
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static const struct pci_device_id mtd_pci_ids[] = {
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2005-04-16 22:20:36 +00:00
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{
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.vendor = PCI_VENDOR_ID_INTEL,
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.device = 0x530d,
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.subvendor = PCI_ANY_ID,
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.subdevice = PCI_ANY_ID,
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.class = PCI_CLASS_MEMORY_OTHER << 8,
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.class_mask = 0xffff00,
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.driver_data = (unsigned long)&intel_iq80310_info,
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},
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{
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.vendor = PCI_VENDOR_ID_DEC,
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.device = PCI_DEVICE_ID_DEC_21285,
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.subvendor = 0, /* DC21285 defaults to 0 on reset */
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.subdevice = 0, /* DC21285 defaults to 0 on reset */
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.driver_data = (unsigned long)&intel_dc21285_info,
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},
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{ 0, }
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};
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/*
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* Generic code follows.
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*/
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2012-12-21 21:19:05 +00:00
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static int mtd_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
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2005-04-16 22:20:36 +00:00
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{
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struct mtd_pci_info *info = (struct mtd_pci_info *)id->driver_data;
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struct map_pci_info *map = NULL;
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struct mtd_info *mtd = NULL;
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int err;
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err = pci_enable_device(dev);
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if (err)
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goto out;
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err = pci_request_regions(dev, "pci mtd");
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if (err)
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goto out;
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map = kmalloc(sizeof(*map), GFP_KERNEL);
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err = -ENOMEM;
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if (!map)
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goto release;
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map->map = mtd_pci_map;
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map->map.name = pci_name(dev);
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map->dev = dev;
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map->exit = info->exit;
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map->translate = info->translate;
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err = info->init(dev, map);
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if (err)
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goto release;
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2013-03-12 08:46:37 +00:00
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mtd = do_map_probe(info->map_name, &map->map);
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2005-04-16 22:20:36 +00:00
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err = -ENODEV;
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if (!mtd)
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goto release;
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mtd->owner = THIS_MODULE;
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2011-05-23 09:23:40 +00:00
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mtd_device_register(mtd, NULL, 0);
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2005-04-16 22:20:36 +00:00
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pci_set_drvdata(dev, mtd);
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return 0;
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release:
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if (map) {
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map->exit(dev, map);
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kfree(map);
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}
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pci_release_regions(dev);
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out:
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return err;
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}
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2012-12-21 21:19:05 +00:00
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static void mtd_pci_remove(struct pci_dev *dev)
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2005-04-16 22:20:36 +00:00
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{
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struct mtd_info *mtd = pci_get_drvdata(dev);
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struct map_pci_info *map = mtd->priv;
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2011-05-23 09:23:40 +00:00
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mtd_device_unregister(mtd);
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2005-04-16 22:20:36 +00:00
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map_destroy(mtd);
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map->exit(dev, map);
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kfree(map);
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pci_release_regions(dev);
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}
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static struct pci_driver mtd_pci_driver = {
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.name = "MTD PCI",
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.probe = mtd_pci_probe,
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2012-11-19 18:21:24 +00:00
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.remove = mtd_pci_remove,
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2005-04-16 22:20:36 +00:00
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.id_table = mtd_pci_ids,
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};
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2012-04-03 01:59:44 +00:00
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module_pci_driver(mtd_pci_driver);
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2005-04-16 22:20:36 +00:00
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MODULE_LICENSE("GPL");
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MODULE_AUTHOR("Russell King <rmk@arm.linux.org.uk>");
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MODULE_DESCRIPTION("Generic PCI map driver");
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MODULE_DEVICE_TABLE(pci, mtd_pci_ids);
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