2018-09-26 15:27:40 +00:00
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// SPDX-License-Identifier: GPL-2.0
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2011-02-07 19:45:55 +00:00
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/*
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2017-01-19 16:39:42 +00:00
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* Power button driver for Intel MID platforms.
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2011-02-07 19:45:55 +00:00
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*
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2017-01-19 16:39:49 +00:00
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* Copyright (C) 2010,2017 Intel Corp
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*
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* Author: Hong Liu <hong.liu@intel.com>
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* Author: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
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2011-02-07 19:45:55 +00:00
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*/
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#include <linux/input.h>
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2017-01-19 16:39:48 +00:00
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#include <linux/interrupt.h>
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2012-01-26 17:40:27 +00:00
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#include <linux/mfd/intel_msic.h>
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2017-01-19 16:39:48 +00:00
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#include <linux/module.h>
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#include <linux/platform_device.h>
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2015-09-21 15:47:01 +00:00
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#include <linux/pm_wakeirq.h>
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2017-01-19 16:39:48 +00:00
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#include <linux/slab.h>
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2011-02-07 19:45:55 +00:00
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2017-01-19 16:39:43 +00:00
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#include <asm/cpu_device_id.h>
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#include <asm/intel-family.h>
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2017-01-19 16:39:46 +00:00
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#include <asm/intel_scu_ipc.h>
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2017-01-19 16:39:43 +00:00
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2011-02-07 19:45:55 +00:00
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#define DRIVER_NAME "msic_power_btn"
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2011-04-06 14:44:37 +00:00
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#define MSIC_PB_LEVEL (1 << 3) /* 1 - release, 0 - press */
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2011-02-07 19:45:55 +00:00
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2012-01-26 17:40:27 +00:00
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/*
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* MSIC document ti_datasheet defines the 1st bit reg 0x21 is used to mask
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* power button interrupt
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*/
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#define MSIC_PWRBTNM (1 << 0)
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2017-01-19 16:39:46 +00:00
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/* Intel Tangier */
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2017-02-02 17:54:26 +00:00
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#define BCOVE_PB_LEVEL (1 << 4) /* 1 - release, 0 - press */
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2017-01-19 16:39:46 +00:00
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/* Basin Cove PMIC */
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#define BCOVE_PBIRQ 0x02
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#define BCOVE_IRQLVL1MSK 0x0c
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#define BCOVE_PBIRQMASK 0x0d
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2017-02-02 17:54:26 +00:00
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#define BCOVE_PBSTATUS 0x27
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2017-01-19 16:39:46 +00:00
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2017-01-19 16:39:43 +00:00
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struct mid_pb_ddata {
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struct device *dev;
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int irq;
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struct input_dev *input;
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2017-02-02 17:54:28 +00:00
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unsigned short mirqlvl1_addr;
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2017-02-02 17:54:26 +00:00
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unsigned short pbstat_addr;
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u8 pbstat_mask;
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2020-04-16 08:15:37 +00:00
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struct intel_scu_ipc_dev *scu;
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2017-01-19 16:39:46 +00:00
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int (*setup)(struct mid_pb_ddata *ddata);
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2017-01-19 16:39:43 +00:00
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};
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2017-02-02 17:54:26 +00:00
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static int mid_pbstat(struct mid_pb_ddata *ddata, int *value)
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2011-02-07 19:45:55 +00:00
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{
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2017-01-19 16:39:43 +00:00
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struct input_dev *input = ddata->input;
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2011-02-07 19:45:55 +00:00
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int ret;
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u8 pbstat;
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2020-04-16 08:15:37 +00:00
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ret = intel_scu_ipc_dev_ioread8(ddata->scu, ddata->pbstat_addr,
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&pbstat);
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2017-01-19 16:39:43 +00:00
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if (ret)
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return ret;
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2012-01-26 17:40:27 +00:00
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dev_dbg(input->dev.parent, "PB_INT status= %d\n", pbstat);
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2017-02-02 17:54:26 +00:00
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*value = !(pbstat & ddata->pbstat_mask);
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2017-01-19 16:39:43 +00:00
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return 0;
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}
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2017-02-02 17:54:28 +00:00
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static int mid_irq_ack(struct mid_pb_ddata *ddata)
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2017-01-19 16:39:44 +00:00
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{
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2020-04-16 08:15:37 +00:00
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return intel_scu_ipc_dev_update(ddata->scu, ddata->mirqlvl1_addr, 0,
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MSIC_PWRBTNM);
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2017-01-19 16:39:46 +00:00
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}
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static int mrfld_setup(struct mid_pb_ddata *ddata)
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{
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/* Unmask the PBIRQ and MPBIRQ on Tangier */
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2020-04-16 08:15:37 +00:00
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intel_scu_ipc_dev_update(ddata->scu, BCOVE_PBIRQ, 0, MSIC_PWRBTNM);
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intel_scu_ipc_dev_update(ddata->scu, BCOVE_PBIRQMASK, 0, MSIC_PWRBTNM);
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2017-01-19 16:39:46 +00:00
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return 0;
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}
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2017-01-19 16:39:43 +00:00
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static irqreturn_t mid_pb_isr(int irq, void *dev_id)
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{
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struct mid_pb_ddata *ddata = dev_id;
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struct input_dev *input = ddata->input;
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2017-02-02 17:54:26 +00:00
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int value = 0;
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2017-01-19 16:39:43 +00:00
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int ret;
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2017-02-02 17:54:26 +00:00
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ret = mid_pbstat(ddata, &value);
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2011-04-06 14:44:37 +00:00
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if (ret < 0) {
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2017-01-19 16:39:47 +00:00
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dev_err(input->dev.parent,
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"Read error %d while reading MSIC_PB_STATUS\n", ret);
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2011-04-06 14:44:37 +00:00
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} else {
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2017-01-19 16:39:43 +00:00
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input_event(input, EV_KEY, KEY_POWER, value);
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2011-04-06 14:44:37 +00:00
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input_sync(input);
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}
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2011-02-07 19:45:55 +00:00
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2017-02-02 17:54:28 +00:00
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mid_irq_ack(ddata);
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2011-02-07 19:45:55 +00:00
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return IRQ_HANDLED;
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}
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2017-08-11 14:20:00 +00:00
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static const struct mid_pb_ddata mfld_ddata = {
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2017-02-02 17:54:28 +00:00
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.mirqlvl1_addr = INTEL_MSIC_IRQLVL1MSK,
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2017-02-02 17:54:26 +00:00
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.pbstat_addr = INTEL_MSIC_PBSTATUS,
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.pbstat_mask = MSIC_PB_LEVEL,
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2017-01-19 16:39:43 +00:00
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};
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2017-08-11 14:20:00 +00:00
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static const struct mid_pb_ddata mrfld_ddata = {
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2017-02-02 17:54:28 +00:00
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.mirqlvl1_addr = BCOVE_IRQLVL1MSK,
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2017-02-02 17:54:26 +00:00
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.pbstat_addr = BCOVE_PBSTATUS,
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.pbstat_mask = BCOVE_PB_LEVEL,
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2017-01-19 16:39:46 +00:00
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.setup = mrfld_setup,
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};
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2017-01-19 16:39:43 +00:00
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static const struct x86_cpu_id mid_pb_cpu_ids[] = {
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2020-03-20 13:13:56 +00:00
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X86_MATCH_INTEL_FAM6_MODEL(ATOM_SALTWELL_MID, &mfld_ddata),
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X86_MATCH_INTEL_FAM6_MODEL(ATOM_SILVERMONT_MID, &mrfld_ddata),
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2017-01-19 16:39:43 +00:00
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{}
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};
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2017-01-19 16:39:42 +00:00
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static int mid_pb_probe(struct platform_device *pdev)
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2011-02-07 19:45:55 +00:00
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{
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2017-01-19 16:39:43 +00:00
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const struct x86_cpu_id *id;
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struct mid_pb_ddata *ddata;
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2011-02-07 19:45:55 +00:00
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struct input_dev *input;
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2011-04-06 14:44:37 +00:00
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int irq = platform_get_irq(pdev, 0);
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2011-02-07 19:45:55 +00:00
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int error;
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2017-01-19 16:39:43 +00:00
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id = x86_match_cpu(mid_pb_cpu_ids);
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if (!id)
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return -ENODEV;
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2017-08-09 16:00:54 +00:00
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if (irq < 0) {
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dev_err(&pdev->dev, "Failed to get IRQ: %d\n", irq);
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return irq;
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}
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2011-02-07 19:45:55 +00:00
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2017-01-19 16:39:41 +00:00
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input = devm_input_allocate_device(&pdev->dev);
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2013-10-23 19:14:52 +00:00
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if (!input)
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2011-04-06 14:44:37 +00:00
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return -ENOMEM;
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2011-02-07 19:45:55 +00:00
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input->name = pdev->name;
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input->phys = "power-button/input0";
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input->id.bustype = BUS_HOST;
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input->dev.parent = &pdev->dev;
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input_set_capability(input, EV_KEY, KEY_POWER);
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2020-01-22 16:05:20 +00:00
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ddata = devm_kmemdup(&pdev->dev, (void *)id->driver_data,
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sizeof(*ddata), GFP_KERNEL);
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2017-01-19 16:39:43 +00:00
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if (!ddata)
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2020-01-22 16:05:20 +00:00
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return -ENOMEM;
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2017-01-19 16:39:43 +00:00
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ddata->dev = &pdev->dev;
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ddata->irq = irq;
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ddata->input = input;
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2017-01-19 16:39:46 +00:00
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if (ddata->setup) {
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error = ddata->setup(ddata);
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if (error)
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return error;
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}
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2020-04-16 08:15:37 +00:00
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ddata->scu = devm_intel_scu_ipc_dev_get(&pdev->dev);
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if (!ddata->scu)
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return -EPROBE_DEFER;
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2017-01-19 16:39:42 +00:00
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error = devm_request_threaded_irq(&pdev->dev, irq, NULL, mid_pb_isr,
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2017-01-19 16:39:43 +00:00
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IRQF_ONESHOT, DRIVER_NAME, ddata);
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2011-02-07 19:45:55 +00:00
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if (error) {
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2017-01-19 16:39:47 +00:00
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dev_err(&pdev->dev,
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"Unable to request irq %d for MID power button\n", irq);
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2017-01-19 16:39:41 +00:00
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return error;
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2011-02-07 19:45:55 +00:00
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}
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error = input_register_device(input);
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if (error) {
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2017-01-19 16:39:47 +00:00
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dev_err(&pdev->dev,
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"Unable to register input dev, error %d\n", error);
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2017-01-19 16:39:41 +00:00
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return error;
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2011-02-07 19:45:55 +00:00
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}
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2017-01-19 16:39:43 +00:00
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platform_set_drvdata(pdev, ddata);
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2012-01-26 17:40:27 +00:00
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2017-02-02 17:54:27 +00:00
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/*
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* SCU firmware might send power button interrupts to IA core before
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* kernel boots and doesn't get EOI from IA core. The first bit of
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* MSIC reg 0x21 is kept masked, and SCU firmware doesn't send new
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* power interrupt to Android kernel. Unmask the bit when probing
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* power button in kernel.
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* There is a very narrow race between irq handler and power button
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* initialization. The race happens rarely. So we needn't worry
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* about it.
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*/
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2017-02-02 17:54:28 +00:00
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error = mid_irq_ack(ddata);
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2012-01-26 17:40:27 +00:00
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if (error) {
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2017-01-19 16:39:47 +00:00
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dev_err(&pdev->dev,
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"Unable to clear power button interrupt, error: %d\n",
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error);
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2017-01-19 16:39:41 +00:00
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return error;
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2012-01-26 17:40:27 +00:00
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}
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2017-01-19 16:39:41 +00:00
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device_init_wakeup(&pdev->dev, true);
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dev_pm_set_wake_irq(&pdev->dev, irq);
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2011-02-07 19:45:55 +00:00
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2017-01-19 16:39:41 +00:00
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return 0;
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2011-02-07 19:45:55 +00:00
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}
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2017-01-19 16:39:42 +00:00
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static int mid_pb_remove(struct platform_device *pdev)
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2011-02-07 19:45:55 +00:00
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{
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2015-09-21 15:47:01 +00:00
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dev_pm_clear_wake_irq(&pdev->dev);
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device_init_wakeup(&pdev->dev, false);
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2011-04-06 14:44:37 +00:00
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2011-02-07 19:45:55 +00:00
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return 0;
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}
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2017-01-19 16:39:42 +00:00
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static struct platform_driver mid_pb_driver = {
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2011-02-07 19:45:55 +00:00
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.driver = {
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.name = DRIVER_NAME,
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},
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2017-01-19 16:39:42 +00:00
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.probe = mid_pb_probe,
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.remove = mid_pb_remove,
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2011-02-07 19:45:55 +00:00
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};
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2017-01-19 16:39:42 +00:00
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module_platform_driver(mid_pb_driver);
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2011-02-07 19:45:55 +00:00
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MODULE_AUTHOR("Hong Liu <hong.liu@intel.com>");
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2017-01-19 16:39:42 +00:00
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MODULE_DESCRIPTION("Intel MID Power Button Driver");
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2011-02-07 19:45:55 +00:00
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MODULE_LICENSE("GPL v2");
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MODULE_ALIAS("platform:" DRIVER_NAME);
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