2009-02-02 17:50:09 +00:00
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/*
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* Driver for Freescale MC44S803 Low Power CMOS Broadband Tuner
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*
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* Copyright (c) 2009 Jochen Friedrich <jochen@scram.de>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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*
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.=
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*/
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#include <linux/module.h>
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#include <linux/delay.h>
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#include <linux/dvb/frontend.h>
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#include <linux/i2c.h>
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include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h
percpu.h is included by sched.h and module.h and thus ends up being
included when building most .c files. percpu.h includes slab.h which
in turn includes gfp.h making everything defined by the two files
universally available and complicating inclusion dependencies.
percpu.h -> slab.h dependency is about to be removed. Prepare for
this change by updating users of gfp and slab facilities include those
headers directly instead of assuming availability. As this conversion
needs to touch large number of source files, the following script is
used as the basis of conversion.
http://userweb.kernel.org/~tj/misc/slabh-sweep.py
The script does the followings.
* Scan files for gfp and slab usages and update includes such that
only the necessary includes are there. ie. if only gfp is used,
gfp.h, if slab is used, slab.h.
* When the script inserts a new include, it looks at the include
blocks and try to put the new include such that its order conforms
to its surrounding. It's put in the include block which contains
core kernel includes, in the same order that the rest are ordered -
alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
doesn't seem to be any matching order.
* If the script can't find a place to put a new include (mostly
because the file doesn't have fitting include block), it prints out
an error message indicating which .h file needs to be added to the
file.
The conversion was done in the following steps.
1. The initial automatic conversion of all .c files updated slightly
over 4000 files, deleting around 700 includes and adding ~480 gfp.h
and ~3000 slab.h inclusions. The script emitted errors for ~400
files.
2. Each error was manually checked. Some didn't need the inclusion,
some needed manual addition while adding it to implementation .h or
embedding .c file was more appropriate for others. This step added
inclusions to around 150 files.
3. The script was run again and the output was compared to the edits
from #2 to make sure no file was left behind.
4. Several build tests were done and a couple of problems were fixed.
e.g. lib/decompress_*.c used malloc/free() wrappers around slab
APIs requiring slab.h to be added manually.
5. The script was run on all .h files but without automatically
editing them as sprinkling gfp.h and slab.h inclusions around .h
files could easily lead to inclusion dependency hell. Most gfp.h
inclusion directives were ignored as stuff from gfp.h was usually
wildly available and often used in preprocessor macros. Each
slab.h inclusion directive was examined and added manually as
necessary.
6. percpu.h was updated not to include slab.h.
7. Build test were done on the following configurations and failures
were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my
distributed build env didn't work with gcov compiles) and a few
more options had to be turned off depending on archs to make things
build (like ipr on powerpc/64 which failed due to missing writeq).
* x86 and x86_64 UP and SMP allmodconfig and a custom test config.
* powerpc and powerpc64 SMP allmodconfig
* sparc and sparc64 SMP allmodconfig
* ia64 SMP allmodconfig
* s390 SMP allmodconfig
* alpha SMP allmodconfig
* um on x86_64 SMP allmodconfig
8. percpu.h modifications were reverted so that it could be applied as
a separate patch and serve as bisection point.
Given the fact that I had only a couple of failures from tests on step
6, I'm fairly confident about the coverage of this conversion patch.
If there is a breakage, it's likely to be something in one of the arch
headers which should be easily discoverable easily on most builds of
the specific arch.
Signed-off-by: Tejun Heo <tj@kernel.org>
Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
2010-03-24 08:04:11 +00:00
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#include <linux/slab.h>
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2009-02-02 17:50:09 +00:00
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#include "dvb_frontend.h"
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#include "mc44s803.h"
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#include "mc44s803_priv.h"
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#define mc_printk(level, format, arg...) \
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printk(level "mc44s803: " format , ## arg)
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/* Writes a single register */
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static int mc44s803_writereg(struct mc44s803_priv *priv, u32 val)
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{
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u8 buf[3];
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struct i2c_msg msg = {
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.addr = priv->cfg->i2c_address, .flags = 0, .buf = buf, .len = 3
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};
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buf[0] = (val & 0xff0000) >> 16;
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buf[1] = (val & 0xff00) >> 8;
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buf[2] = (val & 0xff);
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if (i2c_transfer(priv->i2c, &msg, 1) != 1) {
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mc_printk(KERN_WARNING, "I2C write failed\n");
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return -EREMOTEIO;
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}
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return 0;
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}
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/* Reads a single register */
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static int mc44s803_readreg(struct mc44s803_priv *priv, u8 reg, u32 *val)
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{
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u32 wval;
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u8 buf[3];
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int ret;
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struct i2c_msg msg[] = {
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{ .addr = priv->cfg->i2c_address, .flags = I2C_M_RD,
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.buf = buf, .len = 3 },
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};
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wval = MC44S803_REG_SM(MC44S803_REG_DATAREG, MC44S803_ADDR) |
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MC44S803_REG_SM(reg, MC44S803_D);
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ret = mc44s803_writereg(priv, wval);
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if (ret)
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return ret;
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if (i2c_transfer(priv->i2c, msg, 1) != 1) {
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mc_printk(KERN_WARNING, "I2C read failed\n");
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return -EREMOTEIO;
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}
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*val = (buf[0] << 16) | (buf[1] << 8) | buf[2];
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return 0;
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}
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static int mc44s803_release(struct dvb_frontend *fe)
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{
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struct mc44s803_priv *priv = fe->tuner_priv;
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fe->tuner_priv = NULL;
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kfree(priv);
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return 0;
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}
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static int mc44s803_init(struct dvb_frontend *fe)
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{
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struct mc44s803_priv *priv = fe->tuner_priv;
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u32 val;
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int err;
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if (fe->ops.i2c_gate_ctrl)
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fe->ops.i2c_gate_ctrl(fe, 1);
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/* Reset chip */
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val = MC44S803_REG_SM(MC44S803_REG_RESET, MC44S803_ADDR) |
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MC44S803_REG_SM(1, MC44S803_RS);
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err = mc44s803_writereg(priv, val);
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if (err)
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goto exit;
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val = MC44S803_REG_SM(MC44S803_REG_RESET, MC44S803_ADDR);
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err = mc44s803_writereg(priv, val);
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if (err)
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goto exit;
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/* Power Up and Start Osc */
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val = MC44S803_REG_SM(MC44S803_REG_REFOSC, MC44S803_ADDR) |
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MC44S803_REG_SM(0xC0, MC44S803_REFOSC) |
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MC44S803_REG_SM(1, MC44S803_OSCSEL);
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err = mc44s803_writereg(priv, val);
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if (err)
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goto exit;
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val = MC44S803_REG_SM(MC44S803_REG_POWER, MC44S803_ADDR) |
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MC44S803_REG_SM(0x200, MC44S803_POWER);
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err = mc44s803_writereg(priv, val);
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if (err)
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goto exit;
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msleep(10);
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val = MC44S803_REG_SM(MC44S803_REG_REFOSC, MC44S803_ADDR) |
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MC44S803_REG_SM(0x40, MC44S803_REFOSC) |
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MC44S803_REG_SM(1, MC44S803_OSCSEL);
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err = mc44s803_writereg(priv, val);
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if (err)
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goto exit;
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msleep(20);
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/* Setup Mixer */
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val = MC44S803_REG_SM(MC44S803_REG_MIXER, MC44S803_ADDR) |
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MC44S803_REG_SM(1, MC44S803_TRI_STATE) |
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MC44S803_REG_SM(0x7F, MC44S803_MIXER_RES);
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err = mc44s803_writereg(priv, val);
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if (err)
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goto exit;
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/* Setup Cirquit Adjust */
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val = MC44S803_REG_SM(MC44S803_REG_CIRCADJ, MC44S803_ADDR) |
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MC44S803_REG_SM(1, MC44S803_G1) |
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MC44S803_REG_SM(1, MC44S803_G3) |
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MC44S803_REG_SM(0x3, MC44S803_CIRCADJ_RES) |
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MC44S803_REG_SM(1, MC44S803_G6) |
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MC44S803_REG_SM(priv->cfg->dig_out, MC44S803_S1) |
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MC44S803_REG_SM(0x3, MC44S803_LP) |
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MC44S803_REG_SM(1, MC44S803_CLRF) |
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MC44S803_REG_SM(1, MC44S803_CLIF);
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err = mc44s803_writereg(priv, val);
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if (err)
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goto exit;
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val = MC44S803_REG_SM(MC44S803_REG_CIRCADJ, MC44S803_ADDR) |
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MC44S803_REG_SM(1, MC44S803_G1) |
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MC44S803_REG_SM(1, MC44S803_G3) |
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MC44S803_REG_SM(0x3, MC44S803_CIRCADJ_RES) |
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MC44S803_REG_SM(1, MC44S803_G6) |
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MC44S803_REG_SM(priv->cfg->dig_out, MC44S803_S1) |
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MC44S803_REG_SM(0x3, MC44S803_LP);
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err = mc44s803_writereg(priv, val);
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if (err)
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goto exit;
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/* Setup Digtune */
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val = MC44S803_REG_SM(MC44S803_REG_DIGTUNE, MC44S803_ADDR) |
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MC44S803_REG_SM(3, MC44S803_XOD);
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err = mc44s803_writereg(priv, val);
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if (err)
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goto exit;
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/* Setup AGC */
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val = MC44S803_REG_SM(MC44S803_REG_LNAAGC, MC44S803_ADDR) |
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MC44S803_REG_SM(1, MC44S803_AT1) |
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MC44S803_REG_SM(1, MC44S803_AT2) |
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MC44S803_REG_SM(1, MC44S803_AGC_AN_DIG) |
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MC44S803_REG_SM(1, MC44S803_AGC_READ_EN) |
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MC44S803_REG_SM(1, MC44S803_LNA0);
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err = mc44s803_writereg(priv, val);
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if (err)
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goto exit;
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if (fe->ops.i2c_gate_ctrl)
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fe->ops.i2c_gate_ctrl(fe, 0);
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return 0;
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exit:
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if (fe->ops.i2c_gate_ctrl)
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fe->ops.i2c_gate_ctrl(fe, 0);
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mc_printk(KERN_WARNING, "I/O Error\n");
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return err;
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}
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2011-12-24 15:24:33 +00:00
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static int mc44s803_set_params(struct dvb_frontend *fe)
|
2009-02-02 17:50:09 +00:00
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{
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struct mc44s803_priv *priv = fe->tuner_priv;
|
2011-12-20 19:53:50 +00:00
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struct dtv_frontend_properties *c = &fe->dtv_property_cache;
|
2009-02-02 17:50:09 +00:00
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u32 r1, r2, n1, n2, lo1, lo2, freq, val;
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int err;
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2011-12-20 19:53:50 +00:00
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priv->frequency = c->frequency;
|
2009-02-02 17:50:09 +00:00
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r1 = MC44S803_OSC / 1000000;
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r2 = MC44S803_OSC / 100000;
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2011-12-20 19:53:50 +00:00
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n1 = (c->frequency + MC44S803_IF1 + 500000) / 1000000;
|
2009-02-02 17:50:09 +00:00
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freq = MC44S803_OSC / r1 * n1;
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lo1 = ((60 * n1) + (r1 / 2)) / r1;
|
2011-12-20 19:53:50 +00:00
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freq = freq - c->frequency;
|
2009-02-02 17:50:09 +00:00
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n2 = (freq - MC44S803_IF2 + 50000) / 100000;
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lo2 = ((60 * n2) + (r2 / 2)) / r2;
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if (fe->ops.i2c_gate_ctrl)
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fe->ops.i2c_gate_ctrl(fe, 1);
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|
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val = MC44S803_REG_SM(MC44S803_REG_REFDIV, MC44S803_ADDR) |
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MC44S803_REG_SM(r1-1, MC44S803_R1) |
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MC44S803_REG_SM(r2-1, MC44S803_R2) |
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MC44S803_REG_SM(1, MC44S803_REFBUF_EN);
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err = mc44s803_writereg(priv, val);
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|
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if (err)
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goto exit;
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|
|
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|
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val = MC44S803_REG_SM(MC44S803_REG_LO1, MC44S803_ADDR) |
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MC44S803_REG_SM(n1-2, MC44S803_LO1);
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err = mc44s803_writereg(priv, val);
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|
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if (err)
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goto exit;
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|
|
|
|
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|
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val = MC44S803_REG_SM(MC44S803_REG_LO2, MC44S803_ADDR) |
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MC44S803_REG_SM(n2-2, MC44S803_LO2);
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err = mc44s803_writereg(priv, val);
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|
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if (err)
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|
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goto exit;
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|
|
|
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|
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val = MC44S803_REG_SM(MC44S803_REG_DIGTUNE, MC44S803_ADDR) |
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MC44S803_REG_SM(1, MC44S803_DA) |
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MC44S803_REG_SM(lo1, MC44S803_LO_REF) |
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MC44S803_REG_SM(1, MC44S803_AT);
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err = mc44s803_writereg(priv, val);
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|
|
if (err)
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|
goto exit;
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|
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val = MC44S803_REG_SM(MC44S803_REG_DIGTUNE, MC44S803_ADDR) |
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MC44S803_REG_SM(2, MC44S803_DA) |
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MC44S803_REG_SM(lo2, MC44S803_LO_REF) |
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|
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MC44S803_REG_SM(1, MC44S803_AT);
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|
|
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|
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err = mc44s803_writereg(priv, val);
|
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|
|
if (err)
|
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|
|
goto exit;
|
|
|
|
|
|
|
|
if (fe->ops.i2c_gate_ctrl)
|
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|
|
fe->ops.i2c_gate_ctrl(fe, 0);
|
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|
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
exit:
|
|
|
|
if (fe->ops.i2c_gate_ctrl)
|
|
|
|
fe->ops.i2c_gate_ctrl(fe, 0);
|
|
|
|
|
|
|
|
mc_printk(KERN_WARNING, "I/O Error\n");
|
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|
|
return err;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int mc44s803_get_frequency(struct dvb_frontend *fe, u32 *frequency)
|
|
|
|
{
|
|
|
|
struct mc44s803_priv *priv = fe->tuner_priv;
|
|
|
|
*frequency = priv->frequency;
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2012-09-02 22:21:51 +00:00
|
|
|
static int mc44s803_get_if_frequency(struct dvb_frontend *fe, u32 *frequency)
|
|
|
|
{
|
|
|
|
*frequency = MC44S803_IF2; /* 36.125 MHz */
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2009-02-02 17:50:09 +00:00
|
|
|
static const struct dvb_tuner_ops mc44s803_tuner_ops = {
|
|
|
|
.info = {
|
|
|
|
.name = "Freescale MC44S803",
|
|
|
|
.frequency_min = 48000000,
|
|
|
|
.frequency_max = 1000000000,
|
|
|
|
.frequency_step = 100000,
|
|
|
|
},
|
|
|
|
|
|
|
|
.release = mc44s803_release,
|
|
|
|
.init = mc44s803_init,
|
|
|
|
.set_params = mc44s803_set_params,
|
2012-09-02 22:21:51 +00:00
|
|
|
.get_frequency = mc44s803_get_frequency,
|
|
|
|
.get_if_frequency = mc44s803_get_if_frequency,
|
2009-02-02 17:50:09 +00:00
|
|
|
};
|
|
|
|
|
|
|
|
/* This functions tries to identify a MC44S803 tuner by reading the ID
|
|
|
|
register. This is hasty. */
|
|
|
|
struct dvb_frontend *mc44s803_attach(struct dvb_frontend *fe,
|
|
|
|
struct i2c_adapter *i2c, struct mc44s803_config *cfg)
|
|
|
|
{
|
|
|
|
struct mc44s803_priv *priv;
|
|
|
|
u32 reg;
|
|
|
|
u8 id;
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
reg = 0;
|
|
|
|
|
|
|
|
priv = kzalloc(sizeof(struct mc44s803_priv), GFP_KERNEL);
|
|
|
|
if (priv == NULL)
|
|
|
|
return NULL;
|
|
|
|
|
|
|
|
priv->cfg = cfg;
|
|
|
|
priv->i2c = i2c;
|
|
|
|
priv->fe = fe;
|
|
|
|
|
|
|
|
if (fe->ops.i2c_gate_ctrl)
|
|
|
|
fe->ops.i2c_gate_ctrl(fe, 1); /* open i2c_gate */
|
|
|
|
|
|
|
|
ret = mc44s803_readreg(priv, MC44S803_REG_ID, ®);
|
|
|
|
if (ret)
|
|
|
|
goto error;
|
|
|
|
|
|
|
|
id = MC44S803_REG_MS(reg, MC44S803_ID);
|
|
|
|
|
|
|
|
if (id != 0x14) {
|
|
|
|
mc_printk(KERN_ERR, "unsupported ID "
|
|
|
|
"(%x should be 0x14)\n", id);
|
|
|
|
goto error;
|
|
|
|
}
|
|
|
|
|
|
|
|
mc_printk(KERN_INFO, "successfully identified (ID = %x)\n", id);
|
|
|
|
memcpy(&fe->ops.tuner_ops, &mc44s803_tuner_ops,
|
|
|
|
sizeof(struct dvb_tuner_ops));
|
|
|
|
|
|
|
|
fe->tuner_priv = priv;
|
|
|
|
|
|
|
|
if (fe->ops.i2c_gate_ctrl)
|
|
|
|
fe->ops.i2c_gate_ctrl(fe, 0); /* close i2c_gate */
|
|
|
|
|
|
|
|
return fe;
|
|
|
|
|
|
|
|
error:
|
|
|
|
if (fe->ops.i2c_gate_ctrl)
|
|
|
|
fe->ops.i2c_gate_ctrl(fe, 0); /* close i2c_gate */
|
|
|
|
|
|
|
|
kfree(priv);
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(mc44s803_attach);
|
|
|
|
|
|
|
|
MODULE_AUTHOR("Jochen Friedrich");
|
|
|
|
MODULE_DESCRIPTION("Freescale MC44S803 silicon tuner driver");
|
|
|
|
MODULE_LICENSE("GPL");
|