2018-12-17 12:23:36 +00:00
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// SPDX-License-Identifier: GPL-2.0
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2011-02-22 20:46:18 +00:00
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/*
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* AD7606 SPI ADC driver
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*
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* Copyright 2011 Analog Devices Inc.
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*/
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2018-12-17 12:23:38 +00:00
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#include <linux/delay.h>
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2011-02-22 20:46:18 +00:00
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#include <linux/device.h>
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#include <linux/err.h>
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2016-10-19 17:07:07 +00:00
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#include <linux/gpio/consumer.h>
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2018-12-17 12:23:38 +00:00
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#include <linux/interrupt.h>
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#include <linux/kernel.h>
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2011-07-03 19:49:50 +00:00
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#include <linux/module.h>
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2018-12-17 12:23:38 +00:00
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#include <linux/regulator/consumer.h>
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#include <linux/sched.h>
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#include <linux/slab.h>
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#include <linux/sysfs.h>
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2018-12-13 12:46:18 +00:00
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#include <linux/util_macros.h>
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2011-02-22 20:46:18 +00:00
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2012-04-25 14:54:58 +00:00
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#include <linux/iio/iio.h>
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#include <linux/iio/buffer.h>
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2018-12-17 12:23:38 +00:00
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#include <linux/iio/sysfs.h>
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2018-12-17 12:23:37 +00:00
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#include <linux/iio/trigger.h>
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2016-10-19 17:07:08 +00:00
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#include <linux/iio/triggered_buffer.h>
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2018-12-17 12:23:38 +00:00
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#include <linux/iio/trigger_consumer.h>
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2011-02-22 20:46:18 +00:00
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#include "ad7606.h"
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2018-09-13 08:44:09 +00:00
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/*
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* Scales are computed as 5000/32768 and 10000/32768 respectively,
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* so that when applied to the raw values they provide mV values
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*/
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2019-04-02 13:18:39 +00:00
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static const unsigned int ad7606_scale_avail[2] = {
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2018-12-13 12:46:18 +00:00
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152588, 305176
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};
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2019-07-18 06:27:33 +00:00
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static const unsigned int ad7616_sw_scale_avail[3] = {
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76293, 152588, 305176
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};
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2018-12-13 12:46:18 +00:00
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static const unsigned int ad7606_oversampling_avail[7] = {
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1, 2, 4, 8, 16, 32, 64,
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2017-01-07 11:10:23 +00:00
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};
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2019-04-02 13:18:40 +00:00
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static const unsigned int ad7616_oversampling_avail[8] = {
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1, 2, 4, 8, 16, 32, 64, 128,
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};
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2016-10-19 17:07:08 +00:00
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static int ad7606_reset(struct ad7606_state *st)
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2011-02-22 20:46:18 +00:00
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{
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2016-10-19 17:07:07 +00:00
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if (st->gpio_reset) {
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gpiod_set_value(st->gpio_reset, 1);
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2011-02-22 20:46:18 +00:00
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ndelay(100); /* t_reset >= 100ns */
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2016-10-19 17:07:07 +00:00
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gpiod_set_value(st->gpio_reset, 0);
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2011-02-22 20:46:18 +00:00
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return 0;
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}
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return -ENODEV;
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}
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2019-07-18 06:27:34 +00:00
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static int ad7606_reg_access(struct iio_dev *indio_dev,
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unsigned int reg,
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unsigned int writeval,
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unsigned int *readval)
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{
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struct ad7606_state *st = iio_priv(indio_dev);
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int ret;
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mutex_lock(&st->lock);
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if (readval) {
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ret = st->bops->reg_read(st, reg);
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if (ret < 0)
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goto err_unlock;
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*readval = ret;
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ret = 0;
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} else {
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ret = st->bops->reg_write(st, reg, writeval);
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}
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err_unlock:
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mutex_unlock(&st->lock);
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return ret;
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}
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2016-10-19 17:07:08 +00:00
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static int ad7606_read_samples(struct ad7606_state *st)
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2016-10-19 17:07:02 +00:00
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{
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2019-11-04 16:26:34 +00:00
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unsigned int num = st->chip_info->num_channels - 1;
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2016-10-19 17:07:02 +00:00
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u16 *data = st->data;
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int ret;
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/*
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* The frstdata signal is set to high while and after reading the sample
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* of the first channel and low for all other channels. This can be used
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* to check that the incoming data is correctly aligned. During normal
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* operation the data should never become unaligned, but some glitch or
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* electrostatic discharge might cause an extra read or clock cycle.
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* Monitoring the frstdata signal allows to recover from such failure
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* situations.
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*/
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2016-10-19 17:07:07 +00:00
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if (st->gpio_frstdata) {
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2016-10-19 17:07:02 +00:00
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ret = st->bops->read_block(st->dev, 1, data);
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if (ret)
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return ret;
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2016-10-19 17:07:07 +00:00
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if (!gpiod_get_value(st->gpio_frstdata)) {
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2016-10-19 17:07:02 +00:00
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ad7606_reset(st);
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return -EIO;
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}
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data++;
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num--;
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}
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return st->bops->read_block(st->dev, num, data);
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}
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2016-10-19 17:07:08 +00:00
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static irqreturn_t ad7606_trigger_handler(int irq, void *p)
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{
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struct iio_poll_func *pf = p;
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2018-12-17 12:23:37 +00:00
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struct iio_dev *indio_dev = pf->indio_dev;
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struct ad7606_state *st = iio_priv(indio_dev);
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2016-10-19 17:07:08 +00:00
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int ret;
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2018-12-17 12:23:37 +00:00
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mutex_lock(&st->lock);
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2016-10-19 17:07:08 +00:00
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ret = ad7606_read_samples(st);
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if (ret == 0)
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iio_push_to_buffers_with_timestamp(indio_dev, st->data,
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iio_get_time_ns(indio_dev));
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iio_trigger_notify_done(indio_dev->trig);
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2018-12-17 12:23:37 +00:00
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/* The rising edge of the CONVST signal starts a new conversion. */
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gpiod_set_value(st->gpio_convst, 1);
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mutex_unlock(&st->lock);
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return IRQ_HANDLED;
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2016-10-19 17:07:08 +00:00
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}
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2016-03-26 19:50:24 +00:00
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static int ad7606_scan_direct(struct iio_dev *indio_dev, unsigned int ch)
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2011-02-22 20:46:18 +00:00
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{
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2011-05-18 13:42:28 +00:00
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struct ad7606_state *st = iio_priv(indio_dev);
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2011-02-22 20:46:18 +00:00
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int ret;
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2016-10-19 17:07:07 +00:00
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gpiod_set_value(st->gpio_convst, 1);
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2018-12-13 12:46:15 +00:00
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ret = wait_for_completion_timeout(&st->completion,
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msecs_to_jiffies(1000));
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if (!ret) {
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ret = -ETIMEDOUT;
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2011-02-22 20:46:18 +00:00
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goto error_ret;
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2018-12-13 12:46:15 +00:00
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}
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2011-02-22 20:46:18 +00:00
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2016-10-19 17:07:02 +00:00
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ret = ad7606_read_samples(st);
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if (ret == 0)
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ret = st->data[ch];
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2011-02-22 20:46:18 +00:00
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error_ret:
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2016-10-19 17:07:07 +00:00
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gpiod_set_value(st->gpio_convst, 0);
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2011-02-22 20:46:18 +00:00
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return ret;
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}
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2011-05-18 13:42:27 +00:00
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static int ad7606_read_raw(struct iio_dev *indio_dev,
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2011-05-18 13:42:00 +00:00
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struct iio_chan_spec const *chan,
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int *val,
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int *val2,
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long m)
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2011-02-22 20:46:18 +00:00
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{
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2019-05-27 12:56:48 +00:00
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int ret, ch = 0;
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2011-05-18 13:42:28 +00:00
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struct ad7606_state *st = iio_priv(indio_dev);
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2011-05-18 13:42:00 +00:00
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switch (m) {
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2012-04-15 16:41:18 +00:00
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case IIO_CHAN_INFO_RAW:
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2016-04-06 04:11:31 +00:00
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ret = iio_device_claim_direct_mode(indio_dev);
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if (ret)
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return ret;
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ret = ad7606_scan_direct(indio_dev, chan->address);
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iio_device_release_direct_mode(indio_dev);
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2011-05-18 13:42:00 +00:00
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if (ret < 0)
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return ret;
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2015-10-14 18:14:15 +00:00
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*val = (short)ret;
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2011-05-18 13:42:00 +00:00
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return IIO_VAL_INT;
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2011-10-26 16:41:36 +00:00
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case IIO_CHAN_INFO_SCALE:
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2019-05-27 12:56:48 +00:00
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if (st->sw_mode_en)
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ch = chan->address;
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2018-12-13 12:46:18 +00:00
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*val = 0;
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2019-05-27 12:56:48 +00:00
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*val2 = st->scale_avail[st->range[ch]];
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2017-01-07 11:10:23 +00:00
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return IIO_VAL_INT_PLUS_MICRO;
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2016-10-08 16:05:40 +00:00
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case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
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*val = st->oversampling;
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return IIO_VAL_INT;
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2011-05-18 13:42:00 +00:00
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}
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return -EINVAL;
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2011-02-22 20:46:18 +00:00
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}
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2019-04-02 13:18:39 +00:00
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static ssize_t ad7606_show_avail(char *buf, const unsigned int *vals,
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unsigned int n, bool micros)
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2011-02-22 20:46:18 +00:00
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{
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2019-04-02 13:18:39 +00:00
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size_t len = 0;
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int i;
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2016-10-19 17:06:59 +00:00
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2019-04-02 13:18:39 +00:00
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for (i = 0; i < n; i++) {
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len += scnprintf(buf + len, PAGE_SIZE - len,
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micros ? "0.%06u " : "%u ", vals[i]);
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}
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2017-01-07 11:10:23 +00:00
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buf[len - 1] = '\n';
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2011-02-22 20:46:18 +00:00
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2017-01-07 11:10:23 +00:00
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return len;
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2011-02-22 20:46:18 +00:00
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}
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2019-04-02 13:18:39 +00:00
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static ssize_t in_voltage_scale_available_show(struct device *dev,
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struct device_attribute *attr,
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char *buf)
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{
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struct iio_dev *indio_dev = dev_to_iio_dev(dev);
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struct ad7606_state *st = iio_priv(indio_dev);
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return ad7606_show_avail(buf, st->scale_avail, st->num_scales, true);
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}
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2017-01-07 11:10:23 +00:00
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static IIO_DEVICE_ATTR_RO(in_voltage_scale_available, 0);
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2011-02-22 20:46:18 +00:00
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2019-05-27 12:56:47 +00:00
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static int ad7606_write_scale_hw(struct iio_dev *indio_dev, int ch, int val)
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{
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struct ad7606_state *st = iio_priv(indio_dev);
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gpiod_set_value(st->gpio_range, val);
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return 0;
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}
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static int ad7606_write_os_hw(struct iio_dev *indio_dev, int val)
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{
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struct ad7606_state *st = iio_priv(indio_dev);
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DECLARE_BITMAP(values, 3);
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values[0] = val;
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gpiod_set_array_value(ARRAY_SIZE(values), st->gpio_os->desc,
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st->gpio_os->info, values);
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/* AD7616 requires a reset to update value */
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if (st->chip_info->os_req_reset)
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ad7606_reset(st);
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return 0;
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}
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2016-10-08 16:05:40 +00:00
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static int ad7606_write_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan,
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int val,
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int val2,
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long mask)
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2011-02-22 20:46:18 +00:00
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{
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2011-05-18 13:42:28 +00:00
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struct ad7606_state *st = iio_priv(indio_dev);
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2019-05-27 12:56:47 +00:00
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int i, ret, ch = 0;
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2011-02-22 20:46:18 +00:00
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2016-10-08 16:05:40 +00:00
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switch (mask) {
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2017-01-07 11:10:23 +00:00
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case IIO_CHAN_INFO_SCALE:
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2017-03-20 19:51:34 +00:00
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mutex_lock(&st->lock);
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2019-04-02 13:18:39 +00:00
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i = find_closest(val2, st->scale_avail, st->num_scales);
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2019-05-27 12:56:48 +00:00
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if (st->sw_mode_en)
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ch = chan->address;
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ret = st->write_scale(indio_dev, ch, i);
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2019-05-27 12:56:47 +00:00
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if (ret < 0) {
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mutex_unlock(&st->lock);
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return ret;
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}
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st->range[ch] = i;
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2017-03-20 19:51:34 +00:00
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mutex_unlock(&st->lock);
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2017-01-07 11:10:23 +00:00
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2018-12-13 12:46:18 +00:00
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return 0;
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2016-10-08 16:05:40 +00:00
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case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
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if (val2)
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return -EINVAL;
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2019-04-02 13:18:39 +00:00
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i = find_closest(val, st->oversampling_avail,
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st->num_os_ratios);
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2017-03-20 19:51:34 +00:00
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mutex_lock(&st->lock);
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2019-05-27 12:56:47 +00:00
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ret = st->write_os(indio_dev, i);
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if (ret < 0) {
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mutex_unlock(&st->lock);
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return ret;
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}
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2019-04-02 13:18:39 +00:00
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st->oversampling = st->oversampling_avail[i];
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2017-03-20 19:51:34 +00:00
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mutex_unlock(&st->lock);
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2016-10-19 17:07:07 +00:00
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2016-10-08 16:05:40 +00:00
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return 0;
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default:
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return -EINVAL;
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2011-02-22 20:46:18 +00:00
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}
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}
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2019-04-02 13:18:39 +00:00
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static ssize_t ad7606_oversampling_ratio_avail(struct device *dev,
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struct device_attribute *attr,
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char *buf)
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|
|
{
|
|
|
|
struct iio_dev *indio_dev = dev_to_iio_dev(dev);
|
|
|
|
struct ad7606_state *st = iio_priv(indio_dev);
|
|
|
|
|
|
|
|
return ad7606_show_avail(buf, st->oversampling_avail,
|
|
|
|
st->num_os_ratios, false);
|
|
|
|
}
|
|
|
|
|
|
|
|
static IIO_DEVICE_ATTR(oversampling_ratio_available, 0444,
|
|
|
|
ad7606_oversampling_ratio_avail, NULL, 0);
|
2011-02-22 20:46:18 +00:00
|
|
|
|
2012-01-29 11:07:03 +00:00
|
|
|
static struct attribute *ad7606_attributes_os_and_range[] = {
|
2017-01-07 11:10:23 +00:00
|
|
|
&iio_dev_attr_in_voltage_scale_available.dev_attr.attr,
|
2019-04-02 13:18:39 +00:00
|
|
|
&iio_dev_attr_oversampling_ratio_available.dev_attr.attr,
|
2011-02-22 20:46:18 +00:00
|
|
|
NULL,
|
|
|
|
};
|
|
|
|
|
2012-01-29 11:07:03 +00:00
|
|
|
static const struct attribute_group ad7606_attribute_group_os_and_range = {
|
|
|
|
.attrs = ad7606_attributes_os_and_range,
|
|
|
|
};
|
2011-02-22 20:46:18 +00:00
|
|
|
|
2012-01-29 11:07:03 +00:00
|
|
|
static struct attribute *ad7606_attributes_os[] = {
|
2019-04-02 13:18:39 +00:00
|
|
|
&iio_dev_attr_oversampling_ratio_available.dev_attr.attr,
|
2012-01-29 11:07:03 +00:00
|
|
|
NULL,
|
|
|
|
};
|
2011-02-22 20:46:18 +00:00
|
|
|
|
2012-01-29 11:07:03 +00:00
|
|
|
static const struct attribute_group ad7606_attribute_group_os = {
|
|
|
|
.attrs = ad7606_attributes_os,
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct attribute *ad7606_attributes_range[] = {
|
2017-01-07 11:10:23 +00:00
|
|
|
&iio_dev_attr_in_voltage_scale_available.dev_attr.attr,
|
2012-01-29 11:07:03 +00:00
|
|
|
NULL,
|
|
|
|
};
|
|
|
|
|
|
|
|
static const struct attribute_group ad7606_attribute_group_range = {
|
|
|
|
.attrs = ad7606_attributes_range,
|
2011-02-22 20:46:18 +00:00
|
|
|
};
|
|
|
|
|
2018-09-13 11:02:12 +00:00
|
|
|
static const struct iio_chan_spec ad7605_channels[] = {
|
|
|
|
IIO_CHAN_SOFT_TIMESTAMP(4),
|
|
|
|
AD7605_CHANNEL(0),
|
|
|
|
AD7605_CHANNEL(1),
|
|
|
|
AD7605_CHANNEL(2),
|
|
|
|
AD7605_CHANNEL(3),
|
|
|
|
};
|
|
|
|
|
2016-02-05 10:32:34 +00:00
|
|
|
static const struct iio_chan_spec ad7606_channels[] = {
|
|
|
|
IIO_CHAN_SOFT_TIMESTAMP(8),
|
2011-09-30 09:05:38 +00:00
|
|
|
AD7606_CHANNEL(0),
|
|
|
|
AD7606_CHANNEL(1),
|
|
|
|
AD7606_CHANNEL(2),
|
|
|
|
AD7606_CHANNEL(3),
|
|
|
|
AD7606_CHANNEL(4),
|
|
|
|
AD7606_CHANNEL(5),
|
|
|
|
AD7606_CHANNEL(6),
|
|
|
|
AD7606_CHANNEL(7),
|
2011-05-18 13:42:00 +00:00
|
|
|
};
|
|
|
|
|
2019-04-02 13:18:40 +00:00
|
|
|
/*
|
|
|
|
* The current assumption that this driver makes for AD7616, is that it's
|
|
|
|
* working in Hardware Mode with Serial, Burst and Sequencer modes activated.
|
|
|
|
* To activate them, following pins must be pulled high:
|
|
|
|
* -SER/PAR
|
|
|
|
* -SEQEN
|
|
|
|
* And following pins must be pulled low:
|
|
|
|
* -WR/BURST
|
|
|
|
* -DB4/SER1W
|
|
|
|
*/
|
|
|
|
static const struct iio_chan_spec ad7616_channels[] = {
|
|
|
|
IIO_CHAN_SOFT_TIMESTAMP(16),
|
|
|
|
AD7606_CHANNEL(0),
|
|
|
|
AD7606_CHANNEL(1),
|
|
|
|
AD7606_CHANNEL(2),
|
|
|
|
AD7606_CHANNEL(3),
|
|
|
|
AD7606_CHANNEL(4),
|
|
|
|
AD7606_CHANNEL(5),
|
|
|
|
AD7606_CHANNEL(6),
|
|
|
|
AD7606_CHANNEL(7),
|
|
|
|
AD7606_CHANNEL(8),
|
|
|
|
AD7606_CHANNEL(9),
|
|
|
|
AD7606_CHANNEL(10),
|
|
|
|
AD7606_CHANNEL(11),
|
|
|
|
AD7606_CHANNEL(12),
|
|
|
|
AD7606_CHANNEL(13),
|
|
|
|
AD7606_CHANNEL(14),
|
|
|
|
AD7606_CHANNEL(15),
|
|
|
|
};
|
|
|
|
|
2011-02-22 20:46:18 +00:00
|
|
|
static const struct ad7606_chip_info ad7606_chip_info_tbl[] = {
|
2018-12-17 12:23:38 +00:00
|
|
|
/* More devices added in future */
|
2018-09-13 11:02:12 +00:00
|
|
|
[ID_AD7605_4] = {
|
|
|
|
.channels = ad7605_channels,
|
|
|
|
.num_channels = 5,
|
|
|
|
},
|
2011-02-22 20:46:18 +00:00
|
|
|
[ID_AD7606_8] = {
|
2016-02-05 10:32:34 +00:00
|
|
|
.channels = ad7606_channels,
|
|
|
|
.num_channels = 9,
|
2019-04-02 13:18:39 +00:00
|
|
|
.oversampling_avail = ad7606_oversampling_avail,
|
|
|
|
.oversampling_num = ARRAY_SIZE(ad7606_oversampling_avail),
|
2011-02-22 20:46:18 +00:00
|
|
|
},
|
|
|
|
[ID_AD7606_6] = {
|
2016-02-05 10:32:34 +00:00
|
|
|
.channels = ad7606_channels,
|
|
|
|
.num_channels = 7,
|
2019-04-02 13:18:39 +00:00
|
|
|
.oversampling_avail = ad7606_oversampling_avail,
|
|
|
|
.oversampling_num = ARRAY_SIZE(ad7606_oversampling_avail),
|
2011-02-22 20:46:18 +00:00
|
|
|
},
|
|
|
|
[ID_AD7606_4] = {
|
2016-02-05 10:32:34 +00:00
|
|
|
.channels = ad7606_channels,
|
|
|
|
.num_channels = 5,
|
2019-04-02 13:18:39 +00:00
|
|
|
.oversampling_avail = ad7606_oversampling_avail,
|
|
|
|
.oversampling_num = ARRAY_SIZE(ad7606_oversampling_avail),
|
2011-02-22 20:46:18 +00:00
|
|
|
},
|
2019-08-21 14:16:53 +00:00
|
|
|
[ID_AD7606B] = {
|
|
|
|
.channels = ad7606_channels,
|
|
|
|
.num_channels = 9,
|
|
|
|
.oversampling_avail = ad7606_oversampling_avail,
|
|
|
|
.oversampling_num = ARRAY_SIZE(ad7606_oversampling_avail),
|
|
|
|
},
|
2019-04-02 13:18:40 +00:00
|
|
|
[ID_AD7616] = {
|
|
|
|
.channels = ad7616_channels,
|
|
|
|
.num_channels = 17,
|
|
|
|
.oversampling_avail = ad7616_oversampling_avail,
|
|
|
|
.oversampling_num = ARRAY_SIZE(ad7616_oversampling_avail),
|
|
|
|
.os_req_reset = true,
|
2019-08-21 14:16:53 +00:00
|
|
|
.init_delay_ms = 15,
|
2019-04-02 13:18:40 +00:00
|
|
|
},
|
2011-02-22 20:46:18 +00:00
|
|
|
};
|
|
|
|
|
|
|
|
static int ad7606_request_gpios(struct ad7606_state *st)
|
|
|
|
{
|
2016-10-19 17:07:07 +00:00
|
|
|
struct device *dev = st->dev;
|
2011-02-22 20:46:18 +00:00
|
|
|
|
2018-12-13 12:46:19 +00:00
|
|
|
st->gpio_convst = devm_gpiod_get(dev, "adi,conversion-start",
|
2016-10-19 17:07:07 +00:00
|
|
|
GPIOD_OUT_LOW);
|
|
|
|
if (IS_ERR(st->gpio_convst))
|
|
|
|
return PTR_ERR(st->gpio_convst);
|
2011-02-22 20:46:18 +00:00
|
|
|
|
2016-10-19 17:07:07 +00:00
|
|
|
st->gpio_reset = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW);
|
|
|
|
if (IS_ERR(st->gpio_reset))
|
|
|
|
return PTR_ERR(st->gpio_reset);
|
2011-02-22 20:46:18 +00:00
|
|
|
|
2018-12-13 12:46:19 +00:00
|
|
|
st->gpio_range = devm_gpiod_get_optional(dev, "adi,range",
|
|
|
|
GPIOD_OUT_LOW);
|
2016-10-19 17:07:07 +00:00
|
|
|
if (IS_ERR(st->gpio_range))
|
|
|
|
return PTR_ERR(st->gpio_range);
|
2011-02-22 20:46:18 +00:00
|
|
|
|
2016-10-19 17:07:07 +00:00
|
|
|
st->gpio_standby = devm_gpiod_get_optional(dev, "standby",
|
|
|
|
GPIOD_OUT_HIGH);
|
|
|
|
if (IS_ERR(st->gpio_standby))
|
|
|
|
return PTR_ERR(st->gpio_standby);
|
2011-02-22 20:46:18 +00:00
|
|
|
|
2018-12-13 12:46:19 +00:00
|
|
|
st->gpio_frstdata = devm_gpiod_get_optional(dev, "adi,first-data",
|
2016-10-19 17:07:07 +00:00
|
|
|
GPIOD_IN);
|
|
|
|
if (IS_ERR(st->gpio_frstdata))
|
|
|
|
return PTR_ERR(st->gpio_frstdata);
|
2011-02-22 20:46:18 +00:00
|
|
|
|
2019-04-02 13:18:39 +00:00
|
|
|
if (!st->chip_info->oversampling_num)
|
2018-09-13 11:02:12 +00:00
|
|
|
return 0;
|
|
|
|
|
2018-12-13 12:46:19 +00:00
|
|
|
st->gpio_os = devm_gpiod_get_array_optional(dev,
|
|
|
|
"adi,oversampling-ratio",
|
2018-10-18 01:31:47 +00:00
|
|
|
GPIOD_OUT_LOW);
|
2016-10-22 19:12:42 +00:00
|
|
|
return PTR_ERR_OR_ZERO(st->gpio_os);
|
2011-02-22 20:46:18 +00:00
|
|
|
}
|
|
|
|
|
2018-12-17 12:23:37 +00:00
|
|
|
/*
|
|
|
|
* The BUSY signal indicates when conversions are in progress, so when a rising
|
|
|
|
* edge of CONVST is applied, BUSY goes logic high and transitions low at the
|
|
|
|
* end of the entire conversion process. The falling edge of the BUSY signal
|
|
|
|
* triggers this interrupt.
|
2011-02-22 20:46:18 +00:00
|
|
|
*/
|
|
|
|
static irqreturn_t ad7606_interrupt(int irq, void *dev_id)
|
|
|
|
{
|
2011-05-18 13:42:01 +00:00
|
|
|
struct iio_dev *indio_dev = dev_id;
|
|
|
|
struct ad7606_state *st = iio_priv(indio_dev);
|
2011-02-22 20:46:18 +00:00
|
|
|
|
2011-09-21 10:15:57 +00:00
|
|
|
if (iio_buffer_enabled(indio_dev)) {
|
2018-12-17 12:23:37 +00:00
|
|
|
gpiod_set_value(st->gpio_convst, 0);
|
|
|
|
iio_trigger_poll_chained(st->trig);
|
2011-02-22 20:46:18 +00:00
|
|
|
} else {
|
2018-12-13 12:46:15 +00:00
|
|
|
complete(&st->completion);
|
2011-02-22 20:46:18 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
return IRQ_HANDLED;
|
|
|
|
};
|
|
|
|
|
2018-12-17 12:23:37 +00:00
|
|
|
static int ad7606_validate_trigger(struct iio_dev *indio_dev,
|
|
|
|
struct iio_trigger *trig)
|
|
|
|
{
|
|
|
|
struct ad7606_state *st = iio_priv(indio_dev);
|
|
|
|
|
|
|
|
if (st->trig != trig)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int ad7606_buffer_postenable(struct iio_dev *indio_dev)
|
|
|
|
{
|
|
|
|
struct ad7606_state *st = iio_priv(indio_dev);
|
|
|
|
|
|
|
|
gpiod_set_value(st->gpio_convst, 1);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int ad7606_buffer_predisable(struct iio_dev *indio_dev)
|
|
|
|
{
|
|
|
|
struct ad7606_state *st = iio_priv(indio_dev);
|
|
|
|
|
|
|
|
gpiod_set_value(st->gpio_convst, 0);
|
|
|
|
|
2020-05-25 11:38:53 +00:00
|
|
|
return 0;
|
2018-12-17 12:23:37 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static const struct iio_buffer_setup_ops ad7606_buffer_ops = {
|
|
|
|
.postenable = &ad7606_buffer_postenable,
|
|
|
|
.predisable = &ad7606_buffer_predisable,
|
|
|
|
};
|
|
|
|
|
2012-01-29 11:07:03 +00:00
|
|
|
static const struct iio_info ad7606_info_no_os_or_range = {
|
2011-05-18 13:42:37 +00:00
|
|
|
.read_raw = &ad7606_read_raw,
|
2018-12-17 12:23:37 +00:00
|
|
|
.validate_trigger = &ad7606_validate_trigger,
|
2012-01-29 11:07:03 +00:00
|
|
|
};
|
|
|
|
|
|
|
|
static const struct iio_info ad7606_info_os_and_range = {
|
|
|
|
.read_raw = &ad7606_read_raw,
|
2016-10-08 16:05:40 +00:00
|
|
|
.write_raw = &ad7606_write_raw,
|
2012-01-29 11:07:03 +00:00
|
|
|
.attrs = &ad7606_attribute_group_os_and_range,
|
2018-12-17 12:23:37 +00:00
|
|
|
.validate_trigger = &ad7606_validate_trigger,
|
2012-01-29 11:07:03 +00:00
|
|
|
};
|
|
|
|
|
2019-07-18 06:27:34 +00:00
|
|
|
static const struct iio_info ad7606_info_os_range_and_debug = {
|
|
|
|
.read_raw = &ad7606_read_raw,
|
|
|
|
.write_raw = &ad7606_write_raw,
|
|
|
|
.debugfs_reg_access = &ad7606_reg_access,
|
|
|
|
.attrs = &ad7606_attribute_group_os_and_range,
|
|
|
|
.validate_trigger = &ad7606_validate_trigger,
|
|
|
|
};
|
|
|
|
|
2012-01-29 11:07:03 +00:00
|
|
|
static const struct iio_info ad7606_info_os = {
|
|
|
|
.read_raw = &ad7606_read_raw,
|
2016-10-08 16:05:40 +00:00
|
|
|
.write_raw = &ad7606_write_raw,
|
2012-01-29 11:07:03 +00:00
|
|
|
.attrs = &ad7606_attribute_group_os,
|
2018-12-17 12:23:37 +00:00
|
|
|
.validate_trigger = &ad7606_validate_trigger,
|
2012-01-29 11:07:03 +00:00
|
|
|
};
|
|
|
|
|
|
|
|
static const struct iio_info ad7606_info_range = {
|
|
|
|
.read_raw = &ad7606_read_raw,
|
2017-01-07 11:10:23 +00:00
|
|
|
.write_raw = &ad7606_write_raw,
|
2012-01-29 11:07:03 +00:00
|
|
|
.attrs = &ad7606_attribute_group_range,
|
2018-12-17 12:23:37 +00:00
|
|
|
.validate_trigger = &ad7606_validate_trigger,
|
|
|
|
};
|
|
|
|
|
|
|
|
static const struct iio_trigger_ops ad7606_trigger_ops = {
|
|
|
|
.validate_device = iio_trigger_validate_own_device,
|
2011-05-18 13:42:37 +00:00
|
|
|
};
|
|
|
|
|
2018-12-13 12:46:16 +00:00
|
|
|
static void ad7606_regulator_disable(void *data)
|
|
|
|
{
|
|
|
|
struct ad7606_state *st = data;
|
|
|
|
|
|
|
|
regulator_disable(st->reg);
|
|
|
|
}
|
|
|
|
|
2016-10-19 17:07:04 +00:00
|
|
|
int ad7606_probe(struct device *dev, int irq, void __iomem *base_address,
|
|
|
|
const char *name, unsigned int id,
|
|
|
|
const struct ad7606_bus_ops *bops)
|
2011-02-22 20:46:18 +00:00
|
|
|
{
|
|
|
|
struct ad7606_state *st;
|
2011-09-02 16:14:40 +00:00
|
|
|
int ret;
|
2013-08-31 17:12:00 +00:00
|
|
|
struct iio_dev *indio_dev;
|
2011-02-22 20:46:18 +00:00
|
|
|
|
2013-08-31 17:12:00 +00:00
|
|
|
indio_dev = devm_iio_device_alloc(dev, sizeof(*st));
|
|
|
|
if (!indio_dev)
|
2016-10-19 17:07:04 +00:00
|
|
|
return -ENOMEM;
|
2011-02-22 20:46:18 +00:00
|
|
|
|
2011-05-18 13:42:01 +00:00
|
|
|
st = iio_priv(indio_dev);
|
2018-12-13 12:46:16 +00:00
|
|
|
dev_set_drvdata(dev, indio_dev);
|
2011-05-18 13:42:01 +00:00
|
|
|
|
2011-02-22 20:46:18 +00:00
|
|
|
st->dev = dev;
|
2017-03-20 19:51:34 +00:00
|
|
|
mutex_init(&st->lock);
|
2011-02-22 20:46:18 +00:00
|
|
|
st->bops = bops;
|
|
|
|
st->base_address = base_address;
|
2017-01-07 11:10:23 +00:00
|
|
|
/* tied to logic low, analog input range is +/- 5V */
|
2019-05-27 12:56:47 +00:00
|
|
|
st->range[0] = 0;
|
2016-10-19 17:07:00 +00:00
|
|
|
st->oversampling = 1;
|
2019-04-02 13:18:39 +00:00
|
|
|
st->scale_avail = ad7606_scale_avail;
|
|
|
|
st->num_scales = ARRAY_SIZE(ad7606_scale_avail);
|
2011-02-22 20:46:18 +00:00
|
|
|
|
2016-10-20 13:08:22 +00:00
|
|
|
st->reg = devm_regulator_get(dev, "avcc");
|
2016-10-20 13:08:23 +00:00
|
|
|
if (IS_ERR(st->reg))
|
|
|
|
return PTR_ERR(st->reg);
|
|
|
|
|
|
|
|
ret = regulator_enable(st->reg);
|
|
|
|
if (ret) {
|
|
|
|
dev_err(dev, "Failed to enable specified AVcc supply\n");
|
|
|
|
return ret;
|
2011-02-22 20:46:18 +00:00
|
|
|
}
|
|
|
|
|
2018-12-13 12:46:16 +00:00
|
|
|
ret = devm_add_action_or_reset(dev, ad7606_regulator_disable, st);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
2018-09-13 11:02:12 +00:00
|
|
|
st->chip_info = &ad7606_chip_info_tbl[id];
|
|
|
|
|
2019-04-02 13:18:39 +00:00
|
|
|
if (st->chip_info->oversampling_num) {
|
|
|
|
st->oversampling_avail = st->chip_info->oversampling_avail;
|
|
|
|
st->num_os_ratios = st->chip_info->oversampling_num;
|
|
|
|
}
|
|
|
|
|
2016-10-19 17:07:07 +00:00
|
|
|
ret = ad7606_request_gpios(st);
|
|
|
|
if (ret)
|
2018-12-13 12:46:16 +00:00
|
|
|
return ret;
|
2016-10-19 17:07:07 +00:00
|
|
|
|
|
|
|
if (st->gpio_os) {
|
|
|
|
if (st->gpio_range)
|
2012-01-29 11:07:03 +00:00
|
|
|
indio_dev->info = &ad7606_info_os_and_range;
|
|
|
|
else
|
|
|
|
indio_dev->info = &ad7606_info_os;
|
|
|
|
} else {
|
2016-10-19 17:07:07 +00:00
|
|
|
if (st->gpio_range)
|
2012-01-29 11:07:03 +00:00
|
|
|
indio_dev->info = &ad7606_info_range;
|
|
|
|
else
|
|
|
|
indio_dev->info = &ad7606_info_no_os_or_range;
|
|
|
|
}
|
2011-05-18 13:42:01 +00:00
|
|
|
indio_dev->modes = INDIO_DIRECT_MODE;
|
2016-10-19 17:06:57 +00:00
|
|
|
indio_dev->name = name;
|
2011-05-18 13:42:01 +00:00
|
|
|
indio_dev->channels = st->chip_info->channels;
|
|
|
|
indio_dev->num_channels = st->chip_info->num_channels;
|
2011-02-22 20:46:18 +00:00
|
|
|
|
2018-12-13 12:46:15 +00:00
|
|
|
init_completion(&st->completion);
|
2011-02-22 20:46:18 +00:00
|
|
|
|
|
|
|
ret = ad7606_reset(st);
|
|
|
|
if (ret)
|
|
|
|
dev_warn(st->dev, "failed to RESET: no RESET GPIO specified\n");
|
|
|
|
|
2019-07-18 06:27:32 +00:00
|
|
|
/* AD7616 requires al least 15ms to reconfigure after a reset */
|
2019-08-21 14:16:53 +00:00
|
|
|
if (st->chip_info->init_delay_ms) {
|
|
|
|
if (msleep_interruptible(st->chip_info->init_delay_ms))
|
|
|
|
return -ERESTARTSYS;
|
|
|
|
}
|
2019-07-18 06:27:32 +00:00
|
|
|
|
2019-05-27 12:56:47 +00:00
|
|
|
st->write_scale = ad7606_write_scale_hw;
|
|
|
|
st->write_os = ad7606_write_os_hw;
|
|
|
|
|
2019-07-18 06:27:31 +00:00
|
|
|
if (st->bops->sw_mode_config)
|
2019-05-27 12:56:48 +00:00
|
|
|
st->sw_mode_en = device_property_present(st->dev,
|
|
|
|
"adi,sw-mode");
|
|
|
|
|
|
|
|
if (st->sw_mode_en) {
|
2019-07-18 06:27:33 +00:00
|
|
|
/* Scale of 0.076293 is only available in sw mode */
|
|
|
|
st->scale_avail = ad7616_sw_scale_avail;
|
|
|
|
st->num_scales = ARRAY_SIZE(ad7616_sw_scale_avail);
|
|
|
|
|
2019-05-27 12:56:48 +00:00
|
|
|
/* After reset, in software mode, ±10 V is set by default */
|
|
|
|
memset32(st->range, 2, ARRAY_SIZE(st->range));
|
2019-07-18 06:27:34 +00:00
|
|
|
indio_dev->info = &ad7606_info_os_range_and_debug;
|
2019-05-27 12:56:48 +00:00
|
|
|
|
2019-07-18 06:27:31 +00:00
|
|
|
ret = st->bops->sw_mode_config(indio_dev);
|
2019-05-27 12:56:48 +00:00
|
|
|
if (ret < 0)
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2018-12-17 12:23:37 +00:00
|
|
|
st->trig = devm_iio_trigger_alloc(dev, "%s-dev%d",
|
2021-04-26 17:49:03 +00:00
|
|
|
indio_dev->name,
|
|
|
|
iio_device_id(indio_dev));
|
2018-12-17 12:23:37 +00:00
|
|
|
if (!st->trig)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
st->trig->ops = &ad7606_trigger_ops;
|
|
|
|
iio_trigger_set_drvdata(st->trig, indio_dev);
|
|
|
|
ret = devm_iio_trigger_register(dev, st->trig);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
indio_dev->trig = iio_trigger_get(st->trig);
|
|
|
|
|
|
|
|
ret = devm_request_threaded_irq(dev, irq,
|
|
|
|
NULL,
|
|
|
|
&ad7606_interrupt,
|
|
|
|
IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
|
|
|
|
name, indio_dev);
|
2011-02-22 20:46:18 +00:00
|
|
|
if (ret)
|
2018-12-13 12:46:16 +00:00
|
|
|
return ret;
|
2011-02-22 20:46:18 +00:00
|
|
|
|
2018-12-13 12:46:16 +00:00
|
|
|
ret = devm_iio_triggered_buffer_setup(dev, indio_dev,
|
2018-12-17 12:23:37 +00:00
|
|
|
&iio_pollfunc_store_time,
|
2018-12-13 12:46:16 +00:00
|
|
|
&ad7606_trigger_handler,
|
2018-12-17 12:23:37 +00:00
|
|
|
&ad7606_buffer_ops);
|
2011-09-02 16:14:40 +00:00
|
|
|
if (ret)
|
2018-12-13 12:46:16 +00:00
|
|
|
return ret;
|
2011-02-22 20:46:18 +00:00
|
|
|
|
2018-12-13 12:46:16 +00:00
|
|
|
return devm_iio_device_register(dev, indio_dev);
|
2011-02-22 20:46:18 +00:00
|
|
|
}
|
2015-10-27 14:24:55 +00:00
|
|
|
EXPORT_SYMBOL_GPL(ad7606_probe);
|
2011-02-22 20:46:18 +00:00
|
|
|
|
2016-02-08 10:13:29 +00:00
|
|
|
#ifdef CONFIG_PM_SLEEP
|
|
|
|
|
|
|
|
static int ad7606_suspend(struct device *dev)
|
2011-02-22 20:46:18 +00:00
|
|
|
{
|
2016-02-08 10:13:29 +00:00
|
|
|
struct iio_dev *indio_dev = dev_get_drvdata(dev);
|
2011-05-18 13:42:01 +00:00
|
|
|
struct ad7606_state *st = iio_priv(indio_dev);
|
|
|
|
|
2016-10-19 17:07:07 +00:00
|
|
|
if (st->gpio_standby) {
|
|
|
|
gpiod_set_value(st->gpio_range, 1);
|
|
|
|
gpiod_set_value(st->gpio_standby, 0);
|
2011-02-22 20:46:18 +00:00
|
|
|
}
|
2016-02-08 10:13:29 +00:00
|
|
|
|
|
|
|
return 0;
|
2011-02-22 20:46:18 +00:00
|
|
|
}
|
|
|
|
|
2016-02-08 10:13:29 +00:00
|
|
|
static int ad7606_resume(struct device *dev)
|
2011-02-22 20:46:18 +00:00
|
|
|
{
|
2016-02-08 10:13:29 +00:00
|
|
|
struct iio_dev *indio_dev = dev_get_drvdata(dev);
|
2011-05-18 13:42:01 +00:00
|
|
|
struct ad7606_state *st = iio_priv(indio_dev);
|
|
|
|
|
2016-10-19 17:07:07 +00:00
|
|
|
if (st->gpio_standby) {
|
2019-05-27 12:56:47 +00:00
|
|
|
gpiod_set_value(st->gpio_range, st->range[0]);
|
2016-10-19 17:07:07 +00:00
|
|
|
gpiod_set_value(st->gpio_standby, 1);
|
2011-02-22 20:46:18 +00:00
|
|
|
ad7606_reset(st);
|
|
|
|
}
|
2016-02-08 10:13:29 +00:00
|
|
|
|
|
|
|
return 0;
|
2011-02-22 20:46:18 +00:00
|
|
|
}
|
2016-02-08 10:13:29 +00:00
|
|
|
|
|
|
|
SIMPLE_DEV_PM_OPS(ad7606_pm_ops, ad7606_suspend, ad7606_resume);
|
|
|
|
EXPORT_SYMBOL_GPL(ad7606_pm_ops);
|
|
|
|
|
|
|
|
#endif
|
2011-02-22 20:46:18 +00:00
|
|
|
|
2018-08-14 11:23:17 +00:00
|
|
|
MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>");
|
2011-02-22 20:46:18 +00:00
|
|
|
MODULE_DESCRIPTION("Analog Devices AD7606 ADC");
|
|
|
|
MODULE_LICENSE("GPL v2");
|