License cleanup: add SPDX GPL-2.0 license identifier to files with no license
Many source files in the tree are missing licensing information, which
makes it harder for compliance tools to determine the correct license.
By default all files without license information are under the default
license of the kernel, which is GPL version 2.
Update the files which contain no license information with the 'GPL-2.0'
SPDX license identifier. The SPDX identifier is a legally binding
shorthand, which can be used instead of the full boiler plate text.
This patch is based on work done by Thomas Gleixner and Kate Stewart and
Philippe Ombredanne.
How this work was done:
Patches were generated and checked against linux-4.14-rc6 for a subset of
the use cases:
- file had no licensing information it it.
- file was a */uapi/* one with no licensing information in it,
- file was a */uapi/* one with existing licensing information,
Further patches will be generated in subsequent months to fix up cases
where non-standard license headers were used, and references to license
had to be inferred by heuristics based on keywords.
The analysis to determine which SPDX License Identifier to be applied to
a file was done in a spreadsheet of side by side results from of the
output of two independent scanners (ScanCode & Windriver) producing SPDX
tag:value files created by Philippe Ombredanne. Philippe prepared the
base worksheet, and did an initial spot review of a few 1000 files.
The 4.13 kernel was the starting point of the analysis with 60,537 files
assessed. Kate Stewart did a file by file comparison of the scanner
results in the spreadsheet to determine which SPDX license identifier(s)
to be applied to the file. She confirmed any determination that was not
immediately clear with lawyers working with the Linux Foundation.
Criteria used to select files for SPDX license identifier tagging was:
- Files considered eligible had to be source code files.
- Make and config files were included as candidates if they contained >5
lines of source
- File already had some variant of a license header in it (even if <5
lines).
All documentation files were explicitly excluded.
The following heuristics were used to determine which SPDX license
identifiers to apply.
- when both scanners couldn't find any license traces, file was
considered to have no license information in it, and the top level
COPYING file license applied.
For non */uapi/* files that summary was:
SPDX license identifier # files
---------------------------------------------------|-------
GPL-2.0 11139
and resulted in the first patch in this series.
If that file was a */uapi/* path one, it was "GPL-2.0 WITH
Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was:
SPDX license identifier # files
---------------------------------------------------|-------
GPL-2.0 WITH Linux-syscall-note 930
and resulted in the second patch in this series.
- if a file had some form of licensing information in it, and was one
of the */uapi/* ones, it was denoted with the Linux-syscall-note if
any GPL family license was found in the file or had no licensing in
it (per prior point). Results summary:
SPDX license identifier # files
---------------------------------------------------|------
GPL-2.0 WITH Linux-syscall-note 270
GPL-2.0+ WITH Linux-syscall-note 169
((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21
((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17
LGPL-2.1+ WITH Linux-syscall-note 15
GPL-1.0+ WITH Linux-syscall-note 14
((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5
LGPL-2.0+ WITH Linux-syscall-note 4
LGPL-2.1 WITH Linux-syscall-note 3
((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3
((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1
and that resulted in the third patch in this series.
- when the two scanners agreed on the detected license(s), that became
the concluded license(s).
- when there was disagreement between the two scanners (one detected a
license but the other didn't, or they both detected different
licenses) a manual inspection of the file occurred.
- In most cases a manual inspection of the information in the file
resulted in a clear resolution of the license that should apply (and
which scanner probably needed to revisit its heuristics).
- When it was not immediately clear, the license identifier was
confirmed with lawyers working with the Linux Foundation.
- If there was any question as to the appropriate license identifier,
the file was flagged for further research and to be revisited later
in time.
In total, over 70 hours of logged manual review was done on the
spreadsheet to determine the SPDX license identifiers to apply to the
source files by Kate, Philippe, Thomas and, in some cases, confirmation
by lawyers working with the Linux Foundation.
Kate also obtained a third independent scan of the 4.13 code base from
FOSSology, and compared selected files where the other two scanners
disagreed against that SPDX file, to see if there was new insights. The
Windriver scanner is based on an older version of FOSSology in part, so
they are related.
Thomas did random spot checks in about 500 files from the spreadsheets
for the uapi headers and agreed with SPDX license identifier in the
files he inspected. For the non-uapi files Thomas did random spot checks
in about 15000 files.
In initial set of patches against 4.14-rc6, 3 files were found to have
copy/paste license identifier errors, and have been fixed to reflect the
correct identifier.
Additionally Philippe spent 10 hours this week doing a detailed manual
inspection and review of the 12,461 patched files from the initial patch
version early this week with:
- a full scancode scan run, collecting the matched texts, detected
license ids and scores
- reviewing anything where there was a license detected (about 500+
files) to ensure that the applied SPDX license was correct
- reviewing anything where there was no detection but the patch license
was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied
SPDX license was correct
This produced a worksheet with 20 files needing minor correction. This
worksheet was then exported into 3 different .csv files for the
different types of files to be modified.
These .csv files were then reviewed by Greg. Thomas wrote a script to
parse the csv files and add the proper SPDX tag to the file, in the
format that the file expected. This script was further refined by Greg
based on the output to detect more types of files automatically and to
distinguish between header and source .c files (which need different
comment types.) Finally Greg ran the script using the .csv files to
generate the patches.
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-11-01 14:07:57 +00:00
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/* SPDX-License-Identifier: GPL-2.0 */
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2008-06-19 18:26:19 +00:00
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#ifndef _SPARC64_CHMCTRL_H
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#define _SPARC64_CHMCTRL_H
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/* Cheetah memory controller programmable registers. */
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#define CHMCTRL_TCTRL1 0x00 /* Memory Timing Control I */
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#define CHMCTRL_TCTRL2 0x08 /* Memory Timing Control II */
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#define CHMCTRL_TCTRL3 0x38 /* Memory Timing Control III */
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#define CHMCTRL_TCTRL4 0x40 /* Memory Timing Control IV */
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#define CHMCTRL_DECODE1 0x10 /* Memory Address Decode I */
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#define CHMCTRL_DECODE2 0x18 /* Memory Address Decode II */
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#define CHMCTRL_DECODE3 0x20 /* Memory Address Decode III */
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#define CHMCTRL_DECODE4 0x28 /* Memory Address Decode IV */
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#define CHMCTRL_MACTRL 0x30 /* Memory Address Control */
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/* Memory Timing Control I */
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#define TCTRL1_SDRAMCTL_DLY 0xf000000000000000UL
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#define TCTRL1_SDRAMCTL_DLY_SHIFT 60
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#define TCTRL1_SDRAMCLK_DLY 0x0e00000000000000UL
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#define TCTRL1_SDRAMCLK_DLY_SHIFT 57
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#define TCTRL1_R 0x0100000000000000UL
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#define TCTRL1_R_SHIFT 56
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#define TCTRL1_AUTORFR_CYCLE 0x00fe000000000000UL
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#define TCTRL1_AUTORFR_CYCLE_SHIFT 49
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#define TCTRL1_RD_WAIT 0x0001f00000000000UL
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#define TCTRL1_RD_WAIT_SHIFT 44
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#define TCTRL1_PC_CYCLE 0x00000fc000000000UL
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#define TCTRL1_PC_CYCLE_SHIFT 38
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#define TCTRL1_WR_MORE_RAS_PW 0x0000003f00000000UL
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#define TCTRL1_WR_MORE_RAS_PW_SHIFT 32
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#define TCTRL1_RD_MORE_RAW_PW 0x00000000fc000000UL
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#define TCTRL1_RD_MORE_RAS_PW_SHIFT 26
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#define TCTRL1_ACT_WR_DLY 0x0000000003f00000UL
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#define TCTRL1_ACT_WR_DLY_SHIFT 20
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#define TCTRL1_ACT_RD_DLY 0x00000000000fc000UL
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#define TCTRL1_ACT_RD_DLY_SHIFT 14
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#define TCTRL1_BANK_PRESENT 0x0000000000003000UL
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#define TCTRL1_BANK_PRESENT_SHIFT 12
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#define TCTRL1_RFR_INT 0x0000000000000ff8UL
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#define TCTRL1_RFR_INT_SHIFT 3
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#define TCTRL1_SET_MODE_REG 0x0000000000000004UL
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#define TCTRL1_SET_MODE_REG_SHIFT 2
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#define TCTRL1_RFR_ENABLE 0x0000000000000002UL
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#define TCTRL1_RFR_ENABLE_SHIFT 1
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#define TCTRL1_PRECHG_ALL 0x0000000000000001UL
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#define TCTRL1_PRECHG_ALL_SHIFT 0
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/* Memory Timing Control II */
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#define TCTRL2_WR_MSEL_DLY 0xfc00000000000000UL
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#define TCTRL2_WR_MSEL_DLY_SHIFT 58
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#define TCTRL2_RD_MSEL_DLY 0x03f0000000000000UL
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#define TCTRL2_RD_MSEL_DLY_SHIFT 52
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#define TCTRL2_WRDATA_THLD 0x000c000000000000UL
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#define TCTRL2_WRDATA_THLD_SHIFT 50
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#define TCTRL2_RDWR_RD_TI_DLY 0x0003f00000000000UL
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#define TCTRL2_RDWR_RD_TI_DLY_SHIFT 44
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#define TCTRL2_AUTOPRECHG_ENBL 0x0000080000000000UL
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#define TCTRL2_AUTOPRECHG_ENBL_SHIFT 43
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#define TCTRL2_RDWR_PI_MORE_DLY 0x000007c000000000UL
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#define TCTRL2_RDWR_PI_MORE_DLY_SHIFT 38
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#define TCTRL2_RDWR_1_DLY 0x0000003f00000000UL
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#define TCTRL2_RDWR_1_DLY_SHIFT 32
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#define TCTRL2_WRWR_PI_MORE_DLY 0x00000000f8000000UL
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#define TCTRL2_WRWR_PI_MORE_DLY_SHIFT 27
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#define TCTRL2_WRWR_1_DLY 0x0000000007e00000UL
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#define TCTRL2_WRWR_1_DLY_SHIFT 21
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#define TCTRL2_RDWR_RD_PI_MORE_DLY 0x00000000001f0000UL
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#define TCTRL2_RDWR_RD_PI_MORE_DLY_SHIFT 16
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#define TCTRL2_R 0x0000000000008000UL
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#define TCTRL2_R_SHIFT 15
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#define TCTRL2_SDRAM_MODE_REG_DATA 0x0000000000007fffUL
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#define TCTRL2_SDRAM_MODE_REG_DATA_SHIFT 0
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/* Memory Timing Control III */
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#define TCTRL3_SDRAM_CTL_DLY 0xf000000000000000UL
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#define TCTRL3_SDRAM_CTL_DLY_SHIFT 60
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#define TCTRL3_SDRAM_CLK_DLY 0x0e00000000000000UL
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#define TCTRL3_SDRAM_CLK_DLY_SHIFT 57
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#define TCTRL3_R 0x0100000000000000UL
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#define TCTRL3_R_SHIFT 56
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#define TCTRL3_AUTO_RFR_CYCLE 0x00fe000000000000UL
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#define TCTRL3_AUTO_RFR_CYCLE_SHIFT 49
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#define TCTRL3_RD_WAIT 0x0001f00000000000UL
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#define TCTRL3_RD_WAIT_SHIFT 44
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#define TCTRL3_PC_CYCLE 0x00000fc000000000UL
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#define TCTRL3_PC_CYCLE_SHIFT 38
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#define TCTRL3_WR_MORE_RAW_PW 0x0000003f00000000UL
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#define TCTRL3_WR_MORE_RAW_PW_SHIFT 32
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#define TCTRL3_RD_MORE_RAW_PW 0x00000000fc000000UL
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#define TCTRL3_RD_MORE_RAW_PW_SHIFT 26
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#define TCTRL3_ACT_WR_DLY 0x0000000003f00000UL
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#define TCTRL3_ACT_WR_DLY_SHIFT 20
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#define TCTRL3_ACT_RD_DLY 0x00000000000fc000UL
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#define TCTRL3_ACT_RD_DLY_SHIFT 14
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#define TCTRL3_BANK_PRESENT 0x0000000000003000UL
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#define TCTRL3_BANK_PRESENT_SHIFT 12
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#define TCTRL3_RFR_INT 0x0000000000000ff8UL
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#define TCTRL3_RFR_INT_SHIFT 3
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#define TCTRL3_SET_MODE_REG 0x0000000000000004UL
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#define TCTRL3_SET_MODE_REG_SHIFT 2
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#define TCTRL3_RFR_ENABLE 0x0000000000000002UL
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#define TCTRL3_RFR_ENABLE_SHIFT 1
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#define TCTRL3_PRECHG_ALL 0x0000000000000001UL
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#define TCTRL3_PRECHG_ALL_SHIFT 0
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/* Memory Timing Control IV */
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#define TCTRL4_WR_MSEL_DLY 0xfc00000000000000UL
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#define TCTRL4_WR_MSEL_DLY_SHIFT 58
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#define TCTRL4_RD_MSEL_DLY 0x03f0000000000000UL
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#define TCTRL4_RD_MSEL_DLY_SHIFT 52
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#define TCTRL4_WRDATA_THLD 0x000c000000000000UL
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#define TCTRL4_WRDATA_THLD_SHIFT 50
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#define TCTRL4_RDWR_RD_RI_DLY 0x0003f00000000000UL
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#define TCTRL4_RDWR_RD_RI_DLY_SHIFT 44
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#define TCTRL4_AUTO_PRECHG_ENBL 0x0000080000000000UL
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#define TCTRL4_AUTO_PRECHG_ENBL_SHIFT 43
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#define TCTRL4_RD_WR_PI_MORE_DLY 0x000007c000000000UL
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#define TCTRL4_RD_WR_PI_MORE_DLY_SHIFT 38
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#define TCTRL4_RD_WR_TI_DLY 0x0000003f00000000UL
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#define TCTRL4_RD_WR_TI_DLY_SHIFT 32
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#define TCTRL4_WR_WR_PI_MORE_DLY 0x00000000f8000000UL
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#define TCTRL4_WR_WR_PI_MORE_DLY_SHIFT 27
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#define TCTRL4_WR_WR_TI_DLY 0x0000000007e00000UL
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#define TCTRL4_WR_WR_TI_DLY_SHIFT 21
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#define TCTRL4_RDWR_RD_PI_MORE_DLY 0x00000000001f000UL0
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#define TCTRL4_RDWR_RD_PI_MORE_DLY_SHIFT 16
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#define TCTRL4_R 0x0000000000008000UL
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#define TCTRL4_R_SHIFT 15
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#define TCTRL4_SDRAM_MODE_REG_DATA 0x0000000000007fffUL
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#define TCTRL4_SDRAM_MODE_REG_DATA_SHIFT 0
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/* All 4 memory address decoding registers have the
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* same layout.
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*/
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#define MEM_DECODE_VALID 0x8000000000000000UL /* Valid */
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#define MEM_DECODE_VALID_SHIFT 63
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#define MEM_DECODE_UK 0x001ffe0000000000UL /* Upper mask */
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#define MEM_DECODE_UK_SHIFT 41
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#define MEM_DECODE_UM 0x0000001ffff00000UL /* Upper match */
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#define MEM_DECODE_UM_SHIFT 20
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#define MEM_DECODE_LK 0x000000000003c000UL /* Lower mask */
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#define MEM_DECODE_LK_SHIFT 14
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#define MEM_DECODE_LM 0x0000000000000f00UL /* Lower match */
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#define MEM_DECODE_LM_SHIFT 8
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#define PA_UPPER_BITS 0x000007fffc000000UL
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#define PA_UPPER_BITS_SHIFT 26
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#define PA_LOWER_BITS 0x00000000000003c0UL
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#define PA_LOWER_BITS_SHIFT 6
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#define MACTRL_R0 0x8000000000000000UL
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#define MACTRL_R0_SHIFT 63
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#define MACTRL_ADDR_LE_PW 0x7000000000000000UL
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#define MACTRL_ADDR_LE_PW_SHIFT 60
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#define MACTRL_CMD_PW 0x0f00000000000000UL
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#define MACTRL_CMD_PW_SHIFT 56
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#define MACTRL_HALF_MODE_WR_MSEL_DLY 0x00fc000000000000UL
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#define MACTRL_HALF_MODE_WR_MSEL_DLY_SHIFT 50
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#define MACTRL_HALF_MODE_RD_MSEL_DLY 0x0003f00000000000UL
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#define MACTRL_HALF_MODE_RD_MSEL_DLY_SHIFT 44
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#define MACTRL_HALF_MODE_SDRAM_CTL_DLY 0x00000f0000000000UL
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#define MACTRL_HALF_MODE_SDRAM_CTL_DLY_SHIFT 40
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#define MACTRL_HALF_MODE_SDRAM_CLK_DLY 0x000000e000000000UL
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#define MACTRL_HALF_MODE_SDRAM_CLK_DLY_SHIFT 37
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#define MACTRL_R1 0x0000001000000000UL
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#define MACTRL_R1_SHIFT 36
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#define MACTRL_BANKSEL_N_ROWADDR_SIZE_B3 0x0000000f00000000UL
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#define MACTRL_BANKSEL_N_ROWADDR_SIZE_B3_SHIFT 32
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#define MACTRL_ENC_INTLV_B3 0x00000000f8000000UL
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#define MACTRL_ENC_INTLV_B3_SHIFT 27
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#define MACTRL_BANKSEL_N_ROWADDR_SIZE_B2 0x0000000007800000UL
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#define MACTRL_BANKSEL_N_ROWADDR_SIZE_B2_SHIFT 23
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#define MACTRL_ENC_INTLV_B2 0x00000000007c0000UL
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#define MACTRL_ENC_INTLV_B2_SHIFT 18
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#define MACTRL_BANKSEL_N_ROWADDR_SIZE_B1 0x000000000003c000UL
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#define MACTRL_BANKSEL_N_ROWADDR_SIZE_B1_SHIFT 14
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#define MACTRL_ENC_INTLV_B1 0x0000000000003e00UL
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#define MACTRL_ENC_INTLV_B1_SHIFT 9
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#define MACTRL_BANKSEL_N_ROWADDR_SIZE_B0 0x00000000000001e0UL
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#define MACTRL_BANKSEL_N_ROWADDR_SIZE_B0_SHIFT 5
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#define MACTRL_ENC_INTLV_B0 0x000000000000001fUL
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#define MACTRL_ENC_INTLV_B0_SHIFT 0
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#endif /* _SPARC64_CHMCTRL_H */
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