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staging: fsl-dpaa2/eth: Change max number of Tx queues

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We use DPAA2_ETH_MAX_TX_QUEUES to dimension the array holding
information on Tx queues. At most, we can have one queue per cpu.

Until now we used the NR_CPUS macro to set the upper limit on number
of Tx queues. However, the platforms that the DPAA2 Ethernet driver
supports have at most 16 cores, whereas NR_CPUS is Kconfigurable and
can be much higher.

Avoid allocating memory we'll never use, by setting
DPAA2_ETH_MAX_TX_QUEUES to 16. Same for DPAA2_ETH_MAX_DPCONS.

Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Ioana Radulescu 2018-03-23 08:44:13 -05:00 committed by Greg Kroah-Hartman
parent fa722c0039
commit 009749d731
1 changed files with 2 additions and 2 deletions
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4
drivers/staging/fsl-dpaa2/ethernet/dpaa2-eth.h
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@ -251,11 +251,11 @@ struct dpaa2_eth_ch_stats {
/* Maximum number of queues associated with a DPNI */
#define DPAA2_ETH_MAX_RX_QUEUES 16
#define DPAA2_ETH_MAX_TX_QUEUES NR_CPUS
#define DPAA2_ETH_MAX_TX_QUEUES 16
#define DPAA2_ETH_MAX_QUEUES (DPAA2_ETH_MAX_RX_QUEUES + \
DPAA2_ETH_MAX_TX_QUEUES)
#define DPAA2_ETH_MAX_DPCONS NR_CPUS
#define DPAA2_ETH_MAX_DPCONS 16
enum dpaa2_eth_fq_type {
DPAA2_RX_FQ = 0,