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staging: fsl-dpaa2/eth: Change max number of Tx queues
We use DPAA2_ETH_MAX_TX_QUEUES to dimension the array holding information on Tx queues. At most, we can have one queue per cpu. Until now we used the NR_CPUS macro to set the upper limit on number of Tx queues. However, the platforms that the DPAA2 Ethernet driver supports have at most 16 cores, whereas NR_CPUS is Kconfigurable and can be much higher. Avoid allocating memory we'll never use, by setting DPAA2_ETH_MAX_TX_QUEUES to 16. Same for DPAA2_ETH_MAX_DPCONS. Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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1 changed files with 2 additions and 2 deletions
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@ -251,11 +251,11 @@ struct dpaa2_eth_ch_stats {
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/* Maximum number of queues associated with a DPNI */
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#define DPAA2_ETH_MAX_RX_QUEUES 16
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#define DPAA2_ETH_MAX_TX_QUEUES NR_CPUS
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#define DPAA2_ETH_MAX_TX_QUEUES 16
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#define DPAA2_ETH_MAX_QUEUES (DPAA2_ETH_MAX_RX_QUEUES + \
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DPAA2_ETH_MAX_TX_QUEUES)
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#define DPAA2_ETH_MAX_DPCONS NR_CPUS
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#define DPAA2_ETH_MAX_DPCONS 16
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enum dpaa2_eth_fq_type {
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DPAA2_RX_FQ = 0,
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