mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-08-27 19:29:37 +00:00
wifi: mt76: mt7996: add wed reset support
Introduce the capability to reset mt7996 chipset if requested by wed driver. Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> Signed-off-by: Felix Fietkau <nbd@nbd.name>
This commit is contained in:
parent
d4b85aff3a
commit
00d2ced0de
5 changed files with 114 additions and 9 deletions
|
@ -854,10 +854,16 @@ mt76_dma_rx_reset(struct mt76_dev *dev, enum mt76_rxq_id qid)
|
|||
|
||||
/* reset WED rx queues */
|
||||
mt76_dma_wed_setup(dev, q, true);
|
||||
if (!mt76_queue_is_wed_tx_free(q)) {
|
||||
mt76_dma_sync_idx(dev, q);
|
||||
mt76_dma_rx_fill(dev, q, false);
|
||||
}
|
||||
|
||||
if (mt76_queue_is_wed_tx_free(q))
|
||||
return;
|
||||
|
||||
if (mtk_wed_device_active(&dev->mmio.wed) &&
|
||||
mt76_queue_is_wed_rro(q))
|
||||
return;
|
||||
|
||||
mt76_dma_sync_idx(dev, q);
|
||||
mt76_dma_rx_fill(dev, q, false);
|
||||
}
|
||||
|
||||
static void
|
||||
|
|
|
@ -621,21 +621,33 @@ void mt7996_dma_reset(struct mt7996_dev *dev, bool force)
|
|||
if (force)
|
||||
mt7996_wfsys_reset(dev);
|
||||
|
||||
if (dev->hif2 && mtk_wed_device_active(&dev->mt76.mmio.wed_hif2))
|
||||
mtk_wed_device_dma_reset(&dev->mt76.mmio.wed_hif2);
|
||||
|
||||
if (mtk_wed_device_active(&dev->mt76.mmio.wed))
|
||||
mtk_wed_device_dma_reset(&dev->mt76.mmio.wed);
|
||||
|
||||
mt7996_dma_disable(dev, force);
|
||||
mt76_dma_wed_reset(&dev->mt76);
|
||||
|
||||
/* reset hw queues */
|
||||
for (i = 0; i < __MT_TXQ_MAX; i++) {
|
||||
mt76_queue_reset(dev, dev->mphy.q_tx[i]);
|
||||
mt76_dma_reset_tx_queue(&dev->mt76, dev->mphy.q_tx[i]);
|
||||
if (phy2)
|
||||
mt76_queue_reset(dev, phy2->q_tx[i]);
|
||||
mt76_dma_reset_tx_queue(&dev->mt76, phy2->q_tx[i]);
|
||||
if (phy3)
|
||||
mt76_queue_reset(dev, phy3->q_tx[i]);
|
||||
mt76_dma_reset_tx_queue(&dev->mt76, phy3->q_tx[i]);
|
||||
}
|
||||
|
||||
for (i = 0; i < __MT_MCUQ_MAX; i++)
|
||||
mt76_queue_reset(dev, dev->mt76.q_mcu[i]);
|
||||
|
||||
mt76_for_each_q_rx(&dev->mt76, i) {
|
||||
if (mtk_wed_device_active(&dev->mt76.mmio.wed))
|
||||
if (mt76_queue_is_wed_rro(&dev->mt76.q_rx[i]) ||
|
||||
mt76_queue_is_wed_tx_free(&dev->mt76.q_rx[i]))
|
||||
continue;
|
||||
|
||||
mt76_queue_reset(dev, &dev->mt76.q_rx[i]);
|
||||
}
|
||||
|
||||
|
|
|
@ -1712,6 +1712,10 @@ mt7996_mac_restart(struct mt7996_dev *dev)
|
|||
/* disable all tx/rx napi */
|
||||
mt76_worker_disable(&dev->mt76.tx_worker);
|
||||
mt76_for_each_q_rx(mdev, i) {
|
||||
if (mtk_wed_device_active(&dev->mt76.mmio.wed) &&
|
||||
mt76_queue_is_wed_rro(&mdev->q_rx[i]))
|
||||
continue;
|
||||
|
||||
if (mdev->q_rx[i].ndesc)
|
||||
napi_disable(&dev->mt76.napi[i]);
|
||||
}
|
||||
|
@ -1725,6 +1729,10 @@ mt7996_mac_restart(struct mt7996_dev *dev)
|
|||
|
||||
local_bh_disable();
|
||||
mt76_for_each_q_rx(mdev, i) {
|
||||
if (mtk_wed_device_active(&dev->mt76.mmio.wed) &&
|
||||
mt76_queue_is_wed_rro(&mdev->q_rx[i]))
|
||||
continue;
|
||||
|
||||
if (mdev->q_rx[i].ndesc) {
|
||||
napi_enable(&dev->mt76.napi[i]);
|
||||
napi_schedule(&dev->mt76.napi[i]);
|
||||
|
@ -1896,6 +1904,13 @@ void mt7996_mac_reset_work(struct work_struct *work)
|
|||
|
||||
dev_info(dev->mt76.dev,"\n%s L1 SER recovery start.",
|
||||
wiphy_name(dev->mt76.hw->wiphy));
|
||||
|
||||
if (mtk_wed_device_active(&dev->mt76.mmio.wed_hif2))
|
||||
mtk_wed_device_stop(&dev->mt76.mmio.wed_hif2);
|
||||
|
||||
if (mtk_wed_device_active(&dev->mt76.mmio.wed))
|
||||
mtk_wed_device_stop(&dev->mt76.mmio.wed);
|
||||
|
||||
ieee80211_stop_queues(mt76_hw(dev));
|
||||
if (phy2)
|
||||
ieee80211_stop_queues(phy2->mt76->hw);
|
||||
|
@ -1915,8 +1930,13 @@ void mt7996_mac_reset_work(struct work_struct *work)
|
|||
cancel_delayed_work_sync(&phy3->mt76->mac_work);
|
||||
}
|
||||
mt76_worker_disable(&dev->mt76.tx_worker);
|
||||
mt76_for_each_q_rx(&dev->mt76, i)
|
||||
mt76_for_each_q_rx(&dev->mt76, i) {
|
||||
if (mtk_wed_device_active(&dev->mt76.mmio.wed) &&
|
||||
mt76_queue_is_wed_rro(&dev->mt76.q_rx[i]))
|
||||
continue;
|
||||
|
||||
napi_disable(&dev->mt76.napi[i]);
|
||||
}
|
||||
napi_disable(&dev->mt76.tx_napi);
|
||||
|
||||
mutex_lock(&dev->mt76.mutex);
|
||||
|
@ -1939,6 +1959,27 @@ void mt7996_mac_reset_work(struct work_struct *work)
|
|||
/* enable DMA Tx/Tx and interrupt */
|
||||
mt7996_dma_start(dev, false, false);
|
||||
|
||||
if (mtk_wed_device_active(&dev->mt76.mmio.wed)) {
|
||||
u32 wed_irq_mask = MT_INT_RRO_RX_DONE | MT_INT_TX_DONE_BAND2 |
|
||||
dev->mt76.mmio.irqmask;
|
||||
|
||||
if (mtk_wed_get_rx_capa(&dev->mt76.mmio.wed))
|
||||
wed_irq_mask &= ~MT_INT_RX_DONE_RRO_IND;
|
||||
|
||||
mt76_wr(dev, MT_INT_MASK_CSR, wed_irq_mask);
|
||||
|
||||
mtk_wed_device_start_hw_rro(&dev->mt76.mmio.wed, wed_irq_mask,
|
||||
true);
|
||||
mt7996_irq_enable(dev, wed_irq_mask);
|
||||
mt7996_irq_disable(dev, 0);
|
||||
}
|
||||
|
||||
if (mtk_wed_device_active(&dev->mt76.mmio.wed_hif2)) {
|
||||
mt76_wr(dev, MT_INT_PCIE1_MASK_CSR, MT_INT_TX_RX_DONE_EXT);
|
||||
mtk_wed_device_start(&dev->mt76.mmio.wed_hif2,
|
||||
MT_INT_TX_RX_DONE_EXT);
|
||||
}
|
||||
|
||||
clear_bit(MT76_MCU_RESET, &dev->mphy.state);
|
||||
clear_bit(MT76_RESET, &dev->mphy.state);
|
||||
if (phy2)
|
||||
|
@ -1948,6 +1989,10 @@ void mt7996_mac_reset_work(struct work_struct *work)
|
|||
|
||||
local_bh_disable();
|
||||
mt76_for_each_q_rx(&dev->mt76, i) {
|
||||
if (mtk_wed_device_active(&dev->mt76.mmio.wed) &&
|
||||
mt76_queue_is_wed_rro(&dev->mt76.q_rx[i]))
|
||||
continue;
|
||||
|
||||
napi_enable(&dev->mt76.napi[i]);
|
||||
napi_schedule(&dev->mt76.napi[i]);
|
||||
}
|
||||
|
|
|
@ -6,9 +6,11 @@
|
|||
#include <linux/kernel.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/pci.h>
|
||||
#include <linux/rtnetlink.h>
|
||||
|
||||
#include "mt7996.h"
|
||||
#include "mac.h"
|
||||
#include "mcu.h"
|
||||
#include "../trace.h"
|
||||
#include "../dma.h"
|
||||
|
||||
|
@ -195,6 +197,37 @@ static u32 mt7996_rmw(struct mt76_dev *mdev, u32 offset, u32 mask, u32 val)
|
|||
return dev->bus_ops->rmw(mdev, __mt7996_reg_addr(dev, offset), mask, val);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_NET_MEDIATEK_SOC_WED
|
||||
static int mt7996_mmio_wed_reset(struct mtk_wed_device *wed)
|
||||
{
|
||||
struct mt76_dev *mdev = container_of(wed, struct mt76_dev, mmio.wed);
|
||||
struct mt7996_dev *dev = container_of(mdev, struct mt7996_dev, mt76);
|
||||
struct mt76_phy *mphy = &dev->mphy;
|
||||
int ret;
|
||||
|
||||
ASSERT_RTNL();
|
||||
|
||||
if (test_and_set_bit(MT76_STATE_WED_RESET, &mphy->state))
|
||||
return -EBUSY;
|
||||
|
||||
ret = mt7996_mcu_set_ser(dev, UNI_CMD_SER_TRIGGER, UNI_CMD_SER_SET_RECOVER_L1,
|
||||
mphy->band_idx);
|
||||
if (ret)
|
||||
goto out;
|
||||
|
||||
rtnl_unlock();
|
||||
if (!wait_for_completion_timeout(&mdev->mmio.wed_reset, 20 * HZ)) {
|
||||
dev_err(mdev->dev, "wed reset timeout\n");
|
||||
ret = -ETIMEDOUT;
|
||||
}
|
||||
rtnl_lock();
|
||||
out:
|
||||
clear_bit(MT76_STATE_WED_RESET, &mphy->state);
|
||||
|
||||
return ret;
|
||||
}
|
||||
#endif
|
||||
|
||||
int mt7996_mmio_wed_init(struct mt7996_dev *dev, void *pdev_ptr,
|
||||
bool hif2, int *irq)
|
||||
{
|
||||
|
@ -311,6 +344,10 @@ int mt7996_mmio_wed_init(struct mt7996_dev *dev, void *pdev_ptr,
|
|||
wed->wlan.release_rx_buf = mt76_mmio_wed_release_rx_buf;
|
||||
wed->wlan.offload_enable = mt76_mmio_wed_offload_enable;
|
||||
wed->wlan.offload_disable = mt76_mmio_wed_offload_disable;
|
||||
if (!hif2) {
|
||||
wed->wlan.reset = mt7996_mmio_wed_reset;
|
||||
wed->wlan.reset_complete = mt76_mmio_wed_reset_complete;
|
||||
}
|
||||
|
||||
if (mtk_wed_device_attach(wed))
|
||||
return 0;
|
||||
|
|
|
@ -455,8 +455,9 @@ enum base_rev {
|
|||
#define MT_INT_RX_DONE_WA_TRI BIT(3)
|
||||
#define MT_INT_RX_TXFREE_MAIN BIT(17)
|
||||
#define MT_INT_RX_TXFREE_TRI BIT(15)
|
||||
#define MT_INT_MCU_CMD BIT(29)
|
||||
#define MT_INT_RX_DONE_BAND2_EXT BIT(23)
|
||||
#define MT_INT_RX_TXFREE_EXT BIT(26)
|
||||
#define MT_INT_MCU_CMD BIT(29)
|
||||
|
||||
#define MT_INT_RX_DONE_RRO_BAND0 BIT(16)
|
||||
#define MT_INT_RX_DONE_RRO_BAND1 BIT(16)
|
||||
|
@ -506,6 +507,10 @@ enum base_rev {
|
|||
#define MT_INT_TX_DONE_BAND1 BIT(31)
|
||||
#define MT_INT_TX_DONE_BAND2 BIT(15)
|
||||
|
||||
#define MT_INT_TX_RX_DONE_EXT (MT_INT_TX_DONE_BAND2 | \
|
||||
MT_INT_RX_DONE_BAND2_EXT | \
|
||||
MT_INT_RX_TXFREE_EXT)
|
||||
|
||||
#define MT_INT_TX_DONE_MCU (MT_INT_TX_MCU(MT_MCUQ_WA) | \
|
||||
MT_INT_TX_MCU(MT_MCUQ_WM) | \
|
||||
MT_INT_TX_MCU(MT_MCUQ_FWDL))
|
||||
|
|
Loading…
Reference in a new issue