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clk: rockchip: fix rk3288 clk_usbphy480m_gate bit location in register
According to rk3288 trm, the clk_usbphy480m_gate is located at bit 14 of CRU_CLKGATE5_CON register. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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@ -588,7 +588,7 @@ static struct rockchip_clk_branch rk3288_clk_branches[] __initdata = {
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COMPOSITE_NODIV(0, "usbphy480m_src", mux_usbphy480m_p, 0,
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RK3288_CLKSEL_CON(13), 11, 2, MFLAGS,
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RK3288_CLKGATE_CON(5), 15, GFLAGS),
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RK3288_CLKGATE_CON(5), 14, GFLAGS),
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COMPOSITE_NODIV(SCLK_HSICPHY480M, "sclk_hsicphy480m", mux_hsicphy480m_p, 0,
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RK3288_CLKSEL_CON(29), 0, 2, MFLAGS,
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RK3288_CLKGATE_CON(3), 6, GFLAGS),
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