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iommu/exynos: Fix master clock management for inactive SYSMMU
If SYSMMU controller is not active, there is no point in enabling master's clock just for doing the the of internal state. This patch moves enabling that clock to the block which actually does the register access. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
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0c2b063f18
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01324ab2c9
1 changed files with 4 additions and 5 deletions
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@ -524,16 +524,15 @@ static void sysmmu_tlb_invalidate_flpdcache(struct sysmmu_drvdata *data,
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{
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unsigned long flags;
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clk_enable(data->clk_master);
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spin_lock_irqsave(&data->lock, flags);
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if (is_sysmmu_active(data)) {
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if (data->version >= MAKE_MMU_VER(3, 3))
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__sysmmu_tlb_invalidate_entry(data, iova, 1);
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if (is_sysmmu_active(data) && data->version >= MAKE_MMU_VER(3, 3)) {
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clk_enable(data->clk_master);
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__sysmmu_tlb_invalidate_entry(data, iova, 1);
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clk_disable(data->clk_master);
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}
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spin_unlock_irqrestore(&data->lock, flags);
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clk_disable(data->clk_master);
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}
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static void sysmmu_tlb_invalidate_entry(struct sysmmu_drvdata *data,
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