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ARM: AM335x/AM437x: hwmod: Remove eQEP, ePWM and eCAP hwmod entries
Devices that utilize the OCP registers and/or PRCM registers and register bit fields should be modeled using hwmod. Since eQEP, ePWM and eCAP don't fall under this category, remove their hwmod entries. Instead these clocks simply use the clock that is passed through by its parent PWMSS. Therefore, PWMSS handles the clock for itself and its subdevices. Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com> Acked-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
This commit is contained in:
parent
078508f85e
commit
015d859193
5 changed files with 0 additions and 229 deletions
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@ -36,17 +36,8 @@ extern struct omap_hwmod_ocp_if am33xx_l4_per__gpio3;
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extern struct omap_hwmod_ocp_if am33xx_cpgmac0__mdio;
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extern struct omap_hwmod_ocp_if am33xx_l4_ls__elm;
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extern struct omap_hwmod_ocp_if am33xx_l4_ls__epwmss0;
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extern struct omap_hwmod_ocp_if am33xx_epwmss0__ecap0;
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extern struct omap_hwmod_ocp_if am33xx_epwmss0__eqep0;
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extern struct omap_hwmod_ocp_if am33xx_epwmss0__ehrpwm0;
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extern struct omap_hwmod_ocp_if am33xx_l4_ls__epwmss1;
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extern struct omap_hwmod_ocp_if am33xx_epwmss1__ecap1;
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extern struct omap_hwmod_ocp_if am33xx_epwmss1__eqep1;
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extern struct omap_hwmod_ocp_if am33xx_epwmss1__ehrpwm1;
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extern struct omap_hwmod_ocp_if am33xx_l4_ls__epwmss2;
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extern struct omap_hwmod_ocp_if am33xx_epwmss2__ecap2;
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extern struct omap_hwmod_ocp_if am33xx_epwmss2__eqep2;
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extern struct omap_hwmod_ocp_if am33xx_epwmss2__ehrpwm2;
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extern struct omap_hwmod_ocp_if am33xx_l3_s__gpmc;
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extern struct omap_hwmod_ocp_if am33xx_l4_per__i2c2;
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extern struct omap_hwmod_ocp_if am33xx_l4_per__i2c3;
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@ -98,17 +89,8 @@ extern struct omap_hwmod am33xx_dcan0_hwmod;
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extern struct omap_hwmod am33xx_dcan1_hwmod;
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extern struct omap_hwmod am33xx_elm_hwmod;
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extern struct omap_hwmod am33xx_epwmss0_hwmod;
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extern struct omap_hwmod am33xx_ecap0_hwmod;
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extern struct omap_hwmod am33xx_eqep0_hwmod;
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extern struct omap_hwmod am33xx_ehrpwm0_hwmod;
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extern struct omap_hwmod am33xx_epwmss1_hwmod;
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extern struct omap_hwmod am33xx_ecap1_hwmod;
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extern struct omap_hwmod am33xx_eqep1_hwmod;
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extern struct omap_hwmod am33xx_ehrpwm1_hwmod;
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extern struct omap_hwmod am33xx_epwmss2_hwmod;
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extern struct omap_hwmod am33xx_ecap2_hwmod;
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extern struct omap_hwmod am33xx_eqep2_hwmod;
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extern struct omap_hwmod am33xx_ehrpwm2_hwmod;
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extern struct omap_hwmod am33xx_gpio1_hwmod;
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extern struct omap_hwmod am33xx_gpio2_hwmod;
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extern struct omap_hwmod am33xx_gpio3_hwmod;
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@ -176,28 +176,6 @@ struct omap_hwmod_ocp_if am33xx_l4_ls__epwmss0 = {
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.user = OCP_USER_MPU,
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};
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struct omap_hwmod_ocp_if am33xx_epwmss0__ecap0 = {
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.master = &am33xx_epwmss0_hwmod,
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.slave = &am33xx_ecap0_hwmod,
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.clk = "l4ls_gclk",
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.user = OCP_USER_MPU,
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};
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struct omap_hwmod_ocp_if am33xx_epwmss0__eqep0 = {
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.master = &am33xx_epwmss0_hwmod,
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.slave = &am33xx_eqep0_hwmod,
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.clk = "l4ls_gclk",
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.user = OCP_USER_MPU,
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};
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struct omap_hwmod_ocp_if am33xx_epwmss0__ehrpwm0 = {
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.master = &am33xx_epwmss0_hwmod,
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.slave = &am33xx_ehrpwm0_hwmod,
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.clk = "l4ls_gclk",
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.user = OCP_USER_MPU,
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};
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static struct omap_hwmod_addr_space am33xx_epwmss1_addr_space[] = {
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{
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.pa_start = 0x48302000,
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@ -215,27 +193,6 @@ struct omap_hwmod_ocp_if am33xx_l4_ls__epwmss1 = {
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.user = OCP_USER_MPU,
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};
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struct omap_hwmod_ocp_if am33xx_epwmss1__ecap1 = {
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.master = &am33xx_epwmss1_hwmod,
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.slave = &am33xx_ecap1_hwmod,
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.clk = "l4ls_gclk",
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.user = OCP_USER_MPU,
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};
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struct omap_hwmod_ocp_if am33xx_epwmss1__eqep1 = {
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.master = &am33xx_epwmss1_hwmod,
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.slave = &am33xx_eqep1_hwmod,
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.clk = "l4ls_gclk",
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.user = OCP_USER_MPU,
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};
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struct omap_hwmod_ocp_if am33xx_epwmss1__ehrpwm1 = {
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.master = &am33xx_epwmss1_hwmod,
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.slave = &am33xx_ehrpwm1_hwmod,
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.clk = "l4ls_gclk",
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.user = OCP_USER_MPU,
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};
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static struct omap_hwmod_addr_space am33xx_epwmss2_addr_space[] = {
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{
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.pa_start = 0x48304000,
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@ -253,27 +210,6 @@ struct omap_hwmod_ocp_if am33xx_l4_ls__epwmss2 = {
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.user = OCP_USER_MPU,
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};
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struct omap_hwmod_ocp_if am33xx_epwmss2__ecap2 = {
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.master = &am33xx_epwmss2_hwmod,
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.slave = &am33xx_ecap2_hwmod,
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.clk = "l4ls_gclk",
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.user = OCP_USER_MPU,
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};
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struct omap_hwmod_ocp_if am33xx_epwmss2__eqep2 = {
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.master = &am33xx_epwmss2_hwmod,
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.slave = &am33xx_eqep2_hwmod,
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.clk = "l4ls_gclk",
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.user = OCP_USER_MPU,
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};
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struct omap_hwmod_ocp_if am33xx_epwmss2__ehrpwm2 = {
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.master = &am33xx_epwmss2_hwmod,
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.slave = &am33xx_ehrpwm2_hwmod,
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.clk = "l4ls_gclk",
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.user = OCP_USER_MPU,
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};
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/* l3s cfg -> gpmc */
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struct omap_hwmod_ocp_if am33xx_l3_s__gpmc = {
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.master = &am33xx_l3_s_hwmod,
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@ -449,18 +449,6 @@ struct omap_hwmod_class am33xx_epwmss_hwmod_class = {
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.sysc = &am33xx_epwmss_sysc,
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};
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static struct omap_hwmod_class am33xx_ecap_hwmod_class = {
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.name = "ecap",
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};
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static struct omap_hwmod_class am33xx_eqep_hwmod_class = {
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.name = "eqep",
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};
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struct omap_hwmod_class am33xx_ehrpwm_hwmod_class = {
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.name = "ehrpwm",
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};
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/* epwmss0 */
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struct omap_hwmod am33xx_epwmss0_hwmod = {
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.name = "epwmss0",
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@ -474,30 +462,6 @@ struct omap_hwmod am33xx_epwmss0_hwmod = {
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},
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};
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/* ecap0 */
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struct omap_hwmod am33xx_ecap0_hwmod = {
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.name = "ecap0",
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.class = &am33xx_ecap_hwmod_class,
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.clkdm_name = "l4ls_clkdm",
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.main_clk = "l4ls_gclk",
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};
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/* eqep0 */
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struct omap_hwmod am33xx_eqep0_hwmod = {
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.name = "eqep0",
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.class = &am33xx_eqep_hwmod_class,
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.clkdm_name = "l4ls_clkdm",
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.main_clk = "l4ls_gclk",
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};
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/* ehrpwm0 */
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struct omap_hwmod am33xx_ehrpwm0_hwmod = {
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.name = "ehrpwm0",
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.class = &am33xx_ehrpwm_hwmod_class,
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.clkdm_name = "l4ls_clkdm",
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.main_clk = "l4ls_gclk",
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};
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/* epwmss1 */
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struct omap_hwmod am33xx_epwmss1_hwmod = {
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.name = "epwmss1",
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@ -511,30 +475,6 @@ struct omap_hwmod am33xx_epwmss1_hwmod = {
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},
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};
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/* ecap1 */
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struct omap_hwmod am33xx_ecap1_hwmod = {
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.name = "ecap1",
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.class = &am33xx_ecap_hwmod_class,
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.clkdm_name = "l4ls_clkdm",
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.main_clk = "l4ls_gclk",
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};
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/* eqep1 */
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struct omap_hwmod am33xx_eqep1_hwmod = {
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.name = "eqep1",
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.class = &am33xx_eqep_hwmod_class,
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.clkdm_name = "l4ls_clkdm",
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.main_clk = "l4ls_gclk",
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};
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/* ehrpwm1 */
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struct omap_hwmod am33xx_ehrpwm1_hwmod = {
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.name = "ehrpwm1",
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.class = &am33xx_ehrpwm_hwmod_class,
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.clkdm_name = "l4ls_clkdm",
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.main_clk = "l4ls_gclk",
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};
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/* epwmss2 */
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struct omap_hwmod am33xx_epwmss2_hwmod = {
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.name = "epwmss2",
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@ -548,30 +488,6 @@ struct omap_hwmod am33xx_epwmss2_hwmod = {
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},
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};
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/* ecap2 */
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struct omap_hwmod am33xx_ecap2_hwmod = {
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.name = "ecap2",
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.class = &am33xx_ecap_hwmod_class,
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.clkdm_name = "l4ls_clkdm",
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.main_clk = "l4ls_gclk",
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};
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/* eqep2 */
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struct omap_hwmod am33xx_eqep2_hwmod = {
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.name = "eqep2",
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.class = &am33xx_eqep_hwmod_class,
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.clkdm_name = "l4ls_clkdm",
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.main_clk = "l4ls_gclk",
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};
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/* ehrpwm2 */
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struct omap_hwmod am33xx_ehrpwm2_hwmod = {
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.name = "ehrpwm2",
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.class = &am33xx_ehrpwm_hwmod_class,
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.clkdm_name = "l4ls_clkdm",
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.main_clk = "l4ls_gclk",
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};
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/*
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* 'gpio' class: for gpio 0,1,2,3
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*/
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@ -593,17 +593,8 @@ static struct omap_hwmod_ocp_if *am33xx_hwmod_ocp_ifs[] __initdata = {
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&am33xx_l4_ls__spinlock,
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&am33xx_l4_ls__elm,
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&am33xx_l4_ls__epwmss0,
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&am33xx_epwmss0__ecap0,
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&am33xx_epwmss0__eqep0,
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&am33xx_epwmss0__ehrpwm0,
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&am33xx_l4_ls__epwmss1,
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&am33xx_epwmss1__ecap1,
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&am33xx_epwmss1__eqep1,
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&am33xx_epwmss1__ehrpwm1,
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&am33xx_l4_ls__epwmss2,
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&am33xx_epwmss2__ecap2,
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&am33xx_epwmss2__eqep2,
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&am33xx_epwmss2__ehrpwm2,
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&am33xx_l3_s__gpmc,
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&am33xx_l3_main__lcdc,
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&am33xx_l4_ls__mcspi0,
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@ -202,13 +202,6 @@ static struct omap_hwmod am43xx_epwmss3_hwmod = {
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},
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};
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static struct omap_hwmod am43xx_ehrpwm3_hwmod = {
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.name = "ehrpwm3",
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.class = &am33xx_ehrpwm_hwmod_class,
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.clkdm_name = "l4ls_clkdm",
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.main_clk = "l4ls_gclk",
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};
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static struct omap_hwmod am43xx_epwmss4_hwmod = {
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.name = "epwmss4",
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.class = &am33xx_epwmss_hwmod_class,
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@ -222,13 +215,6 @@ static struct omap_hwmod am43xx_epwmss4_hwmod = {
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},
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};
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static struct omap_hwmod am43xx_ehrpwm4_hwmod = {
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.name = "ehrpwm4",
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.class = &am33xx_ehrpwm_hwmod_class,
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.clkdm_name = "l4ls_clkdm",
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.main_clk = "l4ls_gclk",
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};
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static struct omap_hwmod am43xx_epwmss5_hwmod = {
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.name = "epwmss5",
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.class = &am33xx_epwmss_hwmod_class,
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@ -242,13 +228,6 @@ static struct omap_hwmod am43xx_epwmss5_hwmod = {
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},
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};
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static struct omap_hwmod am43xx_ehrpwm5_hwmod = {
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.name = "ehrpwm5",
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.class = &am33xx_ehrpwm_hwmod_class,
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.clkdm_name = "l4ls_clkdm",
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.main_clk = "l4ls_gclk",
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};
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static struct omap_hwmod am43xx_spi2_hwmod = {
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.name = "spi2",
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.class = &am33xx_spi_hwmod_class,
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@ -744,13 +723,6 @@ static struct omap_hwmod_ocp_if am43xx_l4_ls__epwmss3 = {
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.user = OCP_USER_MPU,
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};
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static struct omap_hwmod_ocp_if am43xx_epwmss3__ehrpwm3 = {
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.master = &am43xx_epwmss3_hwmod,
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.slave = &am43xx_ehrpwm3_hwmod,
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.clk = "l4ls_gclk",
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.user = OCP_USER_MPU,
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};
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static struct omap_hwmod_ocp_if am43xx_l4_ls__epwmss4 = {
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.master = &am33xx_l4_ls_hwmod,
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.slave = &am43xx_epwmss4_hwmod,
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@ -758,13 +730,6 @@ static struct omap_hwmod_ocp_if am43xx_l4_ls__epwmss4 = {
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.user = OCP_USER_MPU,
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};
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static struct omap_hwmod_ocp_if am43xx_epwmss4__ehrpwm4 = {
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.master = &am43xx_epwmss4_hwmod,
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.slave = &am43xx_ehrpwm4_hwmod,
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.clk = "l4ls_gclk",
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.user = OCP_USER_MPU,
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};
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static struct omap_hwmod_ocp_if am43xx_l4_ls__epwmss5 = {
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.master = &am33xx_l4_ls_hwmod,
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.slave = &am43xx_epwmss5_hwmod,
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@ -772,13 +737,6 @@ static struct omap_hwmod_ocp_if am43xx_l4_ls__epwmss5 = {
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.user = OCP_USER_MPU,
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};
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static struct omap_hwmod_ocp_if am43xx_epwmss5__ehrpwm5 = {
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.master = &am43xx_epwmss5_hwmod,
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.slave = &am43xx_ehrpwm5_hwmod,
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.clk = "l4ls_gclk",
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.user = OCP_USER_MPU,
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};
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static struct omap_hwmod_ocp_if am43xx_l4_ls__mcspi2 = {
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.master = &am33xx_l4_ls_hwmod,
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.slave = &am43xx_spi2_hwmod,
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@ -919,11 +877,8 @@ static struct omap_hwmod_ocp_if *am43xx_hwmod_ocp_ifs[] __initdata = {
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&am43xx_l4_ls__timer10,
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&am43xx_l4_ls__timer11,
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&am43xx_l4_ls__epwmss3,
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&am43xx_epwmss3__ehrpwm3,
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&am43xx_l4_ls__epwmss4,
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&am43xx_epwmss4__ehrpwm4,
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&am43xx_l4_ls__epwmss5,
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&am43xx_epwmss5__ehrpwm5,
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&am43xx_l4_ls__mcspi2,
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&am43xx_l4_ls__mcspi3,
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&am43xx_l4_ls__mcspi4,
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@ -982,17 +937,8 @@ static struct omap_hwmod_ocp_if *am43xx_hwmod_ocp_ifs[] __initdata = {
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&am33xx_l4_ls__spinlock,
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&am33xx_l4_ls__elm,
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&am33xx_l4_ls__epwmss0,
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&am33xx_epwmss0__ecap0,
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&am33xx_epwmss0__eqep0,
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&am33xx_epwmss0__ehrpwm0,
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&am33xx_l4_ls__epwmss1,
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&am33xx_epwmss1__ecap1,
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&am33xx_epwmss1__eqep1,
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&am33xx_epwmss1__ehrpwm1,
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&am33xx_l4_ls__epwmss2,
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&am33xx_epwmss2__ecap2,
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&am33xx_epwmss2__eqep2,
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&am33xx_epwmss2__ehrpwm2,
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&am33xx_l3_s__gpmc,
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&am33xx_l4_ls__mcspi0,
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&am33xx_l4_ls__mcspi1,
|
||||
|
|
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Reference in a new issue