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drm/i915: Always wake the device to flush the GTT
Since we hold the device wakeref when writing through the GTT (otherwise the writes would fail), we presumed that before the device sleeps those writes would naturally be flushed and that we wouldn't need our mmio read trick. However, that presumption seems false and a sleepy bxt seems to require us to always manually flush the GTT writes prior to direct access. Fixes:e2a2aa36a5
("drm/i915: Check we have an wake device before flushing GTT writes") Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20170829192546.1087-1-chris@chris-wilson.co.uk (cherry picked from commitb69a784f5e
) Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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3b24e7e810
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1 changed files with 5 additions and 6 deletions
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@ -695,12 +695,11 @@ flush_write_domain(struct drm_i915_gem_object *obj, unsigned int flush_domains)
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switch (obj->base.write_domain) {
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case I915_GEM_DOMAIN_GTT:
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if (INTEL_GEN(dev_priv) >= 6 && !HAS_LLC(dev_priv)) {
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if (intel_runtime_pm_get_if_in_use(dev_priv)) {
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spin_lock_irq(&dev_priv->uncore.lock);
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POSTING_READ_FW(RING_ACTHD(dev_priv->engine[RCS]->mmio_base));
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spin_unlock_irq(&dev_priv->uncore.lock);
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intel_runtime_pm_put(dev_priv);
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}
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intel_runtime_pm_get(dev_priv);
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spin_lock_irq(&dev_priv->uncore.lock);
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POSTING_READ_FW(RING_ACTHD(dev_priv->engine[RCS]->mmio_base));
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spin_unlock_irq(&dev_priv->uncore.lock);
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intel_runtime_pm_put(dev_priv);
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}
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intel_fb_obj_flush(obj,
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