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cxl/pci: Fix appropriate checking for _OSC while handling CXL RAS registers

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cxl_pci fails to unmask CXL protocol errors when CXL memory error reporting
is not granted native control. Given that CXL memory error reporting uses
the event interface and protocol errors use AER, unmask protocol errors
based only on the native AER setting. Without this change end user
deployments will fail to report protocol errors in the case where native
memory error handling is not granted to Linux.

Also, return zero instead of an error code to not block the communication
with the cxl device when in native memory error reporting mode.

Fixes: 248529edc8 ("cxl: add RAS status unmasking for CXL")
Cc: <stable@vger.kernel.org>
Signed-off-by: Smita Koralahalli <Smita.KoralahalliChannabasappa@amd.com>
Reviewed-by: Robert Richter <rrichter@amd.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Dave Jiang <dave.jiang@intel.com>
Link: https://lore.kernel.org/r/20230823234305.27333-2-Smita.KoralahalliChannabasappa@amd.com
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
This commit is contained in:
Smita Koralahalli 2023-08-23 23:43:03 +00:00 committed by Dan Williams
parent 0bb80ecc33
commit 0339dc39a5
1 changed files with 3 additions and 3 deletions
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6
drivers/cxl/pci.c
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@ -541,9 +541,9 @@ static int cxl_pci_ras_unmask(struct pci_dev *pdev)
return 0;
}
/* BIOS has CXL error control */
if (!host_bridge->native_cxl_error)
return -ENXIO;
/* BIOS has PCIe AER error control */
if (!host_bridge->native_aer)
return 0;
rc = pcie_capability_read_word(pdev, PCI_EXP_DEVCTL, &cap);
if (rc)