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https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
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sh64: Attempt to make reserved insn trap handler resemble C.
This has been long overdue. No functional changes. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This commit is contained in:
Paul Mundt
parent
5f857bce21
commit
0375a73c6f
1 changed files with 195 additions and 191 deletions
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@ -32,195 +32,6 @@
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#include <asm/pgtable.h>
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#include <asm/fpu.h>
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static void do_unhandled_exception(int trapnr, int signr, char *str, char *fn_name,
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unsigned long error_code, struct pt_regs *regs, struct task_struct *tsk);
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#define DO_ERROR(trapnr, signr, str, name, tsk) \
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asmlinkage void do_##name(unsigned long error_code, struct pt_regs *regs) \
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{ \
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do_unhandled_exception(trapnr, signr, str, __stringify(name), error_code, regs, current); \
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}
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DO_ERROR(13, SIGILL, "illegal slot instruction", illegal_slot_inst, current)
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DO_ERROR(87, SIGSEGV, "address error (exec)", address_error_exec, current)
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/* Implement misaligned load/store handling for kernel (and optionally for user
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mode too). Limitation : only SHmedia mode code is handled - there is no
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handling at all for misaligned accesses occurring in SHcompact code yet. */
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static int misaligned_fixup(struct pt_regs *regs);
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asmlinkage void do_address_error_load(unsigned long error_code, struct pt_regs *regs)
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{
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if (misaligned_fixup(regs) < 0) {
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do_unhandled_exception(7, SIGSEGV, "address error(load)",
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"do_address_error_load",
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error_code, regs, current);
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}
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return;
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}
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asmlinkage void do_address_error_store(unsigned long error_code, struct pt_regs *regs)
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{
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if (misaligned_fixup(regs) < 0) {
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do_unhandled_exception(8, SIGSEGV, "address error(store)",
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"do_address_error_store",
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error_code, regs, current);
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}
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return;
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}
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#if defined(CONFIG_SH64_ID2815_WORKAROUND)
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#define OPCODE_INVALID 0
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#define OPCODE_USER_VALID 1
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#define OPCODE_PRIV_VALID 2
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/* getcon/putcon - requires checking which control register is referenced. */
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#define OPCODE_CTRL_REG 3
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/* Table of valid opcodes for SHmedia mode.
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Form a 10-bit value by concatenating the major/minor opcodes i.e.
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opcode[31:26,20:16]. The 6 MSBs of this value index into the following
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array. The 4 LSBs select the bit-pair in the entry (bits 1:0 correspond to
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LSBs==4'b0000 etc). */
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static unsigned long shmedia_opcode_table[64] = {
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0x55554044,0x54445055,0x15141514,0x14541414,0x00000000,0x10001000,0x01110055,0x04050015,
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0x00000444,0xc0000000,0x44545515,0x40405555,0x55550015,0x10005555,0x55555505,0x04050000,
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0x00000555,0x00000404,0x00040445,0x15151414,0x00000000,0x00000000,0x00000000,0x00000000,
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0x00000055,0x40404444,0x00000404,0xc0009495,0x00000000,0x00000000,0x00000000,0x00000000,
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0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,
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0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,
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0x80005050,0x04005055,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,
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0x81055554,0x00000404,0x55555555,0x55555555,0x00000000,0x00000000,0x00000000,0x00000000
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};
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void do_reserved_inst(unsigned long error_code, struct pt_regs *regs)
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{
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/* Workaround SH5-101 cut2 silicon defect #2815 :
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in some situations, inter-mode branches from SHcompact -> SHmedia
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which should take ITLBMISS or EXECPROT exceptions at the target
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falsely take RESINST at the target instead. */
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unsigned long opcode = 0x6ff4fff0; /* guaranteed reserved opcode */
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unsigned long pc, aligned_pc;
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int get_user_error;
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int trapnr = 12;
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int signr = SIGILL;
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char *exception_name = "reserved_instruction";
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pc = regs->pc;
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if ((pc & 3) == 1) {
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/* SHmedia : check for defect. This requires executable vmas
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to be readable too. */
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aligned_pc = pc & ~3;
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if (!access_ok(VERIFY_READ, aligned_pc, sizeof(unsigned long))) {
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get_user_error = -EFAULT;
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} else {
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get_user_error = __get_user(opcode, (unsigned long *)aligned_pc);
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}
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if (get_user_error >= 0) {
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unsigned long index, shift;
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unsigned long major, minor, combined;
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unsigned long reserved_field;
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reserved_field = opcode & 0xf; /* These bits are currently reserved as zero in all valid opcodes */
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major = (opcode >> 26) & 0x3f;
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minor = (opcode >> 16) & 0xf;
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combined = (major << 4) | minor;
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index = major;
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shift = minor << 1;
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if (reserved_field == 0) {
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int opcode_state = (shmedia_opcode_table[index] >> shift) & 0x3;
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switch (opcode_state) {
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case OPCODE_INVALID:
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/* Trap. */
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break;
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case OPCODE_USER_VALID:
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/* Restart the instruction : the branch to the instruction will now be from an RTE
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not from SHcompact so the silicon defect won't be triggered. */
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return;
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case OPCODE_PRIV_VALID:
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if (!user_mode(regs)) {
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/* Should only ever get here if a module has
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SHcompact code inside it. If so, the same fix up is needed. */
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return; /* same reason */
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}
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/* Otherwise, user mode trying to execute a privileged instruction -
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fall through to trap. */
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break;
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case OPCODE_CTRL_REG:
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/* If in privileged mode, return as above. */
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if (!user_mode(regs)) return;
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/* In user mode ... */
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if (combined == 0x9f) { /* GETCON */
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unsigned long regno = (opcode >> 20) & 0x3f;
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if (regno >= 62) {
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return;
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}
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/* Otherwise, reserved or privileged control register, => trap */
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} else if (combined == 0x1bf) { /* PUTCON */
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unsigned long regno = (opcode >> 4) & 0x3f;
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if (regno >= 62) {
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return;
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}
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/* Otherwise, reserved or privileged control register, => trap */
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} else {
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/* Trap */
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}
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break;
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default:
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/* Fall through to trap. */
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break;
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}
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}
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/* fall through to normal resinst processing */
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} else {
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/* Error trying to read opcode. This typically means a
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real fault, not a RESINST any more. So change the
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codes. */
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trapnr = 87;
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exception_name = "address error (exec)";
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signr = SIGSEGV;
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}
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}
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do_unhandled_exception(trapnr, signr, exception_name, "do_reserved_inst", error_code, regs, current);
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}
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#else /* CONFIG_SH64_ID2815_WORKAROUND */
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/* If the workaround isn't needed, this is just a straightforward reserved
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instruction */
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DO_ERROR(12, SIGILL, "reserved instruction", reserved_inst, current)
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#endif /* CONFIG_SH64_ID2815_WORKAROUND */
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/* Called with interrupts disabled */
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asmlinkage void do_exception_error(unsigned long ex, struct pt_regs *regs)
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{
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die_if_kernel("exception", regs, ex);
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}
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int do_unknown_trapa(unsigned long scId, struct pt_regs *regs)
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{
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/* Syscall debug */
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printk("System call ID error: [0x1#args:8 #syscall:16 0x%lx]\n", scId);
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die_if_kernel("unknown trapa", regs, scId);
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return -ENOSYS;
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}
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static void do_unhandled_exception(int trapnr, int signr, char *str, char *fn_name,
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unsigned long error_code, struct pt_regs *regs, struct task_struct *tsk)
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{
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if (user_mode(regs))
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force_sig(signr, tsk);
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die_if_no_fixup(str, regs, error_code);
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}
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static int read_opcode(reg_size_t pc, insn_size_t *result_opcode, int from_user_mode)
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{
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int get_user_error;
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@ -784,7 +595,201 @@ static int misaligned_fixup(struct pt_regs *regs)
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regs->pc += 4; /* Skip the instruction that's just been emulated */
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return 0;
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}
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}
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static void do_unhandled_exception(int signr, char *str, unsigned long error,
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struct pt_regs *regs)
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{
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if (user_mode(regs))
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force_sig(signr, current);
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die_if_no_fixup(str, regs, error);
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}
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#define DO_ERROR(signr, str, name) \
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asmlinkage void do_##name(unsigned long error_code, struct pt_regs *regs) \
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{ \
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do_unhandled_exception(signr, str, error_code, regs); \
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}
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DO_ERROR(SIGILL, "illegal slot instruction", illegal_slot_inst)
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DO_ERROR(SIGSEGV, "address error (exec)", address_error_exec)
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#if defined(CONFIG_SH64_ID2815_WORKAROUND)
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#define OPCODE_INVALID 0
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#define OPCODE_USER_VALID 1
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#define OPCODE_PRIV_VALID 2
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/* getcon/putcon - requires checking which control register is referenced. */
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#define OPCODE_CTRL_REG 3
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/* Table of valid opcodes for SHmedia mode.
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Form a 10-bit value by concatenating the major/minor opcodes i.e.
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opcode[31:26,20:16]. The 6 MSBs of this value index into the following
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array. The 4 LSBs select the bit-pair in the entry (bits 1:0 correspond to
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LSBs==4'b0000 etc). */
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static unsigned long shmedia_opcode_table[64] = {
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0x55554044,0x54445055,0x15141514,0x14541414,0x00000000,0x10001000,0x01110055,0x04050015,
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0x00000444,0xc0000000,0x44545515,0x40405555,0x55550015,0x10005555,0x55555505,0x04050000,
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0x00000555,0x00000404,0x00040445,0x15151414,0x00000000,0x00000000,0x00000000,0x00000000,
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0x00000055,0x40404444,0x00000404,0xc0009495,0x00000000,0x00000000,0x00000000,0x00000000,
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0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,
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0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,
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0x80005050,0x04005055,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,
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0x81055554,0x00000404,0x55555555,0x55555555,0x00000000,0x00000000,0x00000000,0x00000000
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};
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/* Workaround SH5-101 cut2 silicon defect #2815 :
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in some situations, inter-mode branches from SHcompact -> SHmedia
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which should take ITLBMISS or EXECPROT exceptions at the target
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falsely take RESINST at the target instead. */
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void do_reserved_inst(unsigned long error_code, struct pt_regs *regs)
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{
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insn_size_t opcode = 0x6ff4fff0; /* guaranteed reserved opcode */
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unsigned long pc, aligned_pc;
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unsigned long index, shift;
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unsigned long major, minor, combined;
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unsigned long reserved_field;
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int opcode_state;
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int get_user_error;
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int signr = SIGILL;
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char *exception_name = "reserved_instruction";
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pc = regs->pc;
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/* SHcompact is not handled */
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if (unlikely((pc & 3) == 0))
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goto out;
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/* SHmedia : check for defect. This requires executable vmas
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to be readable too. */
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aligned_pc = pc & ~3;
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if (!access_ok(VERIFY_READ, aligned_pc, sizeof(insn_size_t)))
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get_user_error = -EFAULT;
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else
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get_user_error = __get_user(opcode, (insn_size_t *)aligned_pc);
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if (get_user_error < 0) {
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/*
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* Error trying to read opcode. This typically means a
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* real fault, not a RESINST any more. So change the
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* codes.
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*/
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exception_name = "address error (exec)";
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signr = SIGSEGV;
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goto out;
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}
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/* These bits are currently reserved as zero in all valid opcodes */
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reserved_field = opcode & 0xf;
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if (unlikely(reserved_field))
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goto out; /* invalid opcode */
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major = (opcode >> 26) & 0x3f;
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minor = (opcode >> 16) & 0xf;
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combined = (major << 4) | minor;
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index = major;
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shift = minor << 1;
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opcode_state = (shmedia_opcode_table[index] >> shift) & 0x3;
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switch (opcode_state) {
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case OPCODE_INVALID:
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/* Trap. */
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break;
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case OPCODE_USER_VALID:
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/*
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* Restart the instruction: the branch to the instruction
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* will now be from an RTE not from SHcompact so the
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* silicon defect won't be triggered.
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*/
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return;
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case OPCODE_PRIV_VALID:
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if (!user_mode(regs)) {
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/*
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* Should only ever get here if a module has
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* SHcompact code inside it. If so, the same fix
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* up is needed.
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*/
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return; /* same reason */
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}
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/*
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* Otherwise, user mode trying to execute a privileged
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* instruction - fall through to trap.
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*/
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break;
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case OPCODE_CTRL_REG:
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/* If in privileged mode, return as above. */
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if (!user_mode(regs))
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return;
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/* In user mode ... */
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if (combined == 0x9f) { /* GETCON */
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unsigned long regno = (opcode >> 20) & 0x3f;
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if (regno >= 62)
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return;
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/* reserved/privileged control register => trap */
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} else if (combined == 0x1bf) { /* PUTCON */
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unsigned long regno = (opcode >> 4) & 0x3f;
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if (regno >= 62)
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return;
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/* reserved/privileged control register => trap */
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}
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break;
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default:
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/* Fall through to trap. */
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break;
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}
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out:
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do_unhandled_exception(signr, exception_name, error_code, regs);
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}
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#else /* CONFIG_SH64_ID2815_WORKAROUND */
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/* If the workaround isn't needed, this is just a straightforward reserved
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instruction */
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DO_ERROR(SIGILL, "reserved instruction", reserved_inst)
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#endif /* CONFIG_SH64_ID2815_WORKAROUND */
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/* Called with interrupts disabled */
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asmlinkage void do_exception_error(unsigned long ex, struct pt_regs *regs)
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{
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die_if_kernel("exception", regs, ex);
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}
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asmlinkage int do_unknown_trapa(unsigned long scId, struct pt_regs *regs)
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{
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/* Syscall debug */
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printk("System call ID error: [0x1#args:8 #syscall:16 0x%lx]\n", scId);
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die_if_kernel("unknown trapa", regs, scId);
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return -ENOSYS;
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}
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/* Implement misaligned load/store handling for kernel (and optionally for user
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mode too). Limitation : only SHmedia mode code is handled - there is no
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handling at all for misaligned accesses occurring in SHcompact code yet. */
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asmlinkage void do_address_error_load(unsigned long error_code, struct pt_regs *regs)
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{
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if (misaligned_fixup(regs) < 0)
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do_unhandled_exception(SIGSEGV, "address error(load)",
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error_code, regs);
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}
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asmlinkage void do_address_error_store(unsigned long error_code, struct pt_regs *regs)
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{
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if (misaligned_fixup(regs) < 0)
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do_unhandled_exception(SIGSEGV, "address error(store)",
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error_code, regs);
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}
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asmlinkage void do_debug_interrupt(unsigned long code, struct pt_regs *regs)
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@ -797,10 +802,9 @@ asmlinkage void do_debug_interrupt(unsigned long code, struct pt_regs *regs)
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of access we make to them - just go direct to their physical
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addresses. */
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exp_cause = peek_real_address_q(DM_EXP_CAUSE_PHY);
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if (exp_cause & ~4) {
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if (exp_cause & ~4)
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printk("DM.EXP_CAUSE had unexpected bits set (=%08lx)\n",
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(unsigned long)(exp_cause & 0xffffffff));
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}
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show_state();
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/* Clear all DEBUGINT causes */
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poke_real_address_q(DM_EXP_CAUSE_PHY, 0x0);
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