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drm: Nuke mode->vrefresh

Browse source 
Get rid of mode->vrefresh and just calculate it on demand. Saves
a bit of space and avoids the cached value getting out of sync
with reality.

Mostly done with cocci, with the following manual fixups:
- Remove the now empty loop in drm_helper_probe_single_connector_modes()
- Fix __MODE() macro in ch7006_mode.c
- Fix DRM_MODE_ARG() macro in drm_modes.h
- Remove leftover comment from samsung_s6d16d0_mode
- Drop the TODO

@@
@@
struct drm_display_mode {
	...
-	int vrefresh;
	...
};

@@
identifier N;
expression E;
@@
struct drm_display_mode N = {
-	.vrefresh = E
};

@@
identifier N;
expression E;
@@
struct drm_display_mode N[...] = {
...,
{
-	.vrefresh = E
}
,...
};

@@
expression E;
@@
{
	DRM_MODE(...),
-	.vrefresh = E,
}

@@
identifier M, R;
@@
int drm_mode_vrefresh(const struct drm_display_mode *M)
{
  ...
- if (M->vrefresh > 0)
- 	R = M->vrefresh;
- else
  if (...) {
  ...
  }
  ...
}

@@
struct drm_display_mode *p;
expression E;
@@
(
- p->vrefresh = E;
|
- p->vrefresh
+ drm_mode_vrefresh(p)
)

@@
struct drm_display_mode s;
expression E;
@@
(
- s.vrefresh = E;
|
- s.vrefresh
+ drm_mode_vrefresh(&s)
)

@@
expression E;
@@
- drm_mode_vrefresh(E) ? drm_mode_vrefresh(E) : drm_mode_vrefresh(E)
+ drm_mode_vrefresh(E)

@find_substruct@
identifier X;
identifier S;
@@
struct X {
...
	struct drm_display_mode S;
...
};

@@
identifier find_substruct.S;
expression E;
identifier I;
@@
{
.S = {
-	.vrefresh = E
}
}

@@
identifier find_substruct.S;
identifier find_substruct.X;
expression E;
identifier I;
@@
struct X I[...] = {
...,
.S = {
-	.vrefresh = E
}
,...
};

v2: Drop TODO
v3: Rebase
v4: Rebase

Cc: Andrzej Hajda <a.hajda@samsung.com>
Cc: Neil Armstrong <narmstrong@baylibre.com>
Cc: Laurent Pinchart <Laurent.pinchart@ideasonboard.com>
Cc: Jonas Karlman <jonas@kwiboo.se>
Cc: Jernej Skrabec <jernej.skrabec@siol.net>
Cc: Inki Dae <inki.dae@samsung.com>
Cc: Joonyoung Shim <jy0922.shim@samsung.com>
Cc: Seung-Woo Kim <sw0312.kim@samsung.com>
Cc: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: CK Hu <ck.hu@mediatek.com>
Cc: Philipp Zabel <p.zabel@pengutronix.de>
Cc: Ben Skeggs <bskeggs@redhat.com>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Sam Ravnborg <sam@ravnborg.org>
Cc: Jerry Han <hanxu5@huaqin.corp-partner.google.com>
Cc: Icenowy Zheng <icenowy@aosc.io>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Cc: Stefan Mavrodiev <stefan@olimex.com>
Cc: Robert Chiras <robert.chiras@nxp.com>
Cc: "Guido Günther" <agx@sigxcpu.org>
Cc: Purism Kernel Team <kernel@puri.sm>
Cc: Benjamin Gaignard <benjamin.gaignard@linaro.org>
Cc: Vincent Abriou <vincent.abriou@st.com>
Cc: VMware Graphics <linux-graphics-maintainer@vmware.com>
Cc: Thomas Hellstrom <thellstrom@vmware.com>
Cc: linux-amlogic@lists.infradead.org
Cc: nouveau@lists.freedesktop.org
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200428171940.19552-4-ville.syrjala@linux.intel.com
This commit is contained in:
Ville Syrjälä 2020-04-28 20:19:27 +03:00
parent 6770ef332f
commit 0425662fdf
68 changed files with 218 additions and 425 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

20
Documentation/gpu/todo.rst
View file

@ -327,26 +327,6 @@ Contact: Laurent Pinchart, Daniel Vetter
Level: Intermediate (mostly because it is a huge tasks without good partial
milestones, not technically itself that challenging)
Convert direct mode.vrefresh accesses to use drm_mode_vrefresh()
----------------------------------------------------------------
drm_display_mode.vrefresh isn't guaranteed to be populated. As such, using it
is risky and has been known to cause div-by-zero bugs. Fortunately, drm core
has helper which will use mode.vrefresh if it's !0 and will calculate it from
the timings when it's 0.
Use simple search/replace, or (more fun) cocci to replace instances of direct
vrefresh access with a call to the helper. Check out
https://lists.freedesktop.org/archives/dri-devel/2019-January/205186.html for
inspiration.
Once all instances of vrefresh have been converted, remove vrefresh from
drm_display_mode to avoid future use.
Contact: Sean Paul
Level: Starter
connector register/unregister fixes
-----------------------------------

2
drivers/gpu/drm/bridge/sii902x.c
View file

@ -360,7 +360,7 @@ static void sii902x_bridge_mode_set(struct drm_bridge *bridge,
buf[0] = pixel_clock_10kHz & 0xff;
buf[1] = pixel_clock_10kHz >> 8;
buf[2] = adj->vrefresh;
buf[2] = drm_mode_vrefresh(adj);
buf[3] = 0x00;
buf[4] = adj->hdisplay;
buf[5] = adj->hdisplay >> 8;

2
drivers/gpu/drm/drm_client_modeset.c
View file

@ -186,7 +186,7 @@ drm_connector_pick_cmdline_mode(struct drm_connector *connector)
continue;
if (cmdline_mode->refresh_specified) {
if (mode->vrefresh != cmdline_mode->refresh)
if (drm_mode_vrefresh(mode) != cmdline_mode->refresh)
continue;
}

328
drivers/gpu/drm/drm_edid.c
View file

File diff suppressed because it is too large Load diff

9
drivers/gpu/drm/drm_modes.c
View file

@ -759,9 +759,7 @@ int drm_mode_vrefresh(const struct drm_display_mode *mode)
{
int refresh = 0;
if (mode->vrefresh > 0)
refresh = mode->vrefresh;
else if (mode->htotal > 0 && mode->vtotal > 0) {
if (mode->htotal > 0 && mode->vtotal > 0) {
unsigned int num, den;
num = mode->clock * 1000;
@ -1308,7 +1306,7 @@ static int drm_mode_compare(void *priv, struct list_head *lh_a, struct list_head
if (diff)
return diff;
diff = b->vrefresh - a->vrefresh;
diff = drm_mode_vrefresh(b) - drm_mode_vrefresh(a);
if (diff)
return diff;
@ -1921,7 +1919,7 @@ void drm_mode_convert_to_umode(struct drm_mode_modeinfo *out,
out->vsync_end = in->vsync_end;
out->vtotal = in->vtotal;
out->vscan = in->vscan;
out->vrefresh = in->vrefresh;
out->vrefresh = drm_mode_vrefresh(in);
out->flags = in->flags;
out->type = in->type;
@ -1981,7 +1979,6 @@ int drm_mode_convert_umode(struct drm_device *dev,
out->vsync_end = in->vsync_end;
out->vtotal = in->vtotal;
out->vscan = in->vscan;
out->vrefresh = in->vrefresh;
out->flags = in->flags;
/*
* Old xf86-video-vmware (possibly others too) used to

3
drivers/gpu/drm/drm_probe_helper.c
View file

@ -534,9 +534,6 @@ int drm_helper_probe_single_connector_modes(struct drm_connector *connector,
if (list_empty(&connector->modes))
return 0;
list_for_each_entry(mode, &connector->modes, head)
mode->vrefresh = drm_mode_vrefresh(mode);
drm_mode_sort(&connector->modes);
DRM_DEBUG_KMS("[CONNECTOR:%d:%s] probed modes :\n", connector->base.id,

5
drivers/gpu/drm/exynos/exynos_hdmi.c
View file

@ -921,7 +921,8 @@ static int hdmi_mode_valid(struct drm_connector *connector,
DRM_DEV_DEBUG_KMS(hdata->dev,
"xres=%d, yres=%d, refresh=%d, intl=%d clock=%d\n",
mode->hdisplay, mode->vdisplay, mode->vrefresh,
mode->hdisplay, mode->vdisplay,
drm_mode_vrefresh(mode),
(mode->flags & DRM_MODE_FLAG_INTERLACE) ? true :
false, mode->clock * 1000);
@ -1020,7 +1021,7 @@ static bool hdmi_mode_fixup(struct drm_encoder *encoder,
DRM_DEV_DEBUG_KMS(dev->dev,
"Adjusted Mode: [%d]x[%d] [%d]Hz\n",
m->hdisplay, m->vdisplay,
m->vrefresh);
drm_mode_vrefresh(m));
drm_mode_copy(adjusted_mode, m);
break;

2
drivers/gpu/drm/exynos/exynos_mixer.c
View file

@ -1046,7 +1046,7 @@ static int mixer_mode_valid(struct exynos_drm_crtc *crtc,
u32 w = mode->hdisplay, h = mode->vdisplay;
DRM_DEV_DEBUG_KMS(ctx->dev, "xres=%d, yres=%d, refresh=%d, intl=%d\n",
w, h, mode->vrefresh,
w, h, drm_mode_vrefresh(mode),
!!(mode->flags & DRM_MODE_FLAG_INTERLACE));
if (ctx->mxr_ver == MXR_VER_128_0_0_184)

1
drivers/gpu/drm/i2c/ch7006_mode.c
View file

@ -121,7 +121,6 @@ const struct ch7006_tv_norm_info ch7006_tv_norms[] = {
.vscan = 0, \
.flags = DRM_MODE_FLAG_##hsynp##HSYNC | \
DRM_MODE_FLAG_##vsynp##VSYNC, \
.vrefresh = 0, \
}, \
.enc_hdisp = e_hd, \
.enc_vdisp = e_vd, \

1
drivers/gpu/drm/i915/display/intel_display.c
View file

@ -8891,7 +8891,6 @@ void intel_mode_from_pipe_config(struct drm_display_mode *mode,
mode->clock = pipe_config->hw.adjusted_mode.crtc_clock;
mode->vrefresh = drm_mode_vrefresh(mode);
drm_mode_set_name(mode);
}

4
drivers/gpu/drm/i915/display/intel_display_debugfs.c
View file

@ -1098,10 +1098,10 @@ static void drrs_status_per_crtc(struct seq_file *m,
seq_puts(m, "\n\t\t");
if (drrs->refresh_rate_type == DRRS_HIGH_RR) {
seq_puts(m, "DRRS_State: DRRS_HIGH_RR\n");
vrefresh = panel->fixed_mode->vrefresh;
vrefresh = drm_mode_vrefresh(panel->fixed_mode);
} else if (drrs->refresh_rate_type == DRRS_LOW_RR) {
seq_puts(m, "DRRS_State: DRRS_LOW_RR\n");
vrefresh = panel->downclock_mode->vrefresh;
vrefresh = drm_mode_vrefresh(panel->downclock_mode);
} else {
seq_printf(m, "DRRS_State: Unknown(%d)\n",
drrs->refresh_rate_type);

10
drivers/gpu/drm/i915/display/intel_dp.c
View file

@ -7356,7 +7356,7 @@ static void intel_dp_set_drrs_state(struct drm_i915_private *dev_priv,
return;
}
if (intel_dp->attached_connector->panel.downclock_mode->vrefresh ==
if (drm_mode_vrefresh(intel_dp->attached_connector->panel.downclock_mode) ==
refresh_rate)
index = DRRS_LOW_RR;
@ -7469,7 +7469,7 @@ void intel_edp_drrs_disable(struct intel_dp *intel_dp,
if (dev_priv->drrs.refresh_rate_type == DRRS_LOW_RR)
intel_dp_set_drrs_state(dev_priv, old_crtc_state,
intel_dp->attached_connector->panel.fixed_mode->vrefresh);
drm_mode_vrefresh(intel_dp->attached_connector->panel.fixed_mode));
dev_priv->drrs.dp = NULL;
mutex_unlock(&dev_priv->drrs.mutex);
@ -7502,7 +7502,7 @@ static void intel_edp_drrs_downclock_work(struct work_struct *work)
struct drm_crtc *crtc = dp_to_dig_port(intel_dp)->base.base.crtc;
intel_dp_set_drrs_state(dev_priv, to_intel_crtc(crtc)->config,
intel_dp->attached_connector->panel.downclock_mode->vrefresh);
drm_mode_vrefresh(intel_dp->attached_connector->panel.downclock_mode));
}
unlock:
@ -7548,7 +7548,7 @@ void intel_edp_drrs_invalidate(struct drm_i915_private *dev_priv,
/* invalidate means busy screen hence upclock */
if (frontbuffer_bits && dev_priv->drrs.refresh_rate_type == DRRS_LOW_RR)
intel_dp_set_drrs_state(dev_priv, to_intel_crtc(crtc)->config,
intel_dp->attached_connector->panel.fixed_mode->vrefresh);
drm_mode_vrefresh(intel_dp->attached_connector->panel.fixed_mode));
mutex_unlock(&dev_priv->drrs.mutex);
}
@ -7594,7 +7594,7 @@ void intel_edp_drrs_flush(struct drm_i915_private *dev_priv,
/* flush means busy screen hence upclock */
if (frontbuffer_bits && dev_priv->drrs.refresh_rate_type == DRRS_LOW_RR)
intel_dp_set_drrs_state(dev_priv, to_intel_crtc(crtc)->config,
intel_dp->attached_connector->panel.fixed_mode->vrefresh);
drm_mode_vrefresh(intel_dp->attached_connector->panel.fixed_mode));
/*
* flush also means no more activity hence schedule downclock, if all

3
drivers/gpu/drm/i915/display/intel_tv.c
View file

@ -1036,9 +1036,6 @@ intel_tv_mode_to_mode(struct drm_display_mode *mode,
/* TV has it's own notion of sync and other mode flags, so clear them. */
mode->flags = 0;
mode->vrefresh = 0;
mode->vrefresh = drm_mode_vrefresh(mode);
snprintf(mode->name, sizeof(mode->name),
"%dx%d%c (%s)",
mode->hdisplay, mode->vdisplay,

6
drivers/gpu/drm/mcde/mcde_dsi.c
View file

@ -538,7 +538,7 @@ static void mcde_dsi_setup_video_mode(struct mcde_dsi *d,
*/
/* (ps/s) / (pixels/s) = ps/pixels */
pclk = DIV_ROUND_UP_ULL(1000000000000,
(mode->vrefresh * mode->htotal * mode->vtotal));
(drm_mode_vrefresh(mode) * mode->htotal * mode->vtotal));
dev_dbg(d->dev, "picoseconds between two pixels: %llu\n",
pclk);
@ -568,7 +568,7 @@ static void mcde_dsi_setup_video_mode(struct mcde_dsi *d,
bpl *= d->mdsi->lanes;
dev_dbg(d->dev,
"calculated bytes per line: %llu @ %d Hz with HS %lu Hz\n",
bpl, mode->vrefresh, d->mdsi->hs_rate);
bpl, drm_mode_vrefresh(mode), d->mdsi->hs_rate);
/*
* 6 is header + checksum, header = 4 bytes, checksum = 2 bytes
@ -644,7 +644,7 @@ static void mcde_dsi_setup_video_mode(struct mcde_dsi *d,
dev_err(d->dev, "video block does not fit on line!\n");
dev_err(d->dev,
"calculated bytes per line: %llu @ %d Hz\n",
bpl, mode->vrefresh);
bpl, drm_mode_vrefresh(mode));
dev_err(d->dev,
"bytes per line (blkline_pck) %u bytes\n",
blkline_pck);

4
drivers/gpu/drm/mediatek/mtk_drm_crtc.c
View file

@ -164,7 +164,7 @@ static void mtk_drm_crtc_mode_set_nofb(struct drm_crtc *crtc)
state->pending_width = crtc->mode.hdisplay;
state->pending_height = crtc->mode.vdisplay;
state->pending_vrefresh = crtc->mode.vrefresh;
state->pending_vrefresh = drm_mode_vrefresh(&crtc->mode);
wmb(); /* Make sure the above parameters are set before update */
state->pending_config = true;
}
@ -263,7 +263,7 @@ static int mtk_crtc_ddp_hw_init(struct mtk_drm_crtc *mtk_crtc)
width = crtc->state->adjusted_mode.hdisplay;
height = crtc->state->adjusted_mode.vdisplay;
vrefresh = crtc->state->adjusted_mode.vrefresh;
vrefresh = drm_mode_vrefresh(&crtc->state->adjusted_mode);
drm_for_each_encoder(encoder, crtc->dev) {
if (encoder->crtc != crtc)

2
drivers/gpu/drm/mediatek/mtk_hdmi.c
View file

@ -1258,7 +1258,7 @@ static int mtk_hdmi_conn_mode_valid(struct drm_connector *conn,
struct drm_bridge *next_bridge;
dev_dbg(hdmi->dev, "xres=%d, yres=%d, refresh=%d, intl=%d clock=%d\n",
mode->hdisplay, mode->vdisplay, mode->vrefresh,
mode->hdisplay, mode->vdisplay, drm_mode_vrefresh(mode),
!!(mode->flags & DRM_MODE_FLAG_INTERLACE), mode->clock * 1000);
next_bridge = drm_bridge_get_next_bridge(&hdmi->bridge);

2
drivers/gpu/drm/meson/meson_venc_cvbs.c
View file

@ -48,7 +48,6 @@ struct meson_cvbs_mode meson_cvbs_modes[MESON_CVBS_MODES_COUNT] = {
DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 13500,
720, 732, 795, 864, 0, 576, 580, 586, 625, 0,
DRM_MODE_FLAG_INTERLACE),
.vrefresh = 50,
.picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3,
},
},
@ -58,7 +57,6 @@ struct meson_cvbs_mode meson_cvbs_modes[MESON_CVBS_MODES_COUNT] = {
DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 13500,
720, 739, 801, 858, 0, 480, 488, 494, 525, 0,
DRM_MODE_FLAG_INTERLACE),
.vrefresh = 60,
.picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3,
},
},

5
drivers/gpu/drm/nouveau/nouveau_connector.c
View file

@ -59,7 +59,6 @@ nouveau_conn_native_mode(struct drm_connector *connector)
int high_w = 0, high_h = 0, high_v = 0;
list_for_each_entry(mode, &connector->probed_modes, head) {
mode->vrefresh = drm_mode_vrefresh(mode);
if (helper->mode_valid(connector, mode) != MODE_OK ||
(mode->flags & DRM_MODE_FLAG_INTERLACE))
continue;
@ -80,12 +79,12 @@ nouveau_conn_native_mode(struct drm_connector *connector)
continue;
if (mode->hdisplay == high_w && mode->vdisplay == high_h &&
mode->vrefresh < high_v)
drm_mode_vrefresh(mode) < high_v)
continue;
high_w = mode->hdisplay;
high_h = mode->vdisplay;
high_v = mode->vrefresh;
high_v = drm_mode_vrefresh(mode);
largest = mode;
}

4
drivers/gpu/drm/panel/panel-arm-versatile.c
View file

@ -143,7 +143,6 @@ static const struct versatile_panel_type versatile_panels[] = {
.vsync_start = 240 + 5,
.vsync_end = 240 + 5 + 6,
.vtotal = 240 + 5 + 6 + 5,
.vrefresh = 116,
.flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC,
},
},
@ -167,7 +166,6 @@ static const struct versatile_panel_type versatile_panels[] = {
.vsync_start = 480 + 11,
.vsync_end = 480 + 11 + 2,
.vtotal = 480 + 11 + 2 + 32,
.vrefresh = 60,
.flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC,
},
},
@ -190,7 +188,6 @@ static const struct versatile_panel_type versatile_panels[] = {
.vsync_start = 220 + 0,
.vsync_end = 220 + 0 + 2,
.vtotal = 220 + 0 + 2 + 1,
.vrefresh = 390,
.flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC,
},
.bus_flags = DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE,
@ -214,7 +211,6 @@ static const struct versatile_panel_type versatile_panels[] = {
.vsync_start = 320 + 2,
.vsync_end = 320 + 2 + 2,
.vtotal = 320 + 2 + 2 + 2,
.vrefresh = 116,
.flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
},
.bus_flags = DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE,

1
drivers/gpu/drm/panel/panel-asus-z00t-tm5p5-n35596.c
View file

@ -183,7 +183,6 @@ static const struct drm_display_mode tm5p5_nt35596_mode = {
.vsync_start = 1920 + 4,
.vsync_end = 1920 + 4 + 2,
.vtotal = 1920 + 4 + 2 + 4,
.vrefresh = 60,
.width_mm = 68,
.height_mm = 121,
};

3
drivers/gpu/drm/panel/panel-boe-himax8279d.c
View file

@ -229,7 +229,7 @@ static int boe_panel_get_modes(struct drm_panel *panel,
mode = drm_mode_duplicate(connector->dev, m);
if (!mode) {
DRM_DEV_ERROR(pinfo->base.dev, "failed to add mode %ux%u@%u\n",
m->hdisplay, m->vdisplay, m->vrefresh);
m->hdisplay, m->vdisplay, drm_mode_vrefresh(m));
return -ENOMEM;
}
@ -262,7 +262,6 @@ static const struct drm_display_mode default_display_mode = {
.vsync_start = 1920 + 10,
.vsync_end = 1920 + 10 + 14,
.vtotal = 1920 + 10 + 14 + 4,
.vrefresh = 60,
};
/* 8 inch */

7
drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
View file

@ -594,7 +594,6 @@ static const struct drm_display_mode boe_tv101wum_nl6_default_mode = {
.vsync_start = 1920 + 10,
.vsync_end = 1920 + 10 + 14,
.vtotal = 1920 + 10 + 14 + 4,
.vrefresh = 60,
};
static const struct panel_desc boe_tv101wum_nl6_desc = {
@ -622,7 +621,6 @@ static const struct drm_display_mode auo_kd101n80_45na_default_mode = {
.vsync_start = 1920 + 16,
.vsync_end = 1920 + 16 + 4,
.vtotal = 1920 + 16 + 4 + 16,
.vrefresh = 60,
};
static const struct panel_desc auo_kd101n80_45na_desc = {
@ -650,7 +648,6 @@ static const struct drm_display_mode boe_tv101wum_n53_default_mode = {
.vsync_start = 1920 + 20,
.vsync_end = 1920 + 20 + 4,
.vtotal = 1920 + 20 + 4 + 10,
.vrefresh = 60,
.type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
};
@ -678,7 +675,6 @@ static const struct drm_display_mode auo_b101uan08_3_default_mode = {
.vsync_start = 1920 + 34,
.vsync_end = 1920 + 34 + 2,
.vtotal = 1920 + 34 + 2 + 24,
.vrefresh = 60,
.type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
};
@ -706,7 +702,6 @@ static const struct drm_display_mode boe_tv105wum_nw0_default_mode = {
.vsync_start = 1920 + 20,
.vsync_end = 1920 + 20 + 4,
.vtotal = 1920 + 20 + 4 + 10,
.vrefresh = 60,
.type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
};
@ -734,7 +729,7 @@ static int boe_panel_get_modes(struct drm_panel *panel,
mode = drm_mode_duplicate(connector->dev, m);
if (!mode) {
dev_err(panel->dev, "failed to add mode %ux%u@%u\n",
m->hdisplay, m->vdisplay, m->vrefresh);
m->hdisplay, m->vdisplay, drm_mode_vrefresh(m));
return -ENOMEM;
}

3
drivers/gpu/drm/panel/panel-elida-kd35t133.c
View file

@ -197,7 +197,6 @@ static const struct drm_display_mode default_mode = {
.vsync_start = 480 + 2,
.vsync_end = 480 + 2 + 1,
.vtotal = 480 + 2 + 1 + 2,
.vrefresh = 60,
.clock = 17000,
.width_mm = 42,
.height_mm = 82,
@ -213,7 +212,7 @@ static int kd35t133_get_modes(struct drm_panel *panel,
if (!mode) {
DRM_DEV_ERROR(ctx->dev, "Failed to add mode %ux%u@%u\n",
default_mode.hdisplay, default_mode.vdisplay,
default_mode.vrefresh);
drm_mode_vrefresh(&default_mode));
return -ENOMEM;
}

3
drivers/gpu/drm/panel/panel-feixin-k101-im2ba02.c
View file

@ -392,7 +392,6 @@ static int k101_im2ba02_unprepare(struct drm_panel *panel)
static const struct drm_display_mode k101_im2ba02_default_mode = {
.clock = 70000,
.vrefresh = 60,
.hdisplay = 800,
.hsync_start = 800 + 20,
@ -420,7 +419,7 @@ static int k101_im2ba02_get_modes(struct drm_panel *panel,
DRM_DEV_ERROR(&ctx->dsi->dev, "failed to add mode %ux%ux@%u\n",
k101_im2ba02_default_mode.hdisplay,
k101_im2ba02_default_mode.vdisplay,
k101_im2ba02_default_mode.vrefresh);
drm_mode_vrefresh(&k101_im2ba02_default_mode));
return -ENOMEM;
}

3
drivers/gpu/drm/panel/panel-feiyang-fy07024di26a30d.c
View file

@ -153,7 +153,6 @@ static const struct drm_display_mode feiyang_default_mode = {
.vsync_start = 600 + 12,
.vsync_end = 600 + 12 + 2,
.vtotal = 600 + 12 + 2 + 21,
.vrefresh = 60,
.type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
};
@ -169,7 +168,7 @@ static int feiyang_get_modes(struct drm_panel *panel,
DRM_DEV_ERROR(&ctx->dsi->dev, "failed to add mode %ux%ux@%u\n",
feiyang_default_mode.hdisplay,
feiyang_default_mode.vdisplay,
feiyang_default_mode.vrefresh);
drm_mode_vrefresh(&feiyang_default_mode));
return -ENOMEM;
}

7
drivers/gpu/drm/panel/panel-ilitek-ili9322.c
View file

@ -549,7 +549,6 @@ static const struct drm_display_mode srgb_320x240_mode = {
.vsync_start = 240 + 4,
.vsync_end = 240 + 4 + 1,
.vtotal = 262,
.vrefresh = 60,
.flags = 0,
};
@ -563,7 +562,6 @@ static const struct drm_display_mode srgb_360x240_mode = {
.vsync_start = 240 + 21,
.vsync_end = 240 + 21 + 1,
.vtotal = 262,
.vrefresh = 60,
.flags = 0,
};
@ -578,7 +576,6 @@ static const struct drm_display_mode prgb_320x240_mode = {
.vsync_start = 240 + 4,
.vsync_end = 240 + 4 + 1,
.vtotal = 262,
.vrefresh = 60,
.flags = 0,
};
@ -593,7 +590,6 @@ static const struct drm_display_mode yuv_640x320_mode = {
.vsync_start = 320 + 4,
.vsync_end = 320 + 4 + 1,
.vtotal = 320 + 4 + 1 + 18,
.vrefresh = 60,
.flags = 0,
};
@ -607,7 +603,6 @@ static const struct drm_display_mode yuv_720x360_mode = {
.vsync_start = 360 + 4,
.vsync_end = 360 + 4 + 1,
.vtotal = 360 + 4 + 1 + 18,
.vrefresh = 60,
.flags = 0,
};
@ -622,7 +617,6 @@ static const struct drm_display_mode itu_r_bt_656_640_mode = {
.vsync_start = 480 + 4,
.vsync_end = 480 + 4 + 1,
.vtotal = 500,
.vrefresh = 60,
.flags = 0,
};
@ -637,7 +631,6 @@ static const struct drm_display_mode itu_r_bt_656_720_mode = {
.vsync_start = 480 + 4,
.vsync_end = 480 + 4 + 1,
.vtotal = 500,
.vrefresh = 60,
.flags = 0,
};

3
drivers/gpu/drm/panel/panel-ilitek-ili9881c.c
View file

@ -370,7 +370,6 @@ static int ili9881c_unprepare(struct drm_panel *panel)
static const struct drm_display_mode bananapi_default_mode = {
.clock = 62000,
.vrefresh = 60,
.hdisplay = 720,
.hsync_start = 720 + 10,
@ -394,7 +393,7 @@ static int ili9881c_get_modes(struct drm_panel *panel,
dev_err(&ctx->dsi->dev, "failed to add mode %ux%ux@%u\n",
bananapi_default_mode.hdisplay,
bananapi_default_mode.vdisplay,
bananapi_default_mode.vrefresh);
drm_mode_vrefresh(&bananapi_default_mode));
return -ENOMEM;
}

4
drivers/gpu/drm/panel/panel-innolux-p079zca.c
View file

@ -223,7 +223,6 @@ static const struct drm_display_mode innolux_p079zca_mode = {
.vsync_start = 1024 + 20,
.vsync_end = 1024 + 20 + 4,
.vtotal = 1024 + 20 + 4 + 20,
.vrefresh = 60,
};
static const struct panel_desc innolux_p079zca_panel_desc = {
@ -257,7 +256,6 @@ static const struct drm_display_mode innolux_p097pfg_mode = {
.vsync_start = 2048 + 100,
.vsync_end = 2048 + 100 + 2,
.vtotal = 2048 + 100 + 2 + 18,
.vrefresh = 60,
};
/*
@ -401,7 +399,7 @@ static int innolux_panel_get_modes(struct drm_panel *panel,
mode = drm_mode_duplicate(connector->dev, m);
if (!mode) {
DRM_DEV_ERROR(panel->dev, "failed to add mode %ux%ux@%u\n",
m->hdisplay, m->vdisplay, m->vrefresh);
m->hdisplay, m->vdisplay, drm_mode_vrefresh(m));
return -ENOMEM;
}

3
drivers/gpu/drm/panel/panel-jdi-lt070me05000.c
View file

@ -296,7 +296,6 @@ static const struct drm_display_mode default_mode = {
.vsync_start = 1920 + 3,
.vsync_end = 1920 + 3 + 5,
.vtotal = 1920 + 3 + 5 + 6,
.vrefresh = 60,
.flags = 0,
};
@ -311,7 +310,7 @@ static int jdi_panel_get_modes(struct drm_panel *panel,
if (!mode) {
dev_err(dev, "failed to add mode %ux%ux@%u\n",
default_mode.hdisplay, default_mode.vdisplay,
default_mode.vrefresh);
drm_mode_vrefresh(&default_mode));
return -ENOMEM;
}

3
drivers/gpu/drm/panel/panel-kingdisplay-kd097d04.c
View file

@ -318,7 +318,6 @@ static const struct drm_display_mode default_mode = {
.vsync_start = 2048 + 95,
.vsync_end = 2048 + 95 + 2,
.vtotal = 2048 + 95 + 2 + 23,
.vrefresh = 60,
};
static int kingdisplay_panel_get_modes(struct drm_panel *panel,
@ -330,7 +329,7 @@ static int kingdisplay_panel_get_modes(struct drm_panel *panel,
if (!mode) {
DRM_DEV_ERROR(panel->dev, "failed to add mode %ux%ux@%u\n",
default_mode.hdisplay, default_mode.vdisplay,
default_mode.vrefresh);
drm_mode_vrefresh(&default_mode));
return -ENOMEM;
}

3
drivers/gpu/drm/panel/panel-leadtek-ltk500hd1829.c
View file

@ -376,7 +376,6 @@ static const struct drm_display_mode default_mode = {
.vsync_start = 1280 + 30,
.vsync_end = 1280 + 30 + 4,
.vtotal = 1280 + 30 + 4 + 12,
.vrefresh = 60,
.clock = 69217,
.width_mm = 62,
.height_mm = 110,
@ -392,7 +391,7 @@ static int ltk500hd1829_get_modes(struct drm_panel *panel,
if (!mode) {
DRM_DEV_ERROR(ctx->dev, "failed to add mode %ux%ux@%u\n",
default_mode.hdisplay, default_mode.vdisplay,
default_mode.vrefresh);
drm_mode_vrefresh(&default_mode));
return -ENOMEM;
}

1
drivers/gpu/drm/panel/panel-lg-lb035q02.c
View file

@ -134,7 +134,6 @@ static const struct drm_display_mode lb035q02_mode = {
.vsync_start = 240 + 4,
.vsync_end = 240 + 4 + 2,
.vtotal = 240 + 4 + 2 + 18,
.vrefresh = 60,
.type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
.flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
.width_mm = 70,

3
drivers/gpu/drm/panel/panel-lg-lg4573.c
View file

@ -206,7 +206,6 @@ static const struct drm_display_mode default_mode = {
.vsync_start = 800 + 15,
.vsync_end = 800 + 15 + 15,
.vtotal = 800 + 15 + 15 + 15,
.vrefresh = 60,
};
static int lg4573_get_modes(struct drm_panel *panel,
@ -218,7 +217,7 @@ static int lg4573_get_modes(struct drm_panel *panel,
if (!mode) {
dev_err(panel->dev, "failed to add mode %ux%ux@%u\n",
default_mode.hdisplay, default_mode.vdisplay,
default_mode.vrefresh);
drm_mode_vrefresh(&default_mode));
return -ENOMEM;
}

1
drivers/gpu/drm/panel/panel-nec-nl8048hl11.c
View file

@ -116,7 +116,6 @@ static const struct drm_display_mode nl8048_mode = {
.vsync_start = 480 + 3,
.vsync_end = 480 + 3 + 1,
.vtotal = 480 + 3 + 1 + 4,
.vrefresh = 60,
.type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
.flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
.width_mm = 89,

1
drivers/gpu/drm/panel/panel-novatek-nt35510.c
View file

@ -1028,7 +1028,6 @@ static const struct nt35510_config nt35510_hydis_hva40wv1 = {
.vsync_start = 800 + 2, /* VFP = 2 */
.vsync_end = 800 + 2 + 0, /* VSync = 0 */
.vtotal = 800 + 2 + 0 + 5, /* VBP = 5 */
.vrefresh = 60, /* Calculated */
.flags = 0,
},
/* 0x09: AVDD = 5.6V */

2
drivers/gpu/drm/panel/panel-novatek-nt39016.c
View file

@ -335,7 +335,6 @@ static const struct drm_display_mode kd035g6_display_modes[] = {
.vsync_start = 240 + 5,
.vsync_end = 240 + 5 + 1,
.vtotal = 240 + 5 + 1 + 4,
.vrefresh = 60,
.flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
},
{ /* 50 Hz */
@ -348,7 +347,6 @@ static const struct drm_display_mode kd035g6_display_modes[] = {
.vsync_start = 240 + 5,
.vsync_end = 240 + 5 + 1,
.vtotal = 240 + 5 + 1 + 4,
.vrefresh = 50,
.flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
},
};

1
drivers/gpu/drm/panel/panel-olimex-lcd-olinuxino.c
View file

@ -170,7 +170,6 @@ static int lcd_olinuxino_get_modes(struct drm_panel *panel,
lcd_mode->vpw;
mode->vtotal = lcd_mode->vactive + lcd_mode->vfp +
lcd_mode->vpw + lcd_mode->vbp;
mode->vrefresh = lcd_mode->refresh;
/* Always make the first mode preferred */
if (i == 0)

3
drivers/gpu/drm/panel/panel-orisetech-otm8009a.c
View file

@ -81,7 +81,6 @@ static const struct drm_display_mode default_mode = {
.vsync_start = 800 + 15,
.vsync_end = 800 + 15 + 10,
.vtotal = 800 + 15 + 10 + 14,
.vrefresh = 50,
.flags = 0,
.width_mm = 52,
.height_mm = 86,
@ -358,7 +357,7 @@ static int otm8009a_get_modes(struct drm_panel *panel,
if (!mode) {
DRM_ERROR("failed to add mode %ux%ux@%u\n",
default_mode.hdisplay, default_mode.vdisplay,
default_mode.vrefresh);
drm_mode_vrefresh(&default_mode));
return -ENOMEM;
}

3
drivers/gpu/drm/panel/panel-osd-osd101t2587-53ts.c
View file

@ -102,7 +102,6 @@ static const struct drm_display_mode default_mode_osd101t2587 = {
.vsync_start = 1200 + 24,
.vsync_end = 1200 + 24 + 6,
.vtotal = 1200 + 24 + 6 + 48,
.vrefresh = 60,
.flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
};
@ -117,7 +116,7 @@ static int osd101t2587_panel_get_modes(struct drm_panel *panel,
dev_err(panel->dev, "failed to add mode %ux%ux@%u\n",
osd101t2587->default_mode->hdisplay,
osd101t2587->default_mode->vdisplay,
osd101t2587->default_mode->vrefresh);
drm_mode_vrefresh(osd101t2587->default_mode));
return -ENOMEM;
}

3
drivers/gpu/drm/panel/panel-panasonic-vvx10f034n00.c
View file

@ -149,7 +149,6 @@ static const struct drm_display_mode default_mode = {
.vsync_start = 1200 + 24,
.vsync_end = 1200 + 24 + 6,
.vtotal = 1200 + 24 + 6 + 48,
.vrefresh = 60,
};
static int wuxga_nt_panel_get_modes(struct drm_panel *panel,
@ -161,7 +160,7 @@ static int wuxga_nt_panel_get_modes(struct drm_panel *panel,
if (!mode) {
dev_err(panel->dev, "failed to add mode %ux%u@%u\n",
default_mode.hdisplay, default_mode.vdisplay,
default_mode.vrefresh);
drm_mode_vrefresh(&default_mode));
return -ENOMEM;
}

4
drivers/gpu/drm/panel/panel-raspberrypi-touchscreen.c
View file

@ -209,7 +209,6 @@ static const struct drm_display_mode rpi_touchscreen_modes[] = {
.vsync_start = 480 + 7,
.vsync_end = 480 + 7 + 2,
.vtotal = 480 + 7 + 2 + 21,
.vrefresh = 60,
},
};
@ -322,7 +321,8 @@ static int rpi_touchscreen_get_modes(struct drm_panel *panel,
mode = drm_mode_duplicate(connector->dev, m);
if (!mode) {
dev_err(panel->dev, "failed to add mode %ux%u@%u\n",
m->hdisplay, m->vdisplay, m->vrefresh);
m->hdisplay, m->vdisplay,
drm_mode_vrefresh(m));
continue;
}

3
drivers/gpu/drm/panel/panel-raydium-rm67191.c
View file

@ -218,7 +218,6 @@ static const struct drm_display_mode default_mode = {
.vsync_start = 1920 + 10,
.vsync_end = 1920 + 10 + 2,
.vtotal = 1920 + 10 + 2 + 4,
.vrefresh = 60,
.width_mm = 68,
.height_mm = 121,
.flags = DRM_MODE_FLAG_NHSYNC |
@ -445,7 +444,7 @@ static int rad_panel_get_modes(struct drm_panel *panel,
if (!mode) {
DRM_DEV_ERROR(panel->dev, "failed to add mode %ux%ux@%u\n",
default_mode.hdisplay, default_mode.vdisplay,
default_mode.vrefresh);
drm_mode_vrefresh(&default_mode));
return -ENOMEM;
}

3
drivers/gpu/drm/panel/panel-raydium-rm68200.c
View file

@ -92,7 +92,6 @@ static const struct drm_display_mode default_mode = {
.vsync_start = 1280 + 12,
.vsync_end = 1280 + 12 + 4,
.vtotal = 1280 + 12 + 4 + 12,
.vrefresh = 50,
.flags = 0,
.width_mm = 68,
.height_mm = 122,
@ -339,7 +338,7 @@ static int rm68200_get_modes(struct drm_panel *panel,
if (!mode) {
DRM_ERROR("failed to add mode %ux%ux@%u\n",
default_mode.hdisplay, default_mode.vdisplay,
default_mode.vrefresh);
drm_mode_vrefresh(&default_mode));
return -ENOMEM;
}

5
drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c
View file

@ -223,7 +223,6 @@ static const struct drm_display_mode default_mode = {
.vsync_start = 1440 + 20,
.vsync_end = 1440 + 20 + 4,
.vtotal = 1440 + 20 + 4 + 12,
.vrefresh = 60,
.clock = 75276,
.flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
.width_mm = 65,
@ -240,7 +239,7 @@ static int jh057n_get_modes(struct drm_panel *panel,
if (!mode) {
DRM_DEV_ERROR(ctx->dev, "Failed to add mode %ux%u@%u\n",
default_mode.hdisplay, default_mode.vdisplay,
default_mode.vrefresh);
drm_mode_vrefresh(&default_mode));
return -ENOMEM;
}
@ -360,7 +359,7 @@ static int jh057n_probe(struct mipi_dsi_device *dsi)
DRM_DEV_INFO(dev, "%ux%u@%u %ubpp dsi %udl - ready\n",
default_mode.hdisplay, default_mode.vdisplay,
default_mode.vrefresh,
drm_mode_vrefresh(&default_mode),
mipi_dsi_pixel_format_to_bpp(dsi->format), dsi->lanes);
jh057n_debugfs_init(ctx);

1
drivers/gpu/drm/panel/panel-ronbo-rb070d30.c
View file

@ -103,7 +103,6 @@ static const struct drm_display_mode default_mode = {
.vsync_start = 600 + 12,
.vsync_end = 600 + 12 + 10,
.vtotal = 600 + 12 + 10 + 13,
.vrefresh = 60,
.width_mm = 154,
.height_mm = 85,

6
drivers/gpu/drm/panel/panel-samsung-s6d16d0.c
View file

@ -37,12 +37,6 @@ static const struct drm_display_mode samsung_s6d16d0_mode = {
.vsync_start = 480 + 1,
.vsync_end = 480 + 1 + 1,
.vtotal = 480 + 1 + 1 + 1,
/*
* This depends on the clocking HS vs LP rate, this value
* is calculated as:
* vrefresh = (clock * 1000) / (htotal*vtotal)
*/
.vrefresh = 816,
.width_mm = 84,
.height_mm = 48,
};

4
drivers/gpu/drm/panel/panel-samsung-s6e3ha2.c
View file

@ -617,7 +617,6 @@ static const struct drm_display_mode s6e3ha2_mode = {
.vsync_start = 2560 + 1,
.vsync_end = 2560 + 1 + 1,
.vtotal = 2560 + 1 + 1 + 15,
.vrefresh = 60,
.flags = 0,
};
@ -636,7 +635,6 @@ static const struct drm_display_mode s6e3hf2_mode = {
.vsync_start = 2560 + 1,
.vsync_end = 2560 + 1 + 1,
.vtotal = 2560 + 1 + 1 + 15,
.vrefresh = 60,
.flags = 0,
};
@ -655,7 +653,7 @@ static int s6e3ha2_get_modes(struct drm_panel *panel,
if (!mode) {
DRM_ERROR("failed to add mode %ux%ux@%u\n",
ctx->desc->mode->hdisplay, ctx->desc->mode->vdisplay,
ctx->desc->mode->vrefresh);
drm_mode_vrefresh(ctx->desc->mode));
return -ENOMEM;
}

3
drivers/gpu/drm/panel/panel-samsung-s6e63j0x03.c
View file

@ -52,7 +52,6 @@ static const struct drm_display_mode default_mode = {
.vsync_start = 320 + 150,
.vsync_end = 320 + 150 + 1,
.vtotal = 320 + 150 + 1 + 2,
.vrefresh = 30,
.flags = 0,
};
@ -409,7 +408,7 @@ static int s6e63j0x03_get_modes(struct drm_panel *panel,
if (!mode) {
DRM_ERROR("failed to add mode %ux%ux@%u\n",
default_mode.hdisplay, default_mode.vdisplay,
default_mode.vrefresh);
drm_mode_vrefresh(&default_mode));
return -ENOMEM;
}

3
drivers/gpu/drm/panel/panel-samsung-s6e63m0.c
View file

@ -117,7 +117,6 @@ static const struct drm_display_mode default_mode = {
.vsync_start = 800 + 28,
.vsync_end = 800 + 28 + 2,
.vtotal = 800 + 28 + 2 + 1,
.vrefresh = 60,
.width_mm = 53,
.height_mm = 89,
.flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
@ -371,7 +370,7 @@ static int s6e63m0_get_modes(struct drm_panel *panel,
if (!mode) {
DRM_ERROR("failed to add mode %ux%ux@%u\n",
default_mode.hdisplay, default_mode.vdisplay,
default_mode.vrefresh);
drm_mode_vrefresh(&default_mode));
return -ENOMEM;
}

1
drivers/gpu/drm/panel/panel-samsung-s6e88a0-ams452ef01.c
View file

@ -177,7 +177,6 @@ static const struct drm_display_mode s6e88a0_ams452ef01_mode = {
.vsync_start = 960 + 14,
.vsync_end = 960 + 14 + 2,
.vtotal = 960 + 14 + 2 + 8,
.vrefresh = 60,
.width_mm = 56,
.height_mm = 100,
};

3
drivers/gpu/drm/panel/panel-seiko-43wvf1g.c
View file

@ -92,7 +92,8 @@ static int seiko_panel_get_fixed_modes(struct seiko_panel *panel,
mode = drm_mode_duplicate(connector->dev, m);
if (!mode) {
dev_err(panel->base.dev, "failed to add mode %ux%u@%u\n",
m->hdisplay, m->vdisplay, m->vrefresh);
m->hdisplay, m->vdisplay,
drm_mode_vrefresh(m));
continue;
}

3
drivers/gpu/drm/panel/panel-sharp-lq101r1sx01.c
View file

@ -269,7 +269,6 @@ static const struct drm_display_mode default_mode = {
.vsync_start = 1600 + 4,
.vsync_end = 1600 + 4 + 8,
.vtotal = 1600 + 4 + 8 + 32,
.vrefresh = 60,
};
static int sharp_panel_get_modes(struct drm_panel *panel,
@ -281,7 +280,7 @@ static int sharp_panel_get_modes(struct drm_panel *panel,
if (!mode) {
dev_err(panel->dev, "failed to add mode %ux%ux@%u\n",
default_mode.hdisplay, default_mode.vdisplay,
default_mode.vrefresh);
drm_mode_vrefresh(&default_mode));
return -ENOMEM;
}

1
drivers/gpu/drm/panel/panel-sharp-ls037v7dw01.c
View file

@ -93,7 +93,6 @@ static const struct drm_display_mode ls037v7dw01_mode = {
.vsync_start = 640 + 1,
.vsync_end = 640 + 1 + 1,
.vtotal = 640 + 1 + 1 + 1,
.vrefresh = 58,
.type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
.flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
.width_mm = 56,

3
drivers/gpu/drm/panel/panel-sharp-ls043t1le01.c
View file

@ -201,7 +201,6 @@ static const struct drm_display_mode default_mode = {
.vsync_start = 960 + 3,
.vsync_end = 960 + 3 + 15,
.vtotal = 960 + 3 + 15 + 1,
.vrefresh = 60,
};
static int sharp_nt_panel_get_modes(struct drm_panel *panel,
@ -213,7 +212,7 @@ static int sharp_nt_panel_get_modes(struct drm_panel *panel,
if (!mode) {
dev_err(panel->dev, "failed to add mode %ux%u@%u\n",
default_mode.hdisplay, default_mode.vdisplay,
default_mode.vrefresh);
drm_mode_vrefresh(&default_mode));
return -ENOMEM;
}

91
drivers/gpu/drm/panel/panel-simple.c
View file

@ -163,7 +163,8 @@ static unsigned int panel_simple_get_display_modes(struct panel_simple *panel,
mode = drm_mode_duplicate(connector->dev, m);
if (!mode) {
dev_err(panel->base.dev, "failed to add mode %ux%u@%u\n",
m->hdisplay, m->vdisplay, m->vrefresh);
m->hdisplay, m->vdisplay,
drm_mode_vrefresh(m));
continue;
}
@ -602,7 +603,6 @@ static const struct drm_display_mode ampire_am_480272h3tmqw_t01h_mode = {
.vsync_start = 272 + 2,
.vsync_end = 272 + 2 + 10,
.vtotal = 272 + 2 + 10 + 2,
.vrefresh = 60,
.flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC,
};
@ -627,7 +627,6 @@ static const struct drm_display_mode ampire_am800480r3tmqwa1h_mode = {
.vsync_start = 480 + 2,
.vsync_end = 480 + 2 + 45,
.vtotal = 480 + 2 + 45 + 0,
.vrefresh = 60,
.flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC,
};
@ -678,7 +677,6 @@ static const struct drm_display_mode auo_b101aw03_mode = {
.vsync_start = 600 + 16,
.vsync_end = 600 + 16 + 6,
.vtotal = 600 + 16 + 6 + 16,
.vrefresh = 60,
};
static const struct panel_desc auo_b101aw03 = {
@ -723,7 +721,6 @@ static const struct drm_display_mode auo_b101xtn01_mode = {
.vsync_start = 768 + 14,
.vsync_end = 768 + 14 + 42,
.vtotal = 768 + 14 + 42,
.vrefresh = 60,
.flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
};
@ -747,7 +744,6 @@ static const struct drm_display_mode auo_b116xak01_mode = {
.vsync_start = 768 + 4,
.vsync_end = 768 + 4 + 6,
.vtotal = 768 + 4 + 6 + 15,
.vrefresh = 60,
.flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
};
@ -776,7 +772,6 @@ static const struct drm_display_mode auo_b116xw03_mode = {
.vsync_start = 768 + 10,
.vsync_end = 768 + 10 + 12,
.vtotal = 768 + 10 + 12 + 6,
.vrefresh = 60,
};
static const struct panel_desc auo_b116xw03 = {
@ -799,7 +794,6 @@ static const struct drm_display_mode auo_b133xtn01_mode = {
.vsync_start = 768 + 3,
.vsync_end = 768 + 3 + 6,
.vtotal = 768 + 3 + 6 + 13,
.vrefresh = 60,
};
static const struct panel_desc auo_b133xtn01 = {
@ -822,7 +816,6 @@ static const struct drm_display_mode auo_b133htn01_mode = {
.vsync_start = 1080 + 25,
.vsync_end = 1080 + 25 + 10,
.vtotal = 1080 + 25 + 10 + 10,
.vrefresh = 60,
};
static const struct panel_desc auo_b133htn01 = {
@ -878,7 +871,6 @@ static const struct drm_display_mode auo_g101evn010_mode = {
.vsync_start = 800 + 8,
.vsync_end = 800 + 8 + 2,
.vtotal = 800 + 8 + 2 + 6,
.vrefresh = 60,
};
static const struct panel_desc auo_g101evn010 = {
@ -903,7 +895,6 @@ static const struct drm_display_mode auo_g104sn02_mode = {
.vsync_start = 600 + 10,
.vsync_end = 600 + 10 + 35,
.vtotal = 600 + 10 + 35 + 2,
.vrefresh = 60,
};
static const struct panel_desc auo_g104sn02 = {
@ -926,7 +917,6 @@ static const struct drm_display_mode auo_g121ean01_mode = {
.vsync_start = 800 + 6,
.vsync_end = 800 + 6 + 4,
.vtotal = 800 + 6 + 4 + 10,
.vrefresh = 60,
};
static const struct panel_desc auo_g121ean01 = {
@ -981,7 +971,6 @@ static const struct drm_display_mode auo_g156xtn01_mode = {
.vsync_start = 768 + 4,
.vsync_end = 768 + 4 + 4,
.vtotal = 806,
.vrefresh = 60,
};
static const struct panel_desc auo_g156xtn01 = {
@ -1095,7 +1084,6 @@ static const struct drm_display_mode auo_t215hvn01_mode = {
.vsync_start = 1080 + 4,
.vsync_end = 1080 + 4 + 5,
.vtotal = 1080 + 4 + 5 + 36,
.vrefresh = 60,
};
static const struct panel_desc auo_t215hvn01 = {
@ -1122,7 +1110,6 @@ static const struct drm_display_mode avic_tm070ddh03_mode = {
.vsync_start = 600 + 17,
.vsync_end = 600 + 17 + 1,
.vtotal = 600 + 17 + 1 + 17,
.vrefresh = 60,
};
static const struct panel_desc avic_tm070ddh03 = {
@ -1172,7 +1159,6 @@ static const struct drm_display_mode boe_hv070wsa_mode = {
.vsync_start = 600 + 10,
.vsync_end = 600 + 10 + 10,
.vtotal = 600 + 10 + 10 + 10,
.vrefresh = 60,
};
static const struct panel_desc boe_hv070wsa = {
@ -1195,7 +1181,6 @@ static const struct drm_display_mode boe_nv101wxmn51_modes[] = {
.vsync_start = 800 + 3,
.vsync_end = 800 + 3 + 5,
.vtotal = 800 + 3 + 5 + 24,
.vrefresh = 60,
},
{
.clock = 57500,
@ -1207,7 +1192,6 @@ static const struct drm_display_mode boe_nv101wxmn51_modes[] = {
.vsync_start = 800 + 3,
.vsync_end = 800 + 3 + 5,
.vtotal = 800 + 3 + 5 + 24,
.vrefresh = 48,
},
};
@ -1237,7 +1221,6 @@ static const struct drm_display_mode boe_nv133fhm_n61_modes = {
.vsync_start = 1080 + 3,
.vsync_end = 1080 + 3 + 6,
.vtotal = 1080 + 3 + 6 + 31,
.vrefresh = 60,
};
/* Also used for boe_nv133fhm_n62 */
@ -1269,7 +1252,6 @@ static const struct drm_display_mode boe_nv140fhmn49_modes[] = {
.vsync_start = 1080 + 3,
.vsync_end = 1080 + 3 + 5,
.vtotal = 1125,
.vrefresh = 60,
},
};
@ -1300,7 +1282,6 @@ static const struct drm_display_mode cdtech_s043wq26h_ct7_mode = {
.vsync_start = 272 + 8,
.vsync_end = 272 + 8 + 8,
.vtotal = 272 + 8 + 8 + 8,
.vrefresh = 60,
.flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
};
@ -1325,7 +1306,6 @@ static const struct drm_display_mode cdtech_s070wv95_ct16_mode = {
.vsync_start = 480 + 29,
.vsync_end = 480 + 29 + 13,
.vtotal = 480 + 29 + 13 + 3,
.vrefresh = 60,
.flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
};
@ -1349,7 +1329,6 @@ static const struct drm_display_mode chunghwa_claa070wp03xg_mode = {
.vsync_start = 1280 + 1,
.vsync_end = 1280 + 1 + 7,
.vtotal = 1280 + 1 + 7 + 15,
.vrefresh = 60,
.flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
};
@ -1373,7 +1352,6 @@ static const struct drm_display_mode chunghwa_claa101wa01a_mode = {
.vsync_start = 768 + 4,
.vsync_end = 768 + 4 + 4,
.vtotal = 768 + 4 + 4 + 4,
.vrefresh = 60,
};
static const struct panel_desc chunghwa_claa101wa01a = {
@ -1396,7 +1374,6 @@ static const struct drm_display_mode chunghwa_claa101wb01_mode = {
.vsync_start = 768 + 16,
.vsync_end = 768 + 16 + 8,
.vtotal = 768 + 16 + 8 + 16,
.vrefresh = 60,
};
static const struct panel_desc chunghwa_claa101wb01 = {
@ -1419,7 +1396,6 @@ static const struct drm_display_mode dataimage_scf0700c48ggu18_mode = {
.vsync_start = 480 + 10,
.vsync_end = 480 + 10 + 2,
.vtotal = 480 + 10 + 2 + 33,
.vrefresh = 60,
.flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
};
@ -1506,7 +1482,6 @@ static const struct drm_display_mode edt_et035012dm6_mode = {
.vsync_start = 240 + 4,
.vsync_end = 240 + 4 + 4,
.vtotal = 240 + 4 + 4 + 14,
.vrefresh = 60,
.flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
};
@ -1538,7 +1513,6 @@ static const struct drm_display_mode edt_etm043080dh6gp_mode = {
.vsync_start = 288 + 2,
.vsync_end = 288 + 2 + 4,
.vtotal = 288 + 2 + 4 + 10,
.vrefresh = 60,
};
static const struct panel_desc edt_etm043080dh6gp = {
@ -1563,7 +1537,6 @@ static const struct drm_display_mode edt_etm0430g0dh6_mode = {
.vsync_start = 272 + 2,
.vsync_end = 272 + 2 + 10,
.vtotal = 272 + 2 + 10 + 2,
.vrefresh = 60,
.flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
};
@ -1587,7 +1560,6 @@ static const struct drm_display_mode edt_et057090dhu_mode = {
.vsync_start = 480 + 10,
.vsync_end = 480 + 10 + 3,
.vtotal = 480 + 10 + 3 + 32,
.vrefresh = 60,
.flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
};
@ -1613,7 +1585,6 @@ static const struct drm_display_mode edt_etm0700g0dh6_mode = {
.vsync_start = 480 + 10,
.vsync_end = 480 + 10 + 2,
.vtotal = 480 + 10 + 2 + 33,
.vrefresh = 60,
.flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
};
@ -1678,7 +1649,6 @@ static const struct drm_display_mode foxlink_fl500wvr00_a0t_mode = {
.vsync_start = 480 + 37,
.vsync_end = 480 + 37 + 2,
.vtotal = 480 + 37 + 2 + 8,
.vrefresh = 60,
};
static const struct panel_desc foxlink_fl500wvr00_a0t = {
@ -1702,7 +1672,6 @@ static const struct drm_display_mode frida_frd350h54004_mode = {
.vsync_start = 240 + 2,
.vsync_end = 240 + 2 + 6,
.vtotal = 240 + 2 + 6 + 2,
.vrefresh = 60,
.flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC,
};
@ -1729,7 +1698,6 @@ static const struct drm_display_mode friendlyarm_hd702e_mode = {
.vsync_start = 1280 + 4,
.vsync_end = 1280 + 4 + 8,
.vtotal = 1280 + 4 + 8 + 4,
.vrefresh = 60,
.flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
};
@ -1752,7 +1720,6 @@ static const struct drm_display_mode giantplus_gpg482739qs5_mode = {
.vsync_start = 272 + 8,
.vsync_end = 272 + 8 + 1,
.vtotal = 272 + 8 + 1 + 8,
.vrefresh = 60,
};
static const struct panel_desc giantplus_gpg482739qs5 = {
@ -1856,7 +1823,6 @@ static const struct drm_display_mode hitachi_tx23d38vm0caa_mode = {
.vsync_start = 480 + 16,
.vsync_end = 480 + 16 + 13,
.vtotal = 480 + 16 + 13 + 16,
.vrefresh = 60,
};
static const struct panel_desc hitachi_tx23d38vm0caa = {
@ -1883,7 +1849,6 @@ static const struct drm_display_mode innolux_at043tn24_mode = {
.vsync_start = 272 + 2,
.vsync_end = 272 + 2 + 10,
.vtotal = 272 + 2 + 10 + 2,
.vrefresh = 60,
.flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
};
@ -1909,7 +1874,6 @@ static const struct drm_display_mode innolux_at070tn92_mode = {
.vsync_start = 480 + 22,
.vsync_end = 480 + 22 + 10,
.vtotal = 480 + 22 + 23 + 10,
.vrefresh = 60,
};
static const struct panel_desc innolux_at070tn92 = {
@ -2020,7 +1984,6 @@ static const struct drm_display_mode innolux_g121x1_l03_mode = {
.vsync_start = 768 + 38,
.vsync_end = 768 + 38 + 1,
.vtotal = 768 + 38 + 1 + 0,
.vrefresh = 60,
.flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
};
@ -2082,7 +2045,6 @@ static const struct drm_display_mode innolux_n156bge_l21_mode = {
.vsync_start = 768 + 2,
.vsync_end = 768 + 2 + 6,
.vtotal = 768 + 2 + 6 + 12,
.vrefresh = 60,
};
static const struct panel_desc innolux_n156bge_l21 = {
@ -2105,7 +2067,6 @@ static const struct drm_display_mode innolux_p120zdg_bf1_mode = {
.vsync_start = 1440 + 3,
.vsync_end = 1440 + 3 + 10,
.vtotal = 1440 + 3 + 10 + 27,
.vrefresh = 60,
.flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC,
};
@ -2133,7 +2094,6 @@ static const struct drm_display_mode innolux_zj070na_01p_mode = {
.vsync_start = 600 + 16,
.vsync_end = 600 + 16 + 4,
.vtotal = 600 + 16 + 4 + 16,
.vrefresh = 60,
};
static const struct panel_desc innolux_zj070na_01p = {
@ -2156,7 +2116,6 @@ static const struct drm_display_mode ivo_m133nwf4_r0_mode = {
.vsync_start = 1080 + 3,
.vsync_end = 1080 + 3 + 12,
.vtotal = 1080 + 3 + 12 + 17,
.vrefresh = 60,
.flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC,
};
@ -2260,7 +2219,6 @@ static const struct drm_display_mode lemaker_bl035_rgb_002_mode = {
.vsync_start = 240 + 4,
.vsync_end = 240 + 4 + 3,
.vtotal = 240 + 4 + 3 + 15,
.vrefresh = 60,
};
static const struct panel_desc lemaker_bl035_rgb_002 = {
@ -2284,7 +2242,6 @@ static const struct drm_display_mode lg_lb070wv8_mode = {
.vsync_start = 480 + 10,
.vsync_end = 480 + 10 + 25,
.vtotal = 480 + 10 + 25 + 10,
.vrefresh = 60,
};
static const struct panel_desc lg_lb070wv8 = {
@ -2309,7 +2266,6 @@ static const struct drm_display_mode lg_lp079qx1_sp0v_mode = {
.vsync_start = 2048 + 8,
.vsync_end = 2048 + 8 + 4,
.vtotal = 2048 + 8 + 4 + 8,
.vrefresh = 60,
.flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
};
@ -2332,7 +2288,6 @@ static const struct drm_display_mode lg_lp097qx1_spa1_mode = {
.vsync_start = 1536 + 3,
.vsync_end = 1536 + 3 + 1,
.vtotal = 1536 + 3 + 1 + 9,
.vrefresh = 60,
};
static const struct panel_desc lg_lp097qx1_spa1 = {
@ -2354,7 +2309,6 @@ static const struct drm_display_mode lg_lp120up1_mode = {
.vsync_start = 1280 + 4,
.vsync_end = 1280 + 4 + 4,
.vtotal = 1280 + 4 + 4 + 12,
.vrefresh = 60,
};
static const struct panel_desc lg_lp120up1 = {
@ -2378,7 +2332,6 @@ static const struct drm_display_mode lg_lp129qe_mode = {
.vsync_start = 1700 + 3,
.vsync_end = 1700 + 3 + 10,
.vtotal = 1700 + 3 + 10 + 36,
.vrefresh = 60,
};
static const struct panel_desc lg_lp129qe = {
@ -2459,7 +2412,6 @@ static const struct drm_display_mode mitsubishi_aa070mc01_mode = {
.vsync_start = 480 + 0,
.vsync_end = 480 + 48 + 1,
.vtotal = 480 + 48 + 1 + 0,
.vrefresh = 60,
.flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
};
@ -2474,7 +2426,6 @@ static const struct drm_display_mode logicpd_type_28_mode = {
.vsync_start = 272 + 2,
.vsync_end = 272 + 2 + 11,
.vtotal = 272 + 2 + 11 + 3,
.vrefresh = 60,
.flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC,
};
@ -2554,7 +2505,6 @@ static const struct drm_display_mode nec_nl4827hc19_05b_mode = {
.vsync_start = 272 + 2,
.vsync_end = 272 + 2 + 4,
.vtotal = 272 + 2 + 4 + 2,
.vrefresh = 74,
.flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
};
@ -2580,7 +2530,6 @@ static const struct drm_display_mode netron_dy_e231732_mode = {
.vsync_start = 600 + 127,
.vsync_end = 600 + 127 + 20,
.vtotal = 600 + 127 + 20 + 3,
.vrefresh = 60,
};
static const struct panel_desc netron_dy_e231732 = {
@ -2604,7 +2553,6 @@ static const struct drm_display_mode neweast_wjfh116008a_modes[] = {
.vsync_start = 1080 + 3,
.vsync_end = 1080 + 3 + 5,
.vtotal = 1080 + 3 + 5 + 23,
.vrefresh = 60,
.flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
}, {
.clock = 110920,
@ -2616,7 +2564,6 @@ static const struct drm_display_mode neweast_wjfh116008a_modes[] = {
.vsync_start = 1080 + 3,
.vsync_end = 1080 + 3 + 5,
.vtotal = 1080 + 3 + 5 + 23,
.vrefresh = 48,
.flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
}
};
@ -2648,7 +2595,6 @@ static const struct drm_display_mode newhaven_nhd_43_480272ef_atxl_mode = {
.vsync_start = 272 + 2,
.vsync_end = 272 + 2 + 10,
.vtotal = 272 + 2 + 10 + 2,
.vrefresh = 60,
.flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
};
@ -2756,7 +2702,6 @@ static const struct drm_display_mode olimex_lcd_olinuxino_43ts_mode = {
.vsync_start = 272 + 8,
.vsync_end = 272 + 8 + 5,
.vtotal = 272 + 8 + 5 + 3,
.vrefresh = 60,
};
static const struct panel_desc olimex_lcd_olinuxino_43ts = {
@ -2784,7 +2729,6 @@ static const struct drm_display_mode ontat_yx700wv03_mode = {
.vsync_start = 483,
.vsync_end = 493,
.vtotal = 500,
.vrefresh = 60,
.flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
};
@ -2813,7 +2757,6 @@ static const struct drm_display_mode ortustech_com37h3m_mode = {
.vsync_start = 640 + 4,
.vsync_end = 640 + 4 + 2,
.vtotal = 640 + 4 + 2 + 4,
.vrefresh = 60,
.flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
};
@ -2840,7 +2783,6 @@ static const struct drm_display_mode ortustech_com43h4m85ulc_mode = {
.vsync_start = 800 + 3,
.vsync_end = 800 + 3 + 3,
.vtotal = 800 + 3 + 3 + 3,
.vrefresh = 60,
};
static const struct panel_desc ortustech_com43h4m85ulc = {
@ -2866,7 +2808,6 @@ static const struct drm_display_mode osddisplays_osd070t1718_19ts_mode = {
.vsync_start = 480 + 22,
.vsync_end = 480 + 22 + 13,
.vtotal = 480 + 22 + 13 + 10,
.vrefresh = 60,
.flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
};
@ -2894,7 +2835,6 @@ static const struct drm_display_mode pda_91_00156_a0_mode = {
.vsync_start = 480 + 1,
.vsync_end = 480 + 1 + 23,
.vtotal = 480 + 1 + 23 + 22,
.vrefresh = 60,
};
static const struct panel_desc pda_91_00156_a0 = {
@ -2918,7 +2858,6 @@ static const struct drm_display_mode qd43003c0_40_mode = {
.vsync_start = 272 + 4,
.vsync_end = 272 + 4 + 10,
.vtotal = 272 + 4 + 10 + 2,
.vrefresh = 60,
};
static const struct panel_desc qd43003c0_40 = {
@ -2972,7 +2911,6 @@ static const struct drm_display_mode rocktech_rk101ii01d_ct_mode = {
.vsync_start = 800 + 2,
.vsync_end = 800 + 2 + 5,
.vtotal = 800 + 2 + 5 + 16,
.vrefresh = 60,
};
static const struct panel_desc rocktech_rk101ii01d_ct = {
@ -3001,7 +2939,6 @@ static const struct drm_display_mode samsung_lsn122dl01_c01_mode = {
.vsync_start = 1600 + 2,
.vsync_end = 1600 + 2 + 5,
.vtotal = 1600 + 2 + 5 + 57,
.vrefresh = 60,
};
static const struct panel_desc samsung_lsn122dl01_c01 = {
@ -3023,7 +2960,6 @@ static const struct drm_display_mode samsung_ltn101nt05_mode = {
.vsync_start = 600 + 3,
.vsync_end = 600 + 3 + 6,
.vtotal = 600 + 3 + 6 + 61,
.vrefresh = 60,
};
static const struct panel_desc samsung_ltn101nt05 = {
@ -3046,7 +2982,6 @@ static const struct drm_display_mode samsung_ltn140at29_301_mode = {
.vsync_start = 768 + 2,
.vsync_end = 768 + 2 + 5,
.vtotal = 768 + 2 + 5 + 17,
.vrefresh = 60,
};
static const struct panel_desc samsung_ltn140at29_301 = {
@ -3093,7 +3028,6 @@ static const struct drm_display_mode sharp_ld_d5116z01b_mode = {
.vsync_start = 1280 + 3,
.vsync_end = 1280 + 3 + 10,
.vtotal = 1280 + 3 + 10 + 57,
.vrefresh = 60,
.flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC,
};
@ -3119,7 +3053,6 @@ static const struct drm_display_mode sharp_lq070y3dg3b_mode = {
.vsync_start = 480 + 8,
.vsync_end = 480 + 8 + 2,
.vtotal = 480 + 8 + 2 + 35,
.vrefresh = 60,
.flags = DISPLAY_FLAGS_PIXDATA_POSEDGE,
};
@ -3146,7 +3079,6 @@ static const struct drm_display_mode sharp_lq035q7db03_mode = {
.vsync_start = 320 + 9,
.vsync_end = 320 + 9 + 1,
.vtotal = 320 + 9 + 1 + 7,
.vrefresh = 60,
};
static const struct panel_desc sharp_lq035q7db03 = {
@ -3250,7 +3182,6 @@ static const struct drm_display_mode shelly_sca07010_bfn_lnn_mode = {
.vsync_start = 480 + 1,
.vsync_end = 480 + 1 + 23,
.vtotal = 480 + 1 + 23 + 22,
.vrefresh = 60,
};
static const struct panel_desc shelly_sca07010_bfn_lnn = {
@ -3273,7 +3204,6 @@ static const struct drm_display_mode starry_kr070pe2t_mode = {
.vsync_start = 480 + 22,
.vsync_end = 480 + 22 + 1,
.vtotal = 480 + 22 + 1 + 22,
.vrefresh = 60,
};
static const struct panel_desc starry_kr070pe2t = {
@ -3299,7 +3229,6 @@ static const struct drm_display_mode starry_kr122ea0sra_mode = {
.vsync_start = 1200 + 15,
.vsync_end = 1200 + 15 + 2,
.vtotal = 1200 + 15 + 2 + 18,
.vrefresh = 60,
.flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
};
@ -3327,7 +3256,6 @@ static const struct drm_display_mode tfc_s9700rtwv43tr_01b_mode = {
.vsync_start = 480 + 13,
.vsync_end = 480 + 13 + 2,
.vtotal = 480 + 13 + 2 + 29,
.vrefresh = 62,
};
static const struct panel_desc tfc_s9700rtwv43tr_01b = {
@ -3403,7 +3331,6 @@ static const struct drm_display_mode ti_nspire_cx_lcd_mode[] = {
.vsync_start = 240 + 3,
.vsync_end = 240 + 3 + 1,
.vtotal = 240 + 3 + 1 + 17,
.vrefresh = 60,
.flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
},
};
@ -3431,7 +3358,6 @@ static const struct drm_display_mode ti_nspire_classic_lcd_mode[] = {
.vsync_start = 240 + 0,
.vsync_end = 240 + 0 + 1,
.vtotal = 240 + 0 + 1 + 0,
.vrefresh = 60,
.flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC,
},
};
@ -3460,7 +3386,6 @@ static const struct drm_display_mode toshiba_lt089ac29000_mode = {
.vsync_start = 768 + 20,
.vsync_end = 768 + 20 + 7,
.vtotal = 768 + 20 + 7 + 3,
.vrefresh = 60,
};
static const struct panel_desc toshiba_lt089ac29000 = {
@ -3485,7 +3410,6 @@ static const struct drm_display_mode tpk_f07a_0102_mode = {
.vsync_start = 480 + 10,
.vsync_end = 480 + 10 + 2,
.vtotal = 480 + 10 + 2 + 33,
.vrefresh = 60,
};
static const struct panel_desc tpk_f07a_0102 = {
@ -3508,7 +3432,6 @@ static const struct drm_display_mode tpk_f10a_0102_mode = {
.vsync_start = 600 + 20,
.vsync_end = 600 + 20 + 5,
.vtotal = 600 + 20 + 5 + 25,
.vrefresh = 60,
};
static const struct panel_desc tpk_f10a_0102 = {
@ -3567,7 +3490,6 @@ static const struct drm_display_mode vl050_8048nt_c01_mode = {
.vsync_start = 480 + 22,
.vsync_end = 480 + 22 + 10,
.vtotal = 480 + 22 + 10 + 23,
.vrefresh = 60,
.flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
};
@ -3593,7 +3515,6 @@ static const struct drm_display_mode winstar_wf35ltiacd_mode = {
.vsync_start = 240 + 4,
.vsync_end = 240 + 4 + 3,
.vtotal = 240 + 4 + 3 + 15,
.vrefresh = 60,
.flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
};
@ -3619,7 +3540,6 @@ static const struct drm_display_mode arm_rtsm_mode[] = {
.vsync_start = 768 + 3,
.vsync_end = 768 + 3 + 6,
.vtotal = 768 + 3 + 6 + 29,
.vrefresh = 60,
.flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
},
};
@ -4070,7 +3990,6 @@ static const struct drm_display_mode auo_b080uan01_mode = {
.vsync_start = 1920 + 9,
.vsync_end = 1920 + 9 + 2,
.vtotal = 1920 + 9 + 2 + 8,
.vrefresh = 60,
};
static const struct panel_desc_dsi auo_b080uan01 = {
@ -4098,7 +4017,6 @@ static const struct drm_display_mode boe_tv080wum_nl0_mode = {
.vsync_start = 1920 + 21,
.vsync_end = 1920 + 21 + 3,
.vtotal = 1920 + 21 + 3 + 18,
.vrefresh = 60,
.flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
};
@ -4128,7 +4046,6 @@ static const struct drm_display_mode lg_ld070wx3_sl01_mode = {
.vsync_start = 1280 + 28,
.vsync_end = 1280 + 28 + 1,
.vtotal = 1280 + 28 + 1 + 14,
.vrefresh = 60,
};
static const struct panel_desc_dsi lg_ld070wx3_sl01 = {
@ -4156,7 +4073,6 @@ static const struct drm_display_mode lg_lh500wx1_sd03_mode = {
.vsync_start = 1280 + 8,
.vsync_end = 1280 + 8 + 4,
.vtotal = 1280 + 8 + 4 + 12,
.vrefresh = 60,
};
static const struct panel_desc_dsi lg_lh500wx1_sd03 = {
@ -4184,7 +4100,6 @@ static const struct drm_display_mode panasonic_vvx10f004b00_mode = {
.vsync_start = 1200 + 17,
.vsync_end = 1200 + 17 + 2,
.vtotal = 1200 + 17 + 2 + 16,
.vrefresh = 60,
};
static const struct panel_desc_dsi panasonic_vvx10f004b00 = {
@ -4213,7 +4128,6 @@ static const struct drm_display_mode lg_acx467akm_7_mode = {
.vsync_start = 1920 + 2,
.vsync_end = 1920 + 2 + 2,
.vtotal = 1920 + 2 + 2 + 2,
.vrefresh = 60,
};
static const struct panel_desc_dsi lg_acx467akm_7 = {
@ -4241,7 +4155,6 @@ static const struct drm_display_mode osd101t2045_53ts_mode = {
.vsync_start = 1200 + 16,
.vsync_end = 1200 + 16 + 2,
.vtotal = 1200 + 16 + 2 + 16,
.vrefresh = 60,
.flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
};

2
drivers/gpu/drm/panel/panel-sitronix-st7701.c
View file

@ -272,7 +272,7 @@ static int st7701_get_modes(struct drm_panel *panel,
DRM_DEV_ERROR(&st7701->dsi->dev,
"failed to add mode %ux%ux@%u\n",
desc_mode->hdisplay, desc_mode->vdisplay,
desc_mode->vrefresh);
drm_mode_vrefresh(desc_mode));
return -ENOMEM;
}

3
drivers/gpu/drm/panel/panel-sitronix-st7789v.c
View file

@ -165,7 +165,6 @@ static const struct drm_display_mode default_mode = {
.vsync_start = 320 + 8,
.vsync_end = 320 + 8 + 4,
.vtotal = 320 + 8 + 4 + 4,
.vrefresh = 60,
};
static int st7789v_get_modes(struct drm_panel *panel,
@ -177,7 +176,7 @@ static int st7789v_get_modes(struct drm_panel *panel,
if (!mode) {
dev_err(panel->dev, "failed to add mode %ux%ux@%u\n",
default_mode.hdisplay, default_mode.vdisplay,
default_mode.vrefresh);
drm_mode_vrefresh(&default_mode));
return -ENOMEM;
}

2
drivers/gpu/drm/panel/panel-sony-acx424akp.c
View file

@ -57,7 +57,6 @@ static const struct drm_display_mode sony_acx424akp_vid_mode = {
.vsync_start = 864 + 14,
.vsync_end = 864 + 14 + 1,
.vtotal = 864 + 14 + 1 + 11,
.vrefresh = 60,
.width_mm = 48,
.height_mm = 84,
.flags = DRM_MODE_FLAG_PVSYNC,
@ -81,7 +80,6 @@ static const struct drm_display_mode sony_acx424akp_cmd_mode = {
* Some desired refresh rate, experiments at the maximum "pixel"
* clock speed (HS clock 420 MHz) yields around 117Hz.
*/
.vrefresh = 60,
.width_mm = 48,
.height_mm = 84,
};

1
drivers/gpu/drm/panel/panel-sony-acx565akm.c
View file

@ -514,7 +514,6 @@ static const struct drm_display_mode acx565akm_mode = {
.vsync_start = 480 + 3,
.vsync_end = 480 + 3 + 3,
.vtotal = 480 + 3 + 3 + 4,
.vrefresh = 57,
.type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
.flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
.width_mm = 77,

1
drivers/gpu/drm/panel/panel-tpo-td028ttec1.c
View file

@ -281,7 +281,6 @@ static const struct drm_display_mode td028ttec1_mode = {
.vsync_start = 640 + 4,
.vsync_end = 640 + 4 + 2,
.vtotal = 640 + 4 + 2 + 2,
.vrefresh = 66,
.type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
.flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
.width_mm = 43,

1
drivers/gpu/drm/panel/panel-tpo-td043mtea1.c
View file

@ -339,7 +339,6 @@ static const struct drm_display_mode td043mtea1_mode = {
.vsync_start = 480 + 39,
.vsync_end = 480 + 39 + 1,
.vtotal = 480 + 39 + 1 + 34,
.vrefresh = 60,
.type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
.flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
.width_mm = 94,

5
drivers/gpu/drm/panel/panel-tpo-tpg110.c
View file

@ -112,7 +112,6 @@ static const struct tpg110_panel_mode tpg110_modes[] = {
.vsync_start = 480 + 10,
.vsync_end = 480 + 10 + 1,
.vtotal = 480 + 10 + 1 + 35,
.vrefresh = 60,
},
.bus_flags = DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE,
},
@ -129,7 +128,6 @@ static const struct tpg110_panel_mode tpg110_modes[] = {
.vsync_start = 480 + 18,
.vsync_end = 480 + 18 + 1,
.vtotal = 480 + 18 + 1 + 27,
.vrefresh = 60,
},
.bus_flags = DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE,
},
@ -146,7 +144,6 @@ static const struct tpg110_panel_mode tpg110_modes[] = {
.vsync_start = 272 + 2,
.vsync_end = 272 + 2 + 1,
.vtotal = 272 + 2 + 1 + 12,
.vrefresh = 60,
},
.bus_flags = DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE,
},
@ -163,7 +160,6 @@ static const struct tpg110_panel_mode tpg110_modes[] = {
.vsync_start = 640 + 4,
.vsync_end = 640 + 4 + 1,
.vtotal = 640 + 4 + 1 + 8,
.vrefresh = 60,
},
.bus_flags = DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE,
},
@ -180,7 +176,6 @@ static const struct tpg110_panel_mode tpg110_modes[] = {
.vsync_start = 240 + 2,
.vsync_end = 240 + 2 + 1,
.vtotal = 240 + 2 + 1 + 20,
.vrefresh = 60,
},
.bus_flags = DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE,
},

1
drivers/gpu/drm/panel/panel-truly-nt35597.c
View file

@ -534,7 +534,6 @@ static const struct drm_display_mode qcom_sdm845_mtp_2k_mode = {
.vsync_start = 2560 + 8,
.vsync_end = 2560 + 8 + 1,
.vtotal = 2560 + 8 + 1 + 7,
.vrefresh = 60,
.flags = 0,
};

1
drivers/gpu/drm/panel/panel-visionox-rm69299.c
View file

@ -168,7 +168,6 @@ static const struct drm_display_mode visionox_rm69299_1080x2248_60hz = {
.vsync_start = 2248 + 56,
.vsync_end = 2248 + 56 + 4,
.vtotal = 2248 + 56 + 4 + 4,
.vrefresh = 60,
.flags = 0,
};

3
drivers/gpu/drm/panel/panel-xinpeng-xpp055c272.c
View file

@ -243,7 +243,6 @@ static const struct drm_display_mode default_mode = {
.vsync_start = 1280 + 22,
.vsync_end = 1280 + 22 + 4,
.vtotal = 1280 + 22 + 4 + 11,
.vrefresh = 60,
.clock = 64000,
.width_mm = 68,
.height_mm = 121,
@ -259,7 +258,7 @@ static int xpp055c272_get_modes(struct drm_panel *panel,
if (!mode) {
DRM_DEV_ERROR(ctx->dev, "Failed to add mode %ux%u@%u\n",
default_mode.hdisplay, default_mode.vdisplay,
default_mode.vrefresh);
drm_mode_vrefresh(&default_mode));
return -ENOMEM;
}

1
drivers/gpu/drm/sti/sti_hda.c
View file

@ -586,7 +586,6 @@ static int sti_hda_connector_get_modes(struct drm_connector *connector)
&hda_supported_modes[i].mode);
if (!mode)
continue;
mode->vrefresh = drm_mode_vrefresh(mode);
/* the first mode is the preferred mode */
if (i == 0)

2
drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
View file

@ -2138,7 +2138,6 @@ void vmw_guess_mode_timing(struct drm_display_mode *mode)
mode->vtotal = mode->vsync_end + 50;
mode->clock = (u32)mode->htotal * (u32)mode->vtotal / 100 * 6;
mode->vrefresh = drm_mode_vrefresh(mode);
}
@ -2212,7 +2211,6 @@ int vmw_du_connector_fill_modes(struct drm_connector *connector,
mode = drm_mode_duplicate(dev, bmode);
if (!mode)
return 0;
mode->vrefresh = drm_mode_vrefresh(mode);
drm_mode_probed_add(connector, mode);
}

12
include/drm/drm_modes.h
View file

@ -381,16 +381,6 @@ struct drm_display_mode {
*/
int private_flags;
/**
* @vrefresh:
*
* Vertical refresh rate, for debug output in human readable form. Not
* used in a functional way.
*
* This value is in Hz.
*/
int vrefresh;
/**
* @picture_aspect_ratio:
*
@ -422,7 +412,7 @@ struct drm_display_mode {
* @m: display mode
*/
#define DRM_MODE_ARG(m) \
(m)->name, (m)->vrefresh, (m)->clock, \
(m)->name, drm_mode_vrefresh(m), (m)->clock, \
(m)->hdisplay, (m)->hsync_start, (m)->hsync_end, (m)->htotal, \
(m)->vdisplay, (m)->vsync_start, (m)->vsync_end, (m)->vtotal, \
(m)->type, (m)->flags