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m68knommu: stop using __do_IRQ
The use of __do_IRQ is deprecated, so lets stop using it. Generally the interrupts on the supported processors here are level triggered, so this is strait forward to switch over to using the standard handle_level_irq flow handler. (Although some ColdFire parts support edge triggered GPIO line interrupts we have no support for them yet). Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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parent
eb497e7b49
commit
04570b4621
7 changed files with 26 additions and 27 deletions
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@ -59,6 +59,10 @@ config GENERIC_HARDIRQS
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bool
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default y
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config GENERIC_HARDIRQS_NO__DO_IRQ
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bool
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default y
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config GENERIC_CALIBRATE_DELAY
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bool
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default y
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@ -128,11 +128,9 @@ void __init init_IRQ(void)
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writel(0x88888888, MCF_MBAR + MCFSIM_ICR4);
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for (irq = 0; (irq < NR_IRQS); irq++) {
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irq_desc[irq].status = IRQ_DISABLED;
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irq_desc[irq].action = NULL;
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irq_desc[irq].depth = 1;
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irq_desc[irq].chip = &intc_irq_chip;
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intc_irq_set_type(irq, 0);
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set_irq_chip(irq, &intc_irq_chip);
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set_irq_type(irq, IRQ_TYPE_LEVEL_HIGH);
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set_irq_handler(irq, handle_level_irq);
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}
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}
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@ -179,10 +179,8 @@ void __init init_IRQ(void)
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IMR = ~0;
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for (i = 0; (i < NR_IRQS); i++) {
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irq_desc[i].status = IRQ_DISABLED;
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irq_desc[i].action = NULL;
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irq_desc[i].depth = 1;
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irq_desc[i].chip = &intc_irq_chip;
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set_irq_chip(irq, &intc_irq_chip);
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set_irq_handler(irq, handle_level_irq);
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}
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}
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@ -132,10 +132,8 @@ void init_IRQ(void)
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pquicc->intr_cimr = 0x00000000;
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for (i = 0; (i < NR_IRQS); i++) {
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irq_desc[i].status = IRQ_DISABLED;
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irq_desc[i].action = NULL;
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irq_desc[i].depth = 1;
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irq_desc[i].chip = &intc_irq_chip;
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set_irq_chip(irq, &intc_irq_chip);
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set_irq_handler(irq, handle_level_irq);
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}
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}
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@ -93,10 +93,16 @@ static void intc_irq_unmask(unsigned int irq)
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}
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}
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static int intc_irq_set_type(unsigned int irq, unsigned int type)
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{
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return 0;
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}
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static struct irq_chip intc_irq_chip = {
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.name = "CF-INTC",
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.mask = intc_irq_mask,
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.unmask = intc_irq_unmask,
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.set_type = intc_irq_set_type,
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};
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void __init init_IRQ(void)
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@ -112,10 +118,9 @@ void __init init_IRQ(void)
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#endif
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for (irq = 0; (irq < NR_IRQS); irq++) {
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irq_desc[irq].status = IRQ_DISABLED;
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irq_desc[irq].action = NULL;
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irq_desc[irq].depth = 1;
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irq_desc[irq].chip = &intc_irq_chip;
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set_irq_chip(irq, &intc_irq_chip);
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set_irq_type(irq, IRQ_TYPE_LEVEL_HIGH);
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set_irq_handler(irq, handle_level_irq);
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}
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}
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@ -70,11 +70,9 @@ void __init init_IRQ(void)
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__raw_writeb(0xff, MCFINTC1_SIMR);
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for (irq = 0; (irq < NR_IRQS); irq++) {
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irq_desc[irq].status = IRQ_DISABLED;
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irq_desc[irq].action = NULL;
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irq_desc[irq].depth = 1;
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irq_desc[irq].chip = &intc_irq_chip;
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intc_irq_set_type(irq, 0);
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set_irq_chip(irq, &intc_irq_chip);
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set_irq_type(irq, IRQ_TYPE_LEVEL_HIGH);
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set_irq_handler(irq, handle_level_irq);
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}
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}
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@ -143,11 +143,9 @@ void __init init_IRQ(void)
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mcf_maskimr(0xffffffff);
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for (irq = 0; (irq < NR_IRQS); irq++) {
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irq_desc[irq].status = IRQ_DISABLED;
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irq_desc[irq].action = NULL;
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irq_desc[irq].depth = 1;
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irq_desc[irq].chip = &intc_irq_chip;
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intc_irq_set_type(irq, 0);
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set_irq_chip(irq, &intc_irq_chip);
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set_irq_type(irq, IRQ_TYPE_LEVEL_HIGH);
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set_irq_handler(irq, handle_level_irq);
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}
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}
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