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i2c: designware: Use accessors to DW_IC_INTR_MASK register 

Convert access to DW_IC_INTR_MASK register using the existing
__i2c_dw_write_intr_mask() and a __i2c_dw_read_intr_mask() introduced
here. Motivation to this is to prepare for generic polling mode code
where polling mode will use a SW mask instead of DW_IC_INTR_MASK.

Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Tested-by: Jiawen Wu <jiawenwu@trustnetic.com>
Signed-off-by: Andi Shyti <andi.shyti@kernel.org>
This commit is contained in:
Jarkko Nikula 2024-02-13 14:48:44 +02:00 committed by Andi Shyti
parent 64b6426a6e
commit 04c71da4a9
3 changed files with 20 additions and 11 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
drivers/i2c/busses/i2c-designware-common.c
View File

@ -648,7 +648,7 @@ void i2c_dw_disable(struct dw_i2c_dev *dev)
__i2c_dw_disable(dev);
/* Disable all interrupts */
regmap_write(dev->map, DW_IC_INTR_MASK, 0);
__i2c_dw_write_intr_mask(dev, 0);
regmap_read(dev->map, DW_IC_CLR_INTR, &dummy);
i2c_dw_release_lock(dev);

7
drivers/i2c/busses/i2c-designware-core.h
View File

@ -360,6 +360,13 @@ static inline void __i2c_dw_write_intr_mask(struct dw_i2c_dev *dev,
regmap_write(dev->map, DW_IC_INTR_MASK, val);
}
static inline void __i2c_dw_read_intr_mask(struct dw_i2c_dev *dev,
unsigned int *intr_mask)
{
if (!(dev->flags & ACCESS_POLLING))
regmap_read(dev->map, DW_IC_INTR_MASK, intr_mask);
}
void __i2c_dw_disable(struct dw_i2c_dev *dev);
extern void i2c_dw_configure_master(struct dw_i2c_dev *dev);

22
drivers/i2c/busses/i2c-designware-master.c
View File

@ -240,7 +240,7 @@ static void i2c_dw_xfer_init(struct dw_i2c_dev *dev)
msgs[dev->msg_write_idx].addr | ic_tar);
/* Enforce disabled interrupts (due to HW issues) */
regmap_write(dev->map, DW_IC_INTR_MASK, 0);
__i2c_dw_write_intr_mask(dev, 0);
/* Enable the adapter */
__i2c_dw_enable(dev);
@ -544,7 +544,7 @@ i2c_dw_xfer_msg(struct dw_i2c_dev *dev)
if (dev->msg_err)
intr_mask = 0;
regmap_write(dev->map, DW_IC_INTR_MASK, intr_mask);
__i2c_dw_write_intr_mask(dev, intr_mask);
}
static u8
@ -552,6 +552,7 @@ i2c_dw_recv_len(struct dw_i2c_dev *dev, u8 len)
{
struct i2c_msg *msgs = dev->msgs;
u32 flags = msgs[dev->msg_read_idx].flags;
unsigned int intr_mask;
/*
* Adjust the buffer length and mask the flag
@ -566,8 +567,9 @@ i2c_dw_recv_len(struct dw_i2c_dev *dev, u8 len)
* Received buffer length, re-enable TX_EMPTY interrupt
* to resume the SMBUS transaction.
*/
regmap_update_bits(dev->map, DW_IC_INTR_MASK, DW_IC_INTR_TX_EMPTY,
DW_IC_INTR_TX_EMPTY);
__i2c_dw_read_intr_mask(dev, &intr_mask);
intr_mask |= DW_IC_INTR_TX_EMPTY;
__i2c_dw_write_intr_mask(dev, intr_mask);
return len;
}
@ -827,7 +829,7 @@ static irqreturn_t i2c_dw_isr(int this_irq, void *dev_id)
* interrupt really came from this HW (E.g. firmware has left
* the HW active).
*/
regmap_write(dev->map, DW_IC_INTR_MASK, 0);
__i2c_dw_write_intr_mask(dev, 0);
return IRQ_HANDLED;
}
@ -840,7 +842,7 @@ static irqreturn_t i2c_dw_isr(int this_irq, void *dev_id)
* Anytime TX_ABRT is set, the contents of the tx/rx
* buffers are flushed. Make sure to skip them.
*/
regmap_write(dev->map, DW_IC_INTR_MASK, 0);
__i2c_dw_write_intr_mask(dev, 0);
goto tx_aborted;
}
@ -862,9 +864,9 @@ tx_aborted:
complete(&dev->cmd_complete);
else if (unlikely(dev->flags & ACCESS_INTR_MASK)) {
/* Workaround to trigger pending interrupt */
regmap_read(dev->map, DW_IC_INTR_MASK, &stat);
regmap_write(dev->map, DW_IC_INTR_MASK, 0);
regmap_write(dev->map, DW_IC_INTR_MASK, stat);
__i2c_dw_read_intr_mask(dev, &stat);
__i2c_dw_write_intr_mask(dev, 0);
__i2c_dw_write_intr_mask(dev, stat);
}
return IRQ_HANDLED;
@ -1016,7 +1018,7 @@ int i2c_dw_probe_master(struct dw_i2c_dev *dev)
if (ret)
return ret;
regmap_write(dev->map, DW_IC_INTR_MASK, 0);
__i2c_dw_write_intr_mask(dev, 0);
i2c_dw_release_lock(dev);
if (!(dev->flags & ACCESS_POLLING)) {