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[S390] fix tlb flushing vs. concurrent /proc accesses
The tlb flushing code uses the mm_users field of the mm_struct to decide if each page table entry needs to be flushed individually with IPTE or if a global flush for the mm_struct is sufficient after all page table updates have been done. The comment for mm_users says "How many users with user space?" but the /proc code increases mm_users after it found the process structure by pid without creating a new user process. Which makes mm_users useless for the decision between the two tlb flusing methods. The current code can be confused to not flush tlb entries by a concurrent access to /proc files if e.g. a fork is in progres. The solution for this problem is to make the tlb flushing logic independent from the mm_users field. Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
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parent
7af048dc76
commit
050eef364a
8 changed files with 28 additions and 6 deletions
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@ -97,6 +97,7 @@ static inline pte_t huge_ptep_get_and_clear(struct mm_struct *mm,
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{
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pte_t pte = huge_ptep_get(ptep);
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mm->context.flush_mm = 1;
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pmd_clear((pmd_t *) ptep);
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return pte;
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}
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@ -167,7 +168,8 @@ static inline void huge_ptep_invalidate(struct mm_struct *mm,
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({ \
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pte_t __pte = huge_ptep_get(__ptep); \
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if (pte_write(__pte)) { \
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if (atomic_read(&(__mm)->mm_users) > 1 || \
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(__mm)->context.flush_mm = 1; \
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if (atomic_read(&(__mm)->context.attach_count) > 1 || \
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(__mm) != current->active_mm) \
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huge_ptep_invalidate(__mm, __addr, __ptep); \
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set_huge_pte_at(__mm, __addr, __ptep, \
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@ -2,6 +2,8 @@
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#define __MMU_H
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typedef struct {
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atomic_t attach_count;
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unsigned int flush_mm;
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spinlock_t list_lock;
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struct list_head crst_list;
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struct list_head pgtable_list;
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@ -11,11 +11,14 @@
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#include <asm/pgalloc.h>
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#include <asm/uaccess.h>
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#include <asm/tlbflush.h>
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#include <asm-generic/mm_hooks.h>
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static inline int init_new_context(struct task_struct *tsk,
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struct mm_struct *mm)
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{
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atomic_set(&mm->context.attach_count, 0);
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mm->context.flush_mm = 0;
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mm->context.asce_bits = _ASCE_TABLE_LENGTH | _ASCE_USER_BITS;
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#ifdef CONFIG_64BIT
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mm->context.asce_bits |= _ASCE_TYPE_REGION3;
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@ -76,6 +79,12 @@ static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
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{
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cpumask_set_cpu(smp_processor_id(), mm_cpumask(next));
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update_mm(next, tsk);
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atomic_dec(&prev->context.attach_count);
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WARN_ON(atomic_read(&prev->context.attach_count) < 0);
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atomic_inc(&next->context.attach_count);
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/* Check for TLBs not flushed yet */
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if (next->context.flush_mm)
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__tlb_flush_mm(next);
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}
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#define enter_lazy_tlb(mm,tsk) do { } while (0)
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@ -880,7 +880,8 @@ static inline void ptep_invalidate(struct mm_struct *mm,
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#define ptep_get_and_clear(__mm, __address, __ptep) \
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({ \
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pte_t __pte = *(__ptep); \
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if (atomic_read(&(__mm)->mm_users) > 1 || \
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(__mm)->context.flush_mm = 1; \
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if (atomic_read(&(__mm)->context.attach_count) > 1 || \
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(__mm) != current->active_mm) \
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ptep_invalidate(__mm, __address, __ptep); \
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else \
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@ -923,7 +924,8 @@ static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm,
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({ \
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pte_t __pte = *(__ptep); \
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if (pte_write(__pte)) { \
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if (atomic_read(&(__mm)->mm_users) > 1 || \
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(__mm)->context.flush_mm = 1; \
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if (atomic_read(&(__mm)->context.attach_count) > 1 || \
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(__mm) != current->active_mm) \
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ptep_invalidate(__mm, __addr, __ptep); \
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set_pte_at(__mm, __addr, __ptep, pte_wrprotect(__pte)); \
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@ -50,8 +50,7 @@ static inline struct mmu_gather *tlb_gather_mmu(struct mm_struct *mm,
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struct mmu_gather *tlb = &get_cpu_var(mmu_gathers);
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tlb->mm = mm;
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tlb->fullmm = full_mm_flush || (num_online_cpus() == 1) ||
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(atomic_read(&mm->mm_users) <= 1 && mm == current->active_mm);
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tlb->fullmm = full_mm_flush;
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tlb->nr_ptes = 0;
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tlb->nr_pxds = TLB_NR_PTRS;
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if (tlb->fullmm)
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@ -94,8 +94,12 @@ static inline void __tlb_flush_mm(struct mm_struct * mm)
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static inline void __tlb_flush_mm_cond(struct mm_struct * mm)
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{
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if (atomic_read(&mm->mm_users) <= 1 && mm == current->active_mm)
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spin_lock(&mm->page_table_lock);
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if (mm->context.flush_mm) {
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__tlb_flush_mm(mm);
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mm->context.flush_mm = 0;
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}
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spin_unlock(&mm->page_table_lock);
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}
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/*
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@ -583,6 +583,7 @@ int __cpuinit __cpu_up(unsigned int cpu)
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sf->gprs[9] = (unsigned long) sf;
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cpu_lowcore->save_area[15] = (unsigned long) sf;
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__ctl_store(cpu_lowcore->cregs_save_area, 0, 15);
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atomic_inc(&init_mm.context.attach_count);
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asm volatile(
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" stam 0,15,0(%0)"
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: : "a" (&cpu_lowcore->access_regs_save_area) : "memory");
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@ -659,6 +660,7 @@ void __cpu_die(unsigned int cpu)
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while (sigp_p(0, cpu, sigp_set_prefix) == sigp_busy)
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udelay(10);
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smp_free_lowcore(cpu);
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atomic_dec(&init_mm.context.attach_count);
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pr_info("Processor %d stopped\n", cpu);
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}
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@ -74,6 +74,8 @@ void __init paging_init(void)
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__ctl_load(S390_lowcore.kernel_asce, 13, 13);
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__raw_local_irq_ssm(ssm_mask);
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atomic_set(&init_mm.context.attach_count, 1);
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sparse_memory_present_with_active_regions(MAX_NUMNODES);
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sparse_init();
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memset(max_zone_pfns, 0, sizeof(max_zone_pfns));
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