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cpufreq: powernv: Handle throttling due to Pmax capping at chip level
The On-Chip-Controller(OCC) can throttle cpu frequency by reducing the max allowed frequency for that chip if the chip exceeds its power or temperature limits. As Pmax capping is a chip level condition report this throttling behavior at chip level and also do not set the global 'throttled' on Pmax capping instead set the per-chip throttled variable. Report unthrottling if Pmax is restored after throttling. This patch adds a structure to store chip id and throttled state of the chip. Signed-off-by: Shilpasri G Bhat <shilpa.bhat@linux.vnet.ibm.com> Reviewed-by: Preeti U Murthy <preeti@linux.vnet.ibm.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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parent
a34e63b144
commit
053819e0bf
1 changed files with 55 additions and 4 deletions
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@ -27,6 +27,7 @@
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#include <linux/smp.h>
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#include <linux/of.h>
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#include <linux/reboot.h>
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#include <linux/slab.h>
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#include <asm/cputhreads.h>
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#include <asm/firmware.h>
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@ -42,6 +43,13 @@
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static struct cpufreq_frequency_table powernv_freqs[POWERNV_MAX_PSTATES+1];
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static bool rebooting, throttled;
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static struct chip {
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unsigned int id;
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bool throttled;
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} *chips;
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static int nr_chips;
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/*
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* Note: The set of pstates consists of contiguous integers, the
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* smallest of which is indicated by powernv_pstate_info.min, the
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@ -301,22 +309,33 @@ static inline unsigned int get_nominal_index(void)
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static void powernv_cpufreq_throttle_check(unsigned int cpu)
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{
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unsigned long pmsr;
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int pmsr_pmax, pmsr_lp;
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int pmsr_pmax, pmsr_lp, i;
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pmsr = get_pmspr(SPRN_PMSR);
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for (i = 0; i < nr_chips; i++)
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if (chips[i].id == cpu_to_chip_id(cpu))
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break;
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/* Check for Pmax Capping */
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pmsr_pmax = (s8)PMSR_MAX(pmsr);
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if (pmsr_pmax != powernv_pstate_info.max) {
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throttled = true;
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pr_info("CPU %d Pmax is reduced to %d\n", cpu, pmsr_pmax);
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pr_info("Max allowed Pstate is capped\n");
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if (chips[i].throttled)
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goto next;
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chips[i].throttled = true;
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pr_info("CPU %d on Chip %u has Pmax reduced to %d\n", cpu,
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chips[i].id, pmsr_pmax);
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} else if (chips[i].throttled) {
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chips[i].throttled = false;
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pr_info("CPU %d on Chip %u has Pmax restored to %d\n", cpu,
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chips[i].id, pmsr_pmax);
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}
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/*
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* Check for Psafe by reading LocalPstate
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* or check if Psafe_mode_active is set in PMSR.
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*/
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next:
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pmsr_lp = (s8)PMSR_LP(pmsr);
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if ((pmsr_lp < powernv_pstate_info.min) ||
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(pmsr & PMSR_PSAFE_ENABLE)) {
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@ -414,6 +433,33 @@ static struct cpufreq_driver powernv_cpufreq_driver = {
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.attr = powernv_cpu_freq_attr,
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};
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static int init_chip_info(void)
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{
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unsigned int chip[256];
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unsigned int cpu, i;
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unsigned int prev_chip_id = UINT_MAX;
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for_each_possible_cpu(cpu) {
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unsigned int id = cpu_to_chip_id(cpu);
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if (prev_chip_id != id) {
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prev_chip_id = id;
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chip[nr_chips++] = id;
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}
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}
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chips = kmalloc_array(nr_chips, sizeof(struct chip), GFP_KERNEL);
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if (!chips)
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return -ENOMEM;
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for (i = 0; i < nr_chips; i++) {
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chips[i].id = chip[i];
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chips[i].throttled = false;
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}
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return 0;
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}
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static int __init powernv_cpufreq_init(void)
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{
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int rc = 0;
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@ -429,6 +475,11 @@ static int __init powernv_cpufreq_init(void)
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return rc;
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}
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/* Populate chip info */
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rc = init_chip_info();
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if (rc)
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return rc;
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register_reboot_notifier(&powernv_cpufreq_reboot_nb);
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return cpufreq_register_driver(&powernv_cpufreq_driver);
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}
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