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drm/i915: Give g4x_{dp,hdmi}.c g4x_ namespace
s/intel_/g4x_/ for the externally visible g4x_{dp,hdmi}.c functions. Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210318161015.22070-8-ville.syrjala@linux.intel.com
This commit is contained in:
parent
33e9e54173
commit
053ffdd164
6 changed files with 45 additions and 47 deletions
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@ -66,8 +66,8 @@ const struct dpll *vlv_get_dpll(struct drm_i915_private *i915)
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return IS_CHERRYVIEW(i915) ? &chv_dpll[0].dpll : &vlv_dpll[0].dpll;
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}
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void intel_dp_set_clock(struct intel_encoder *encoder,
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struct intel_crtc_state *pipe_config)
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void g4x_dp_set_clock(struct intel_encoder *encoder,
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struct intel_crtc_state *pipe_config)
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{
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struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
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const struct dp_link_dpll *divisor = NULL;
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@ -286,9 +286,9 @@ static bool cpt_dp_port_selected(struct drm_i915_private *dev_priv,
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return false;
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}
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bool intel_dp_port_enabled(struct drm_i915_private *dev_priv,
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i915_reg_t dp_reg, enum port port,
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enum pipe *pipe)
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bool g4x_dp_port_enabled(struct drm_i915_private *dev_priv,
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i915_reg_t dp_reg, enum port port,
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enum pipe *pipe)
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{
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bool ret;
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u32 val;
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@ -323,8 +323,8 @@ static bool intel_dp_get_hw_state(struct intel_encoder *encoder,
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if (!wakeref)
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return false;
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ret = intel_dp_port_enabled(dev_priv, intel_dp->output_reg,
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encoder->port, pipe);
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ret = g4x_dp_port_enabled(dev_priv, intel_dp->output_reg,
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encoder->port, pipe);
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intel_display_power_put(dev_priv, encoder->power_domain, wakeref);
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@ -1270,8 +1270,8 @@ enum pipe vlv_active_pipe(struct intel_dp *intel_dp)
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struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
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enum pipe pipe;
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if (intel_dp_port_enabled(dev_priv, intel_dp->output_reg,
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encoder->port, &pipe))
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if (g4x_dp_port_enabled(dev_priv, intel_dp->output_reg,
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encoder->port, &pipe))
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return pipe;
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return INVALID_PIPE;
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@ -1301,9 +1301,8 @@ static const struct drm_encoder_funcs intel_dp_enc_funcs = {
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.destroy = intel_dp_encoder_destroy,
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};
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bool intel_dp_init(struct drm_i915_private *dev_priv,
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i915_reg_t output_reg,
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enum port port)
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bool g4x_dp_init(struct drm_i915_private *dev_priv,
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i915_reg_t output_reg, enum port port)
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{
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struct intel_digital_port *dig_port;
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struct intel_encoder *intel_encoder;
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@ -19,13 +19,12 @@ struct intel_encoder;
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const struct dpll *vlv_get_dpll(struct drm_i915_private *i915);
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enum pipe vlv_active_pipe(struct intel_dp *intel_dp);
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void intel_dp_set_clock(struct intel_encoder *encoder,
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struct intel_crtc_state *pipe_config);
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bool intel_dp_port_enabled(struct drm_i915_private *dev_priv,
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i915_reg_t dp_reg, enum port port,
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enum pipe *pipe);
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bool intel_dp_init(struct drm_i915_private *dev_priv,
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i915_reg_t output_reg,
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enum port port);
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void g4x_dp_set_clock(struct intel_encoder *encoder,
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struct intel_crtc_state *pipe_config);
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bool g4x_dp_port_enabled(struct drm_i915_private *dev_priv,
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i915_reg_t dp_reg, enum port port,
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enum pipe *pipe);
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bool g4x_dp_init(struct drm_i915_private *dev_priv,
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i915_reg_t output_reg, enum port port);
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#endif
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@ -528,8 +528,8 @@ intel_hdmi_hotplug(struct intel_encoder *encoder,
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return state;
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}
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void intel_hdmi_init(struct drm_i915_private *dev_priv,
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i915_reg_t hdmi_reg, enum port port)
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void g4x_hdmi_init(struct drm_i915_private *dev_priv,
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i915_reg_t hdmi_reg, enum port port)
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{
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struct intel_digital_port *dig_port;
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struct intel_encoder *intel_encoder;
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@ -13,7 +13,7 @@
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enum port;
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struct drm_i915_private;
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void intel_hdmi_init(struct drm_i915_private *dev_priv,
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i915_reg_t hdmi_reg, enum port port);
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void g4x_hdmi_init(struct drm_i915_private *dev_priv,
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i915_reg_t hdmi_reg, enum port port);
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#endif
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@ -406,13 +406,13 @@ void assert_panel_unlocked(struct drm_i915_private *dev_priv, enum pipe pipe)
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intel_lvds_port_enabled(dev_priv, PCH_LVDS, &panel_pipe);
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break;
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case PANEL_PORT_SELECT_DPA:
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intel_dp_port_enabled(dev_priv, DP_A, PORT_A, &panel_pipe);
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g4x_dp_port_enabled(dev_priv, DP_A, PORT_A, &panel_pipe);
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break;
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case PANEL_PORT_SELECT_DPC:
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intel_dp_port_enabled(dev_priv, PCH_DP_C, PORT_C, &panel_pipe);
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g4x_dp_port_enabled(dev_priv, PCH_DP_C, PORT_C, &panel_pipe);
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break;
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case PANEL_PORT_SELECT_DPD:
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intel_dp_port_enabled(dev_priv, PCH_DP_D, PORT_D, &panel_pipe);
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g4x_dp_port_enabled(dev_priv, PCH_DP_D, PORT_D, &panel_pipe);
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break;
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default:
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MISSING_CASE(port_sel);
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@ -515,7 +515,7 @@ static void assert_pch_dp_disabled(struct drm_i915_private *dev_priv,
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enum pipe port_pipe;
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bool state;
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state = intel_dp_port_enabled(dev_priv, dp_reg, port, &port_pipe);
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state = g4x_dp_port_enabled(dev_priv, dp_reg, port, &port_pipe);
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I915_STATE_WARN(state && port_pipe == pipe,
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"PCH DP %c enabled on transcoder %c, should be disabled\n",
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@ -11755,28 +11755,28 @@ static void intel_setup_outputs(struct drm_i915_private *dev_priv)
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dpd_is_edp = intel_dp_is_port_edp(dev_priv, PORT_D);
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if (ilk_has_edp_a(dev_priv))
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intel_dp_init(dev_priv, DP_A, PORT_A);
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g4x_dp_init(dev_priv, DP_A, PORT_A);
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if (intel_de_read(dev_priv, PCH_HDMIB) & SDVO_DETECTED) {
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/* PCH SDVOB multiplex with HDMIB */
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found = intel_sdvo_init(dev_priv, PCH_SDVOB, PORT_B);
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if (!found)
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intel_hdmi_init(dev_priv, PCH_HDMIB, PORT_B);
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g4x_hdmi_init(dev_priv, PCH_HDMIB, PORT_B);
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if (!found && (intel_de_read(dev_priv, PCH_DP_B) & DP_DETECTED))
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intel_dp_init(dev_priv, PCH_DP_B, PORT_B);
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g4x_dp_init(dev_priv, PCH_DP_B, PORT_B);
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}
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if (intel_de_read(dev_priv, PCH_HDMIC) & SDVO_DETECTED)
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intel_hdmi_init(dev_priv, PCH_HDMIC, PORT_C);
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g4x_hdmi_init(dev_priv, PCH_HDMIC, PORT_C);
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if (!dpd_is_edp && intel_de_read(dev_priv, PCH_HDMID) & SDVO_DETECTED)
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intel_hdmi_init(dev_priv, PCH_HDMID, PORT_D);
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g4x_hdmi_init(dev_priv, PCH_HDMID, PORT_D);
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if (intel_de_read(dev_priv, PCH_DP_C) & DP_DETECTED)
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intel_dp_init(dev_priv, PCH_DP_C, PORT_C);
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g4x_dp_init(dev_priv, PCH_DP_C, PORT_C);
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if (intel_de_read(dev_priv, PCH_DP_D) & DP_DETECTED)
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intel_dp_init(dev_priv, PCH_DP_D, PORT_D);
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g4x_dp_init(dev_priv, PCH_DP_D, PORT_D);
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} else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
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bool has_edp, has_port;
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@ -11801,16 +11801,16 @@ static void intel_setup_outputs(struct drm_i915_private *dev_priv)
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has_edp = intel_dp_is_port_edp(dev_priv, PORT_B);
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has_port = intel_bios_is_port_present(dev_priv, PORT_B);
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if (intel_de_read(dev_priv, VLV_DP_B) & DP_DETECTED || has_port)
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has_edp &= intel_dp_init(dev_priv, VLV_DP_B, PORT_B);
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has_edp &= g4x_dp_init(dev_priv, VLV_DP_B, PORT_B);
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if ((intel_de_read(dev_priv, VLV_HDMIB) & SDVO_DETECTED || has_port) && !has_edp)
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intel_hdmi_init(dev_priv, VLV_HDMIB, PORT_B);
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g4x_hdmi_init(dev_priv, VLV_HDMIB, PORT_B);
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has_edp = intel_dp_is_port_edp(dev_priv, PORT_C);
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has_port = intel_bios_is_port_present(dev_priv, PORT_C);
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if (intel_de_read(dev_priv, VLV_DP_C) & DP_DETECTED || has_port)
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has_edp &= intel_dp_init(dev_priv, VLV_DP_C, PORT_C);
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has_edp &= g4x_dp_init(dev_priv, VLV_DP_C, PORT_C);
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if ((intel_de_read(dev_priv, VLV_HDMIC) & SDVO_DETECTED || has_port) && !has_edp)
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intel_hdmi_init(dev_priv, VLV_HDMIC, PORT_C);
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g4x_hdmi_init(dev_priv, VLV_HDMIC, PORT_C);
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if (IS_CHERRYVIEW(dev_priv)) {
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/*
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@ -11819,9 +11819,9 @@ static void intel_setup_outputs(struct drm_i915_private *dev_priv)
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*/
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has_port = intel_bios_is_port_present(dev_priv, PORT_D);
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if (intel_de_read(dev_priv, CHV_DP_D) & DP_DETECTED || has_port)
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intel_dp_init(dev_priv, CHV_DP_D, PORT_D);
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g4x_dp_init(dev_priv, CHV_DP_D, PORT_D);
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if (intel_de_read(dev_priv, CHV_HDMID) & SDVO_DETECTED || has_port)
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intel_hdmi_init(dev_priv, CHV_HDMID, PORT_D);
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g4x_hdmi_init(dev_priv, CHV_HDMID, PORT_D);
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}
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vlv_dsi_init(dev_priv);
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@ -11842,11 +11842,11 @@ static void intel_setup_outputs(struct drm_i915_private *dev_priv)
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if (!found && IS_G4X(dev_priv)) {
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drm_dbg_kms(&dev_priv->drm,
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"probing HDMI on SDVOB\n");
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intel_hdmi_init(dev_priv, GEN4_HDMIB, PORT_B);
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g4x_hdmi_init(dev_priv, GEN4_HDMIB, PORT_B);
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}
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if (!found && IS_G4X(dev_priv))
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intel_dp_init(dev_priv, DP_B, PORT_B);
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g4x_dp_init(dev_priv, DP_B, PORT_B);
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}
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/* Before G4X SDVOC doesn't have its own detect register */
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@ -11861,14 +11861,14 @@ static void intel_setup_outputs(struct drm_i915_private *dev_priv)
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if (IS_G4X(dev_priv)) {
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drm_dbg_kms(&dev_priv->drm,
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"probing HDMI on SDVOC\n");
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intel_hdmi_init(dev_priv, GEN4_HDMIC, PORT_C);
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g4x_hdmi_init(dev_priv, GEN4_HDMIC, PORT_C);
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}
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if (IS_G4X(dev_priv))
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intel_dp_init(dev_priv, DP_C, PORT_C);
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g4x_dp_init(dev_priv, DP_C, PORT_C);
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}
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if (IS_G4X(dev_priv) && (intel_de_read(dev_priv, DP_D) & DP_DETECTED))
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intel_dp_init(dev_priv, DP_D, PORT_D);
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g4x_dp_init(dev_priv, DP_D, PORT_D);
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if (SUPPORTS_TV(dev_priv))
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intel_tv_init(dev_priv);
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@ -1780,7 +1780,7 @@ intel_dp_compute_config(struct intel_encoder *encoder,
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pipe_config->dp_m_n.gmch_m *= pipe_config->splitter.link_count;
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if (!HAS_DDI(dev_priv))
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intel_dp_set_clock(encoder, pipe_config);
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g4x_dp_set_clock(encoder, pipe_config);
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intel_vrr_compute_config(pipe_config, conn_state);
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intel_psr_compute_config(intel_dp, pipe_config);
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