mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-10-11 02:59:12 +00:00
dt-bindings: net: sun8i-emac: Convert the binding to a schemas
Switch our Allwinner H3 EMAC controller binding to a YAML schema to enable the DT validation. Since that controller is based on a Synopsys IP, let's add the validation to that schemas with a bunch of conditionals. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> Signed-off-by: Rob Herring <robh@kernel.org>
This commit is contained in:
Maxime Ripard
Rob Herring
parent
4b859450fa
commit
0569929d97
3 changed files with 336 additions and 201 deletions
|
|
@ -0,0 +1,321 @@
|
|||
# SPDX-License-Identifier: GPL-2.0
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/net/allwinner,sun8i-a83t-gmac.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Allwinner A83t EMAC Device Tree Bindings
|
||||
|
||||
maintainers:
|
||||
- Chen-Yu Tsai <wens@csie.org>
|
||||
- Maxime Ripard <maxime.ripard@bootlin.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
oneOf:
|
||||
- const: allwinner,sun8i-a83t-emac
|
||||
- const: allwinner,sun8i-h3-emac
|
||||
- const: allwinner,sun8i-r40-emac
|
||||
- const: allwinner,sun8i-v3s-emac
|
||||
- const: allwinner,sun50i-a64-emac
|
||||
- items:
|
||||
- const: allwinner,sun50i-h6-emac
|
||||
- const: allwinner,sun50i-a64-emac
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
interrupt-names:
|
||||
const: macirq
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
|
||||
clock-names:
|
||||
const: stmmaceth
|
||||
|
||||
syscon:
|
||||
$ref: /schemas/types.yaml#definitions/phandle
|
||||
description:
|
||||
Phandle to the device containing the EMAC or GMAC clock
|
||||
register
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- interrupt-names
|
||||
- clocks
|
||||
- clock-names
|
||||
- resets
|
||||
- reset-names
|
||||
- phy-connection-type
|
||||
- phy-handle
|
||||
- syscon
|
||||
|
||||
allOf:
|
||||
- $ref: "snps,dwmac.yaml#"
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- allwinner,sun8i-a83t-emac
|
||||
- allwinner,sun8i-h3-emac
|
||||
- allwinner,sun8i-v3s-emac
|
||||
- allwinner,sun50i-a64-emac
|
||||
|
||||
then:
|
||||
properties:
|
||||
allwinner,tx-delay-ps:
|
||||
default: 0
|
||||
minimum: 0
|
||||
maximum: 700
|
||||
multipleOf: 100
|
||||
description:
|
||||
External RGMII PHY TX clock delay chain value in ps.
|
||||
|
||||
allwinner,rx-delay-ps:
|
||||
default: 0
|
||||
minimum: 0
|
||||
maximum: 3100
|
||||
multipleOf: 100
|
||||
description:
|
||||
External RGMII PHY TX clock delay chain value in ps.
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- allwinner,sun8i-r40-emac
|
||||
|
||||
then:
|
||||
properties:
|
||||
allwinner,rx-delay-ps:
|
||||
default: 0
|
||||
minimum: 0
|
||||
maximum: 700
|
||||
multipleOf: 100
|
||||
description:
|
||||
External RGMII PHY TX clock delay chain value in ps.
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- allwinner,sun8i-h3-emac
|
||||
- allwinner,sun8i-v3s-emac
|
||||
|
||||
then:
|
||||
properties:
|
||||
allwinner,leds-active-low:
|
||||
$ref: /schemas/types.yaml#definitions/flag
|
||||
description:
|
||||
EPHY LEDs are active low.
|
||||
|
||||
mdio-mux:
|
||||
type: object
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: allwinner,sun8i-h3-mdio-mux
|
||||
|
||||
mdio-parent-bus:
|
||||
$ref: /schemas/types.yaml#definitions/phandle
|
||||
description:
|
||||
Phandle to EMAC MDIO.
|
||||
|
||||
mdio@1:
|
||||
type: object
|
||||
description: Internal MDIO Bus
|
||||
|
||||
properties:
|
||||
"#address-cells":
|
||||
const: 1
|
||||
|
||||
"#size-cells":
|
||||
const: 0
|
||||
|
||||
compatible:
|
||||
const: allwinner,sun8i-h3-mdio-internal
|
||||
|
||||
reg:
|
||||
const: 1
|
||||
|
||||
patternProperties:
|
||||
"^ethernet-phy@[0-9a-f]$":
|
||||
type: object
|
||||
description:
|
||||
Integrated PHY node
|
||||
|
||||
properties:
|
||||
clocks:
|
||||
maxItems: 1
|
||||
|
||||
resets:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- clocks
|
||||
- resets
|
||||
|
||||
|
||||
mdio@2:
|
||||
type: object
|
||||
description: External MDIO Bus (H3 only)
|
||||
|
||||
properties:
|
||||
"#address-cells":
|
||||
const: 1
|
||||
|
||||
"#size-cells":
|
||||
const: 0
|
||||
|
||||
reg:
|
||||
const: 2
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- mdio-parent-bus
|
||||
- mdio@1
|
||||
|
||||
examples:
|
||||
- |
|
||||
ethernet@1c0b000 {
|
||||
compatible = "allwinner,sun8i-h3-emac";
|
||||
syscon = <&syscon>;
|
||||
reg = <0x01c0b000 0x104>;
|
||||
interrupts = <0 82 1>;
|
||||
interrupt-names = "macirq";
|
||||
resets = <&ccu 12>;
|
||||
reset-names = "stmmaceth";
|
||||
clocks = <&ccu 27>;
|
||||
clock-names = "stmmaceth";
|
||||
|
||||
phy-handle = <&int_mii_phy>;
|
||||
phy-connection-type = "mii";
|
||||
allwinner,leds-active-low;
|
||||
|
||||
mdio1: mdio {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "snps,dwmac-mdio";
|
||||
};
|
||||
|
||||
mdio-mux {
|
||||
compatible = "allwinner,sun8i-h3-mdio-mux";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
mdio-parent-bus = <&mdio1>;
|
||||
|
||||
int_mii_phy: mdio@1 {
|
||||
compatible = "allwinner,sun8i-h3-mdio-internal";
|
||||
reg = <1>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
ethernet-phy@1 {
|
||||
reg = <1>;
|
||||
clocks = <&ccu 67>;
|
||||
resets = <&ccu 39>;
|
||||
phy-is-integrated;
|
||||
};
|
||||
};
|
||||
|
||||
mdio@2 {
|
||||
reg = <2>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
- |
|
||||
ethernet@1c0b000 {
|
||||
compatible = "allwinner,sun8i-h3-emac";
|
||||
syscon = <&syscon>;
|
||||
reg = <0x01c0b000 0x104>;
|
||||
interrupts = <0 82 1>;
|
||||
interrupt-names = "macirq";
|
||||
resets = <&ccu 12>;
|
||||
reset-names = "stmmaceth";
|
||||
clocks = <&ccu 27>;
|
||||
clock-names = "stmmaceth";
|
||||
|
||||
phy-handle = <&ext_rgmii_phy>;
|
||||
phy-connection-type = "rgmii";
|
||||
allwinner,leds-active-low;
|
||||
|
||||
mdio2: mdio {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "snps,dwmac-mdio";
|
||||
};
|
||||
|
||||
mdio-mux {
|
||||
compatible = "allwinner,sun8i-h3-mdio-mux";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
mdio-parent-bus = <&mdio2>;
|
||||
|
||||
mdio@1 {
|
||||
compatible = "allwinner,sun8i-h3-mdio-internal";
|
||||
reg = <1>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
ethernet-phy@1 {
|
||||
reg = <1>;
|
||||
clocks = <&ccu 67>;
|
||||
resets = <&ccu 39>;
|
||||
};
|
||||
};
|
||||
|
||||
mdio@2 {
|
||||
reg = <2>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
ext_rgmii_phy: ethernet-phy@1 {
|
||||
reg = <1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
- |
|
||||
ethernet@1c0b000 {
|
||||
compatible = "allwinner,sun8i-a83t-emac";
|
||||
syscon = <&syscon>;
|
||||
reg = <0x01c0b000 0x104>;
|
||||
interrupts = <0 82 1>;
|
||||
interrupt-names = "macirq";
|
||||
resets = <&ccu 13>;
|
||||
reset-names = "stmmaceth";
|
||||
clocks = <&ccu 27>;
|
||||
clock-names = "stmmaceth";
|
||||
phy-handle = <&ext_rgmii_phy1>;
|
||||
phy-connection-type = "rgmii";
|
||||
|
||||
mdio {
|
||||
compatible = "snps,dwmac-mdio";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
ext_rgmii_phy1: ethernet-phy@1 {
|
||||
reg = <1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
# FIXME: We should set it, but it would report all the generic
|
||||
# properties as additional properties.
|
||||
# additionalProperties: false
|
||||
|
||||
...
|
||||
|
|
@ -1,201 +0,0 @@
|
|||
* Allwinner sun8i GMAC ethernet controller
|
||||
|
||||
This device is a platform glue layer for stmmac.
|
||||
Please see stmmac.txt for the other unchanged properties.
|
||||
|
||||
Required properties:
|
||||
- compatible: must be one of the following string:
|
||||
"allwinner,sun8i-a83t-emac"
|
||||
"allwinner,sun8i-h3-emac"
|
||||
"allwinner,sun8i-r40-gmac"
|
||||
"allwinner,sun8i-v3s-emac"
|
||||
"allwinner,sun50i-a64-emac"
|
||||
"allwinner,sun50i-h6-emac", "allwinner-sun50i-a64-emac"
|
||||
- reg: address and length of the register for the device.
|
||||
- interrupts: interrupt for the device
|
||||
- interrupt-names: must be "macirq"
|
||||
- clocks: A phandle to the reference clock for this device
|
||||
- clock-names: must be "stmmaceth"
|
||||
- resets: A phandle to the reset control for this device
|
||||
- reset-names: must be "stmmaceth"
|
||||
- phy-mode: See ethernet.txt
|
||||
- phy-handle: See ethernet.txt
|
||||
- syscon: A phandle to the device containing the EMAC or GMAC clock register
|
||||
|
||||
Optional properties:
|
||||
- allwinner,tx-delay-ps: TX clock delay chain value in ps.
|
||||
Range is 0-700. Default is 0.
|
||||
Unavailable for allwinner,sun8i-r40-gmac
|
||||
- allwinner,rx-delay-ps: RX clock delay chain value in ps.
|
||||
Range is 0-3100. Default is 0.
|
||||
Range is 0-700 for allwinner,sun8i-r40-gmac
|
||||
Both delay properties need to be a multiple of 100. They control the
|
||||
clock delay for external RGMII PHY. They do not apply to the internal
|
||||
PHY or external non-RGMII PHYs.
|
||||
|
||||
Optional properties for the following compatibles:
|
||||
- "allwinner,sun8i-h3-emac",
|
||||
- "allwinner,sun8i-v3s-emac":
|
||||
- allwinner,leds-active-low: EPHY LEDs are active low
|
||||
|
||||
Required child node of emac:
|
||||
- mdio bus node: should be named mdio with compatible "snps,dwmac-mdio"
|
||||
|
||||
Required properties of the mdio node:
|
||||
- #address-cells: shall be 1
|
||||
- #size-cells: shall be 0
|
||||
|
||||
The device node referenced by "phy" or "phy-handle" must be a child node
|
||||
of the mdio node. See phy.txt for the generic PHY bindings.
|
||||
|
||||
The following compatibles require that the emac node have a mdio-mux child
|
||||
node called "mdio-mux":
|
||||
- "allwinner,sun8i-h3-emac"
|
||||
- "allwinner,sun8i-v3s-emac":
|
||||
Required properties for the mdio-mux node:
|
||||
- compatible = "allwinner,sun8i-h3-mdio-mux"
|
||||
- mdio-parent-bus: a phandle to EMAC mdio
|
||||
- one child mdio for the integrated mdio with the compatible
|
||||
"allwinner,sun8i-h3-mdio-internal"
|
||||
- one child mdio for the external mdio if present (V3s have none)
|
||||
Required properties for the mdio-mux children node:
|
||||
- reg: 1 for internal MDIO bus, 2 for external MDIO bus
|
||||
|
||||
The following compatibles require a PHY node representing the integrated
|
||||
PHY, under the integrated MDIO bus node if an mdio-mux node is used:
|
||||
- "allwinner,sun8i-h3-emac",
|
||||
- "allwinner,sun8i-v3s-emac":
|
||||
|
||||
Additional information regarding generic multiplexer properties can be found
|
||||
at Documentation/devicetree/bindings/net/mdio-mux.txt
|
||||
|
||||
Required properties of the integrated phy node:
|
||||
- clocks: a phandle to the reference clock for the EPHY
|
||||
- resets: a phandle to the reset control for the EPHY
|
||||
- Must be a child of the integrated mdio
|
||||
|
||||
Example with integrated PHY:
|
||||
emac: ethernet@1c0b000 {
|
||||
compatible = "allwinner,sun8i-h3-emac";
|
||||
syscon = <&syscon>;
|
||||
reg = <0x01c0b000 0x104>;
|
||||
interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "macirq";
|
||||
resets = <&ccu RST_BUS_EMAC>;
|
||||
reset-names = "stmmaceth";
|
||||
clocks = <&ccu CLK_BUS_EMAC>;
|
||||
clock-names = "stmmaceth";
|
||||
|
||||
phy-handle = <&int_mii_phy>;
|
||||
phy-mode = "mii";
|
||||
allwinner,leds-active-low;
|
||||
|
||||
mdio: mdio {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "snps,dwmac-mdio";
|
||||
};
|
||||
|
||||
mdio-mux {
|
||||
compatible = "mdio-mux", "allwinner,sun8i-h3-mdio-mux";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
mdio-parent-bus = <&mdio>;
|
||||
|
||||
int_mdio: mdio@1 {
|
||||
compatible = "allwinner,sun8i-h3-mdio-internal";
|
||||
reg = <1>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
int_mii_phy: ethernet-phy@1 {
|
||||
reg = <1>;
|
||||
clocks = <&ccu CLK_BUS_EPHY>;
|
||||
resets = <&ccu RST_BUS_EPHY>;
|
||||
phy-is-integrated;
|
||||
};
|
||||
};
|
||||
ext_mdio: mdio@2 {
|
||||
reg = <2>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
Example with external PHY:
|
||||
emac: ethernet@1c0b000 {
|
||||
compatible = "allwinner,sun8i-h3-emac";
|
||||
syscon = <&syscon>;
|
||||
reg = <0x01c0b000 0x104>;
|
||||
interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "macirq";
|
||||
resets = <&ccu RST_BUS_EMAC>;
|
||||
reset-names = "stmmaceth";
|
||||
clocks = <&ccu CLK_BUS_EMAC>;
|
||||
clock-names = "stmmaceth";
|
||||
|
||||
phy-handle = <&ext_rgmii_phy>;
|
||||
phy-mode = "rgmii";
|
||||
allwinner,leds-active-low;
|
||||
|
||||
mdio: mdio {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "snps,dwmac-mdio";
|
||||
};
|
||||
|
||||
mdio-mux {
|
||||
compatible = "allwinner,sun8i-h3-mdio-mux";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
mdio-parent-bus = <&mdio>;
|
||||
|
||||
int_mdio: mdio@1 {
|
||||
compatible = "allwinner,sun8i-h3-mdio-internal";
|
||||
reg = <1>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
int_mii_phy: ethernet-phy@1 {
|
||||
reg = <1>;
|
||||
clocks = <&ccu CLK_BUS_EPHY>;
|
||||
resets = <&ccu RST_BUS_EPHY>;
|
||||
};
|
||||
};
|
||||
ext_mdio: mdio@2 {
|
||||
reg = <2>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
ext_rgmii_phy: ethernet-phy@1 {
|
||||
reg = <1>;
|
||||
};
|
||||
}:
|
||||
};
|
||||
};
|
||||
|
||||
Example with SoC without integrated PHY
|
||||
|
||||
emac: ethernet@1c0b000 {
|
||||
compatible = "allwinner,sun8i-a83t-emac";
|
||||
syscon = <&syscon>;
|
||||
reg = <0x01c0b000 0x104>;
|
||||
interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "macirq";
|
||||
resets = <&ccu RST_BUS_EMAC>;
|
||||
reset-names = "stmmaceth";
|
||||
clocks = <&ccu CLK_BUS_EMAC>;
|
||||
clock-names = "stmmaceth";
|
||||
|
||||
phy-handle = <&ext_rgmii_phy>;
|
||||
phy-mode = "rgmii";
|
||||
|
||||
mdio: mdio {
|
||||
compatible = "snps,dwmac-mdio";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
ext_rgmii_phy: ethernet-phy@1 {
|
||||
reg = <1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -45,6 +45,11 @@ properties:
|
|||
contains:
|
||||
enum:
|
||||
- allwinner,sun7i-a20-gmac
|
||||
- allwinner,sun8i-a83t-emac
|
||||
- allwinner,sun8i-h3-emac
|
||||
- allwinner,sun8i-r40-emac
|
||||
- allwinner,sun8i-v3s-emac
|
||||
- allwinner,sun50i-a64-emac
|
||||
- snps,dwmac
|
||||
- snps,dwmac-3.50a
|
||||
- snps,dwmac-3.610
|
||||
|
|
@ -267,6 +272,11 @@ allOf:
|
|||
contains:
|
||||
enum:
|
||||
- allwinner,sun7i-a20-gmac
|
||||
- allwinner,sun8i-a83t-emac
|
||||
- allwinner,sun8i-h3-emac
|
||||
- allwinner,sun8i-r40-emac
|
||||
- allwinner,sun8i-v3s-emac
|
||||
- allwinner,sun50i-a64-emac
|
||||
- snps,dwxgmac
|
||||
- snps,dwxgmac-2.10
|
||||
- st,spear600-gmac
|
||||
|
|
@ -308,6 +318,11 @@ allOf:
|
|||
contains:
|
||||
enum:
|
||||
- allwinner,sun7i-a20-gmac
|
||||
- allwinner,sun8i-a83t-emac
|
||||
- allwinner,sun8i-h3-emac
|
||||
- allwinner,sun8i-r40-emac
|
||||
- allwinner,sun8i-v3s-emac
|
||||
- allwinner,sun50i-a64-emac
|
||||
- snps,dwmac-4.00
|
||||
- snps,dwmac-4.10a
|
||||
- snps,dwxgmac
|
||||
|
|
|
|||
Loading…
Reference in a new issue