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ARM: OMAP4+: Prevent CPU1 related hang with kexec
Kexec booted kernels on omap4 will hang early during the boot if the booted kernel is different version from the previous kernel. This is because the previous kernel may have configured low-power mode using CPU1_WAKEUP_NS_PA_ADDR. In that case it points to the previous kernel's omap4_secondary_startup(), and CPU1 can be in low power mode from the previous kernel. When the new kernel configures the CPU1 clockdomain, CPU1 can wake from low power state prematurely during omap44xx_clockdomains_init() running random code. Let's fix the issue by configuring CPU1_WAKEUP_NS_PA_ADDR before we call omap44xx_clockdomains_init(). Note that this is very early during the init, and we will do proper CPU1 reset during SMP init a bit later on in omap4_smp_prepare_cpus(). And we need to do this when SMP is not enabled as the previous kernel may have had it enabled. Acked-by: Santosh Shilimkar <ssantosh@kernel.org> Tested-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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parent
f4b9f40ae9
commit
0573b957fc
4 changed files with 32 additions and 8 deletions
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@ -8,7 +8,7 @@ ccflags-y := -I$(srctree)/$(src)/include \
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# Common support
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obj-y := id.o io.o control.o mux.o devices.o fb.o serial.o timer.o pm.o \
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common.o gpio.o dma.o wd_timer.o display.o i2c.o hdq1w.o omap_hwmod.o \
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omap_device.o sram.o drm.o
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omap_device.o omap-headsmp.o sram.o drm.o
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hwmod-common = omap_hwmod.o omap_hwmod_reset.o \
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omap_hwmod_common_data.o
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@ -32,7 +32,7 @@ obj-$(CONFIG_SOC_HAS_OMAP2_SDRC) += sdrc.o
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# SMP support ONLY available for OMAP4
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smp-$(CONFIG_SMP) += omap-smp.o omap-headsmp.o
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smp-$(CONFIG_SMP) += omap-smp.o
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smp-$(CONFIG_HOTPLUG_CPU) += omap-hotplug.o
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omap-4-5-common = omap4-common.o omap-wakeupgen.o
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obj-$(CONFIG_ARCH_OMAP4) += $(omap-4-5-common) $(smp-y) sleep44xx.o
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@ -259,12 +259,14 @@ extern void gic_timer_retrigger(void);
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extern void omap_smc1(u32 fn, u32 arg);
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extern void omap4_sar_ram_init(void);
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extern void __iomem *omap4_get_sar_ram_base(void);
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extern void omap4_mpuss_early_init(void);
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extern void omap_do_wfi(void);
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extern void omap4_secondary_startup(void);
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extern void omap4460_secondary_startup(void);
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#ifdef CONFIG_SMP
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/* Needed for secondary core boot */
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extern void omap4_secondary_startup(void);
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extern void omap4460_secondary_startup(void);
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extern u32 omap_modify_auxcoreboot0(u32 set_mask, u32 clear_mask);
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extern void omap_auxcoreboot_addr(u32 cpu_addr);
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extern u32 omap_read_auxcoreboot0(void);
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@ -691,6 +691,7 @@ void __init omap4430_init_early(void)
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omap4xxx_check_features();
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omap2_prcm_base_init();
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omap4_sar_ram_init();
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omap4_mpuss_early_init();
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omap4_pm_init_early();
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omap44xx_voltagedomains_init();
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omap44xx_powerdomains_init();
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@ -62,6 +62,8 @@
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#include "prm44xx.h"
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#include "prm-regbits-44xx.h"
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static void __iomem *sar_base;
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#ifdef CONFIG_SMP
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struct omap4_cpu_pm_info {
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@ -90,7 +92,6 @@ struct cpu_pm_ops {
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static DEFINE_PER_CPU(struct omap4_cpu_pm_info, omap4_pm_info);
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static struct powerdomain *mpuss_pd;
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static void __iomem *sar_base;
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static u32 cpu_context_offset;
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static int default_finish_suspend(unsigned long cpu_state)
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@ -366,9 +367,6 @@ int __init omap4_mpuss_init(void)
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return -ENODEV;
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}
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if (cpu_is_omap44xx())
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sar_base = omap4_get_sar_ram_base();
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/* Initilaise per CPU PM information */
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pm_info = &per_cpu(omap4_pm_info, 0x0);
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if (sar_base) {
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@ -444,3 +442,26 @@ int __init omap4_mpuss_init(void)
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}
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#endif
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/*
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* For kexec, we must set CPU1_WAKEUP_NS_PA_ADDR to point to
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* current kernel's secondary_startup() early before
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* clockdomains_init(). Otherwise clockdomain_init() can
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* wake CPU1 and cause a hang.
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*/
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void __init omap4_mpuss_early_init(void)
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{
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unsigned long startup_pa;
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if (!cpu_is_omap44xx())
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return;
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sar_base = omap4_get_sar_ram_base();
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if (cpu_is_omap443x())
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startup_pa = virt_to_phys(omap4_secondary_startup);
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else
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startup_pa = virt_to_phys(omap4460_secondary_startup);
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writel_relaxed(startup_pa, sar_base + CPU1_WAKEUP_NS_PA_ADDR_OFFSET);
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}
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