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ARM: OMAP2+: Drop legacy platform data for omap4 l4_cfg
We can now probe interconnects with simple-pm-bus and genpd. Signed-off-by: Tony Lindgren <tony@atomide.com>
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6dd3c92597
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1 changed files with 0 additions and 98 deletions
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@ -92,27 +92,6 @@ static struct omap_hwmod omap44xx_l3_main_3_hwmod = {
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},
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};
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/*
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* 'l4' class
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* instance(s): l4_abe, l4_cfg
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*/
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static struct omap_hwmod_class omap44xx_l4_hwmod_class = {
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.name = "l4",
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};
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/* l4_cfg */
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static struct omap_hwmod omap44xx_l4_cfg_hwmod = {
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.name = "l4_cfg",
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.class = &omap44xx_l4_hwmod_class,
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.clkdm_name = "l4_cfg_clkdm",
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.prcm = {
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.omap4 = {
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.clkctrl_offs = OMAP4_CM_L4CFG_L4_CFG_CLKCTRL_OFFSET,
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.context_offs = OMAP4_RM_L4CFG_L4_CFG_CONTEXT_OFFSET,
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},
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},
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};
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/*
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* 'ocp_wp_noc' class
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* instance(s): ocp_wp_noc
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@ -168,29 +147,6 @@ static struct omap_hwmod omap44xx_ocmc_ram_hwmod = {
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},
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};
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/*
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* 'prcm' class
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* power and reset manager (part of the prcm infrastructure) + clock manager 2
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* + clock manager 1 (in always on power domain) + local prm in mpu
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*/
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static struct omap_hwmod_class omap44xx_prcm_hwmod_class = {
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.name = "prcm",
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};
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/* cm_core */
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static struct omap_hwmod omap44xx_cm_core_hwmod = {
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.name = "cm_core",
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.class = &omap44xx_prcm_hwmod_class,
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.flags = HWMOD_NO_IDLEST,
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.prcm = {
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.omap4 = {
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.flags = HWMOD_OMAP4_NO_CONTEXT_LOSS_BIT,
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},
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},
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};
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/*
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* 'sl2if' class
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* shared level 2 memory interface
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@ -242,14 +198,6 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_2__l3_main_1 = {
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l4_cfg -> l3_main_1 */
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static struct omap_hwmod_ocp_if omap44xx_l4_cfg__l3_main_1 = {
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.master = &omap44xx_l4_cfg_hwmod,
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.slave = &omap44xx_l3_main_1_hwmod,
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.clk = "l4_div_ck",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l3_main_1 -> l3_main_2 */
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static struct omap_hwmod_ocp_if omap44xx_l3_main_1__l3_main_2 = {
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.master = &omap44xx_l3_main_1_hwmod,
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@ -258,14 +206,6 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_1__l3_main_2 = {
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.user = OCP_USER_MPU,
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};
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/* l4_cfg -> l3_main_2 */
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static struct omap_hwmod_ocp_if omap44xx_l4_cfg__l3_main_2 = {
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.master = &omap44xx_l4_cfg_hwmod,
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.slave = &omap44xx_l3_main_2_hwmod,
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.clk = "l4_div_ck",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l3_main_1 -> l3_main_3 */
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static struct omap_hwmod_ocp_if omap44xx_l3_main_1__l3_main_3 = {
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.master = &omap44xx_l3_main_1_hwmod,
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@ -282,30 +222,6 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_2__l3_main_3 = {
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l4_cfg -> l3_main_3 */
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static struct omap_hwmod_ocp_if omap44xx_l4_cfg__l3_main_3 = {
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.master = &omap44xx_l4_cfg_hwmod,
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.slave = &omap44xx_l3_main_3_hwmod,
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.clk = "l4_div_ck",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l3_main_1 -> l4_cfg */
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static struct omap_hwmod_ocp_if omap44xx_l3_main_1__l4_cfg = {
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.master = &omap44xx_l3_main_1_hwmod,
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.slave = &omap44xx_l4_cfg_hwmod,
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.clk = "l3_div_ck",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l4_cfg -> ocp_wp_noc */
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static struct omap_hwmod_ocp_if omap44xx_l4_cfg__ocp_wp_noc = {
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.master = &omap44xx_l4_cfg_hwmod,
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.slave = &omap44xx_ocp_wp_noc_hwmod,
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.clk = "l4_div_ck",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l3_main_2 -> ocmc_ram */
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static struct omap_hwmod_ocp_if omap44xx_l3_main_2__ocmc_ram = {
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.master = &omap44xx_l3_main_2_hwmod,
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@ -314,14 +230,6 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_2__ocmc_ram = {
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l4_cfg -> cm_core */
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static struct omap_hwmod_ocp_if omap44xx_l4_cfg__cm_core = {
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.master = &omap44xx_l4_cfg_hwmod,
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.slave = &omap44xx_cm_core_hwmod,
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.clk = "l4_div_ck",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l3_main_2 -> sl2if */
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static struct omap_hwmod_ocp_if __maybe_unused omap44xx_l3_main_2__sl2if = {
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.master = &omap44xx_l3_main_2_hwmod,
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@ -334,16 +242,10 @@ static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = {
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&omap44xx_l3_main_3__l3_instr,
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&omap44xx_ocp_wp_noc__l3_instr,
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&omap44xx_l3_main_2__l3_main_1,
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&omap44xx_l4_cfg__l3_main_1,
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&omap44xx_l3_main_1__l3_main_2,
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&omap44xx_l4_cfg__l3_main_2,
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&omap44xx_l3_main_1__l3_main_3,
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&omap44xx_l3_main_2__l3_main_3,
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&omap44xx_l4_cfg__l3_main_3,
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&omap44xx_l3_main_1__l4_cfg,
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&omap44xx_l4_cfg__ocp_wp_noc,
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&omap44xx_l3_main_2__ocmc_ram,
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&omap44xx_l4_cfg__cm_core,
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/* &omap44xx_l3_main_2__sl2if, */
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NULL,
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};
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