drm/amdgpu: Switch to aca bank for xgmi pcs err cnt
Instead of software managed counters. Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Yang Wang <kevinyang.wang@amd.com> Reviewed-by: Stanley.Yang <Stanley.Yang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -46,6 +46,8 @@
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#define MCA_REG__STATUS__ERRORCODEEXT(x) MCA_REG_FIELD(x, 21, 16)
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#define MCA_REG__STATUS__ERRORCODE(x) MCA_REG_FIELD(x, 15, 0)
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#define MCA_REG__MISC0__ERRCNT(x) MCA_REG_FIELD(x, 43, 32)
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#define MCA_REG__SYND__ERRORINFORMATION(x) MCA_REG_FIELD(x, 17, 0)
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enum amdgpu_mca_ip {
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@ -2537,13 +2537,15 @@ static int mca_pcs_xgmi_mca_get_err_count(const struct mca_ras_info *mca_ras, st
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uint32_t *count)
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{
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u32 ext_error_code;
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u32 err_cnt;
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ext_error_code = MCA_REG__STATUS__ERRORCODEEXT(entry->regs[MCA_REG_IDX_STATUS]);
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err_cnt = MCA_REG__MISC0__ERRCNT(entry->regs[MCA_REG_IDX_MISC0]);
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if (type == AMDGPU_MCA_ERROR_TYPE_UE && ext_error_code == 0)
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*count = 1;
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*count = err_cnt;
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else if (type == AMDGPU_MCA_ERROR_TYPE_CE && ext_error_code == 6)
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*count = 1;
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*count = err_cnt;
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return 0;
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}
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