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https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-08-27 19:29:37 +00:00
[PATCH] libata: Marvell function headers
adds helpful function header comments. Signed-off-by: Brett Russ <russb@emc.com> Signed-off-by: Jeff Garzik <jgarzik@pobox.com>
This commit is contained in:
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afb0edd922
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05b308e1df
1 changed files with 219 additions and 6 deletions
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@ -35,7 +35,7 @@
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#include <asm/io.h>
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#define DRV_NAME "sata_mv"
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#define DRV_VERSION "0.23"
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#define DRV_VERSION "0.24"
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enum {
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/* BAR's are enumerated in terms of pci_resource_start() terms */
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@ -406,6 +406,17 @@ static void mv_irq_clear(struct ata_port *ap)
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{
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}
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/**
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* mv_start_dma - Enable eDMA engine
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* @base: port base address
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* @pp: port private data
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*
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* Verify the local cache of the eDMA state is accurate with an
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* assert.
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*
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* LOCKING:
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* Inherited from caller.
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*/
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static void mv_start_dma(void __iomem *base, struct mv_port_priv *pp)
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{
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if (!(MV_PP_FLAG_EDMA_EN & pp->pp_flags)) {
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@ -415,6 +426,16 @@ static void mv_start_dma(void __iomem *base, struct mv_port_priv *pp)
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assert(EDMA_EN & readl(base + EDMA_CMD_OFS));
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}
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/**
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* mv_stop_dma - Disable eDMA engine
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* @ap: ATA channel to manipulate
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*
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* Verify the local cache of the eDMA state is accurate with an
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* assert.
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*
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* LOCKING:
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* Inherited from caller.
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*/
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static void mv_stop_dma(struct ata_port *ap)
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{
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void __iomem *port_mmio = mv_ap_base(ap);
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@ -561,7 +582,15 @@ static void mv_scr_write(struct ata_port *ap, unsigned int sc_reg_in, u32 val)
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}
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}
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/* This routine only applies to 6xxx parts */
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/**
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* mv_global_soft_reset - Perform the 6xxx global soft reset
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* @mmio_base: base address of the HBA
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*
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* This routine only applies to 6xxx parts.
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*
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* LOCKING:
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* Inherited from caller.
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*/
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static int mv_global_soft_reset(void __iomem *mmio_base)
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{
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void __iomem *reg = mmio_base + PCI_MAIN_CMD_STS_OFS;
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@ -617,6 +646,16 @@ static int mv_global_soft_reset(void __iomem *mmio_base)
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return rc;
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}
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/**
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* mv_host_stop - Host specific cleanup/stop routine.
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* @host_set: host data structure
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*
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* Disable ints, cleanup host memory, call general purpose
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* host_stop.
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*
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* LOCKING:
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* Inherited from caller.
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*/
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static void mv_host_stop(struct ata_host_set *host_set)
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{
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struct mv_host_priv *hpriv = host_set->private_data;
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@ -631,6 +670,16 @@ static void mv_host_stop(struct ata_host_set *host_set)
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ata_host_stop(host_set);
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}
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/**
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* mv_port_start - Port specific init/start routine.
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* @ap: ATA channel to manipulate
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*
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* Allocate and point to DMA memory, init port private memory,
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* zero indices.
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*
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* LOCKING:
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* Inherited from caller.
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*/
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static int mv_port_start(struct ata_port *ap)
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{
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struct device *dev = ap->host_set->dev;
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@ -699,6 +748,15 @@ static int mv_port_start(struct ata_port *ap)
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return 0;
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}
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/**
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* mv_port_stop - Port specific cleanup/stop routine.
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* @ap: ATA channel to manipulate
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*
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* Stop DMA, cleanup port memory.
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*
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* LOCKING:
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* This routine uses the host_set lock to protect the DMA stop.
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*/
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static void mv_port_stop(struct ata_port *ap)
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{
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struct device *dev = ap->host_set->dev;
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@ -714,6 +772,15 @@ static void mv_port_stop(struct ata_port *ap)
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kfree(pp);
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}
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/**
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* mv_fill_sg - Fill out the Marvell ePRD (scatter gather) entries
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* @qc: queued command whose SG list to source from
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*
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* Populate the SG list and mark the last entry.
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*
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* LOCKING:
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* Inherited from caller.
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*/
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static void mv_fill_sg(struct ata_queued_cmd *qc)
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{
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struct mv_port_priv *pp = qc->ap->private_data;
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@ -748,6 +815,18 @@ static inline void mv_crqb_pack_cmd(u16 *cmdw, u8 data, u8 addr, unsigned last)
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(last ? CRQB_CMD_LAST : 0);
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}
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/**
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* mv_qc_prep - Host specific command preparation.
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* @qc: queued command to prepare
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*
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* This routine simply redirects to the general purpose routine
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* if command is not DMA. Else, it handles prep of the CRQB
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* (command request block), does some sanity checking, and calls
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* the SG load routine.
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*
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* LOCKING:
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* Inherited from caller.
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*/
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static void mv_qc_prep(struct ata_queued_cmd *qc)
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{
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struct ata_port *ap = qc->ap;
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@ -830,6 +909,18 @@ static void mv_qc_prep(struct ata_queued_cmd *qc)
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mv_fill_sg(qc);
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}
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/**
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* mv_qc_issue - Initiate a command to the host
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* @qc: queued command to start
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*
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* This routine simply redirects to the general purpose routine
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* if command is not DMA. Else, it sanity checks our local
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* caches of the request producer/consumer indices then enables
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* DMA and bumps the request producer index.
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*
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* LOCKING:
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* Inherited from caller.
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*/
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static int mv_qc_issue(struct ata_queued_cmd *qc)
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{
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void __iomem *port_mmio = mv_ap_base(qc->ap);
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@ -867,6 +958,19 @@ static int mv_qc_issue(struct ata_queued_cmd *qc)
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return 0;
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}
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/**
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* mv_get_crpb_status - get status from most recently completed cmd
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* @ap: ATA channel to manipulate
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*
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* This routine is for use when the port is in DMA mode, when it
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* will be using the CRPB (command response block) method of
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* returning command completion information. We assert indices
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* are good, grab status, and bump the response consumer index to
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* prove that we're up to date.
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*
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* LOCKING:
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* Inherited from caller.
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*/
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static u8 mv_get_crpb_status(struct ata_port *ap)
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{
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void __iomem *port_mmio = mv_ap_base(ap);
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@ -896,6 +1000,19 @@ static u8 mv_get_crpb_status(struct ata_port *ap)
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return (pp->crpb[pp->rsp_consumer].flags >> CRPB_FLAG_STATUS_SHIFT);
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}
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/**
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* mv_err_intr - Handle error interrupts on the port
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* @ap: ATA channel to manipulate
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*
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* In most cases, just clear the interrupt and move on. However,
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* some cases require an eDMA reset, which is done right before
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* the COMRESET in mv_phy_reset(). The SERR case requires a
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* clear of pending errors in the SATA SERROR register. Finally,
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* if the port disabled DMA, update our cached copy to match.
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*
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* LOCKING:
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* Inherited from caller.
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*/
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static void mv_err_intr(struct ata_port *ap)
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{
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void __iomem *port_mmio = mv_ap_base(ap);
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@ -923,7 +1040,22 @@ static void mv_err_intr(struct ata_port *ap)
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}
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}
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/* Handle any outstanding interrupts in a single SATAHC */
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/**
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* mv_host_intr - Handle all interrupts on the given host controller
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* @host_set: host specific structure
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* @relevant: port error bits relevant to this host controller
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* @hc: which host controller we're to look at
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*
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* Read then write clear the HC interrupt status then walk each
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* port connected to the HC and see if it needs servicing. Port
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* success ints are reported in the HC interrupt status reg, the
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* port error ints are reported in the higher level main
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* interrupt status register and thus are passed in via the
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* 'relevant' argument.
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*
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* LOCKING:
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* Inherited from caller.
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*/
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static void mv_host_intr(struct ata_host_set *host_set, u32 relevant,
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unsigned int hc)
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{
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VPRINTK("EXIT\n");
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}
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/**
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* mv_interrupt -
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* @irq: unused
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* @dev_instance: private data; in this case the host structure
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* @regs: unused
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*
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* Read the read only register to determine if any host
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* controllers have pending interrupts. If so, call lower level
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* routine to handle. Also check for PCI errors which are only
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* reported here.
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*
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* LOCKING:
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* This routine holds the host_set lock while processing pending
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* interrupts.
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*/
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static irqreturn_t mv_interrupt(int irq, void *dev_instance,
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struct pt_regs *regs)
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{
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return IRQ_RETVAL(handled);
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}
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/**
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* mv_check_err - Return the error shadow register to caller.
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* @ap: ATA channel to manipulate
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*
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* Marvell requires DMA to be stopped before accessing shadow
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* registers. So we do that, then return the needed register.
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*
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* LOCKING:
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* Inherited from caller. FIXME: protect mv_stop_dma with lock?
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*/
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static u8 mv_check_err(struct ata_port *ap)
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{
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mv_stop_dma(ap); /* can't read shadow regs if DMA on */
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return readb((void __iomem *) ap->ioaddr.error_addr);
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}
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/* Part of this is taken from __sata_phy_reset and modified to not sleep
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* since this routine gets called from interrupt level.
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/**
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* mv_phy_reset - Perform eDMA reset followed by COMRESET
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* @ap: ATA channel to manipulate
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*
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* Part of this is taken from __sata_phy_reset and modified to
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* not sleep since this routine gets called from interrupt level.
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*
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* LOCKING:
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* Inherited from caller. This is coded to safe to call at
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* interrupt level, i.e. it does not sleep.
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*/
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static void mv_phy_reset(struct ata_port *ap)
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{
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VPRINTK("EXIT\n");
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}
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/**
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* mv_eng_timeout - Routine called by libata when SCSI times out I/O
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* @ap: ATA channel to manipulate
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*
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* Intent is to clear all pending error conditions, reset the
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* chip/bus, fail the command, and move on.
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*
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* LOCKING:
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* This routine holds the host_set lock while failing the command.
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*/
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static void mv_eng_timeout(struct ata_port *ap)
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{
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struct ata_queued_cmd *qc;
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}
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}
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/**
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* mv_port_init - Perform some early initialization on a single port.
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* @port: libata data structure storing shadow register addresses
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* @port_mmio: base address of the port
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*
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* Initialize shadow register mmio addresses, clear outstanding
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* interrupts on the port, and unmask interrupts for the future
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* start of the port.
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*
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* LOCKING:
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* Inherited from caller.
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*/
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static void mv_port_init(struct ata_ioports *port, void __iomem *port_mmio)
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{
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unsigned long shd_base = (unsigned long) port_mmio + SHD_BLK_OFS;
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readl(port_mmio + EDMA_ERR_IRQ_MASK_OFS));
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}
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/**
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* mv_host_init - Perform some early initialization of the host.
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* @probe_ent: early data struct representing the host
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*
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* If possible, do an early global reset of the host. Then do
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* our port init and clear/unmask all/relevant host interrupts.
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*
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* LOCKING:
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* Inherited from caller.
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*/
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static int mv_host_init(struct ata_probe_ent *probe_ent)
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{
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int rc = 0, n_hc, port, hc;
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return rc;
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}
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/* FIXME: complete this */
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/**
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* mv_print_info - Dump key info to kernel log for perusal.
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* @probe_ent: early data struct representing the host
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*
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* FIXME: complete this.
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*
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* LOCKING:
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* Inherited from caller.
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*/
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static void mv_print_info(struct ata_probe_ent *probe_ent)
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{
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struct pci_dev *pdev = to_pci_dev(probe_ent->dev);
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scc_s, (MV_HP_FLAG_MSI & hpriv->hp_flags) ? "MSI" : "INTx");
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}
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/**
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* mv_init_one - handle a positive probe of a Marvell host
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* @pdev: PCI device found
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* @ent: PCI device ID entry for the matched host
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*
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* LOCKING:
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* Inherited from caller.
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*/
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static int mv_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
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{
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static int printed_version = 0;
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