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ARM: dts: LogicPD Torpedo: Add MT9P031 Support
The Logic PD Torpedo standard kits come with a SOM populated to us an 8-bit parallel camera interface. This patch pin muxes the omap3-isp pins, sets the MT9P031 clicks, and configures the i2c2 bus to communicate with the mt9p031 on address 0x48. I have not done a lot of testing, but when modprobing mt9p031, then omap3-isp, the board responds with MT9P031 detected at address 0x48. Signed-off-by: Adam Ford <aford173@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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1 changed files with 53 additions and 0 deletions
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@ -217,6 +217,24 @@ OMAP3_CORE1_IOPAD(0x2188, PIN_OUTPUT | MUX_MODE4) /* mcbsp4_dx.gpio_154 */
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>;
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>;
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};
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};
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isp_pins: pinmux_isp_pins {
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pinctrl-single,pins = <
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OMAP3_CORE1_IOPAD(0x210c, PIN_INPUT | MUX_MODE0) /* cam_hs.cam_hs */
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OMAP3_CORE1_IOPAD(0x210e, PIN_INPUT | MUX_MODE0) /* cam_vs.cam_vs */
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OMAP3_CORE1_IOPAD(0x2110, PIN_INPUT | MUX_MODE0) /* cam_xclka.cam_xclka */
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OMAP3_CORE1_IOPAD(0x2112, PIN_INPUT | MUX_MODE0) /* cam_pclk.cam_pclk */
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OMAP3_CORE1_IOPAD(0x2114, PIN_INPUT | MUX_MODE0) /* cam_d0.cam_d0 */
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OMAP3_CORE1_IOPAD(0x2116, PIN_INPUT | MUX_MODE0) /* cam_d1.cam_d1 */
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OMAP3_CORE1_IOPAD(0x2118, PIN_INPUT | MUX_MODE0) /* cam_d2.cam_d2 */
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OMAP3_CORE1_IOPAD(0x211c, PIN_INPUT | MUX_MODE0) /* cam_d3.cam_d3 */
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OMAP3_CORE1_IOPAD(0x211e, PIN_INPUT | MUX_MODE0) /* cam_d4.cam_d4 */
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OMAP3_CORE1_IOPAD(0x2120, PIN_INPUT | MUX_MODE0) /* cam_d5.cam_d5 */
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OMAP3_CORE1_IOPAD(0x2122, PIN_INPUT | MUX_MODE0) /* cam_d6.cam_d6 */
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OMAP3_CORE1_IOPAD(0x2124, PIN_INPUT | MUX_MODE0) /* cam_d7.cam_d7 */
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>;
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};
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dss_dpi_pins1: pinmux_dss_dpi_pins1 {
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dss_dpi_pins1: pinmux_dss_dpi_pins1 {
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pinctrl-single,pins = <
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pinctrl-single,pins = <
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OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT | MUX_MODE0) /* dss_pclk.dss_pclk */
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OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT | MUX_MODE0) /* dss_pclk.dss_pclk */
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@ -268,6 +286,24 @@ OMAP3_WKUP_IOPAD(0x2a54, PIN_INPUT_PULLUP | MUX_MODE4) /* reserved.gpio_127 */
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};
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};
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};
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};
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&i2c2 {
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mt9p031@48 {
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compatible = "aptina,mt9p031";
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reg = <0x48>;
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clocks = <&isp 0>;
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vaa-supply = <&vaux4>;
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vdd-supply = <&vaux4>;
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vdd_io-supply = <&vaux4>;
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port {
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mt9p031_out: endpoint {
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input-clock-frequency = <24000000>;
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pixel-clock-frequency = <72000000>;
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remote-endpoint = <&ccdc_ep>;
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};
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};
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};
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};
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&i2c3 {
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&i2c3 {
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touchscreen: tsc2004@48 {
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touchscreen: tsc2004@48 {
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compatible = "ti,tsc2004";
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compatible = "ti,tsc2004";
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@ -289,6 +325,23 @@ touchscreen: tsc2004@48 {
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};
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};
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};
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};
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&isp {
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pinctrl-names = "default";
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pinctrl-0 = <&isp_pins>;
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ports {
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port@0 {
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reg = <0>;
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ccdc_ep: endpoint {
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remote-endpoint = <&mt9p031_out>;
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bus-width = <8>;
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hsync-active = <1>;
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vsync-active = <1>;
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pclk-sample = <0>;
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};
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};
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};
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};
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&uart1 {
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&uart1 {
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interrupts-extended = <&intc 72 &omap3_pmx_core OMAP3_UART1_RX>;
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interrupts-extended = <&intc 72 &omap3_pmx_core OMAP3_UART1_RX>;
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};
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};
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