mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-10-05 08:26:59 +00:00
perf: arm_spe: Use new PMSIDR_EL1 register enums
Now that the SPE register definitions include enums for some PMSIDR_EL1 fields, use them in the driver in place of magic values. Signed-off-by: Rob Herring <robh@kernel.org> Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com> Link: https://lore.kernel.org/r/20220825-arm-spe-v8-7-v4-5-327f860daf28@kernel.org Signed-off-by: Will Deacon <will@kernel.org>
This commit is contained in:
parent
2d347ac233
commit
05e4c88e2b
1 changed files with 10 additions and 10 deletions
|
@ -1006,32 +1006,32 @@ static void __arm_spe_pmu_dev_probe(void *info)
|
||||||
/* This field has a spaced out encoding, so just use a look-up */
|
/* This field has a spaced out encoding, so just use a look-up */
|
||||||
fld = FIELD_GET(PMSIDR_EL1_INTERVAL, reg);
|
fld = FIELD_GET(PMSIDR_EL1_INTERVAL, reg);
|
||||||
switch (fld) {
|
switch (fld) {
|
||||||
case 0:
|
case PMSIDR_EL1_INTERVAL_256:
|
||||||
spe_pmu->min_period = 256;
|
spe_pmu->min_period = 256;
|
||||||
break;
|
break;
|
||||||
case 2:
|
case PMSIDR_EL1_INTERVAL_512:
|
||||||
spe_pmu->min_period = 512;
|
spe_pmu->min_period = 512;
|
||||||
break;
|
break;
|
||||||
case 3:
|
case PMSIDR_EL1_INTERVAL_768:
|
||||||
spe_pmu->min_period = 768;
|
spe_pmu->min_period = 768;
|
||||||
break;
|
break;
|
||||||
case 4:
|
case PMSIDR_EL1_INTERVAL_1024:
|
||||||
spe_pmu->min_period = 1024;
|
spe_pmu->min_period = 1024;
|
||||||
break;
|
break;
|
||||||
case 5:
|
case PMSIDR_EL1_INTERVAL_1536:
|
||||||
spe_pmu->min_period = 1536;
|
spe_pmu->min_period = 1536;
|
||||||
break;
|
break;
|
||||||
case 6:
|
case PMSIDR_EL1_INTERVAL_2048:
|
||||||
spe_pmu->min_period = 2048;
|
spe_pmu->min_period = 2048;
|
||||||
break;
|
break;
|
||||||
case 7:
|
case PMSIDR_EL1_INTERVAL_3072:
|
||||||
spe_pmu->min_period = 3072;
|
spe_pmu->min_period = 3072;
|
||||||
break;
|
break;
|
||||||
default:
|
default:
|
||||||
dev_warn(dev, "unknown PMSIDR_EL1.Interval [%d]; assuming 8\n",
|
dev_warn(dev, "unknown PMSIDR_EL1.Interval [%d]; assuming 8\n",
|
||||||
fld);
|
fld);
|
||||||
fallthrough;
|
fallthrough;
|
||||||
case 8:
|
case PMSIDR_EL1_INTERVAL_4096:
|
||||||
spe_pmu->min_period = 4096;
|
spe_pmu->min_period = 4096;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -1050,10 +1050,10 @@ static void __arm_spe_pmu_dev_probe(void *info)
|
||||||
dev_warn(dev, "unknown PMSIDR_EL1.CountSize [%d]; assuming 2\n",
|
dev_warn(dev, "unknown PMSIDR_EL1.CountSize [%d]; assuming 2\n",
|
||||||
fld);
|
fld);
|
||||||
fallthrough;
|
fallthrough;
|
||||||
case 2:
|
case PMSIDR_EL1_COUNTSIZE_12_BIT_SAT:
|
||||||
spe_pmu->counter_sz = 12;
|
spe_pmu->counter_sz = 12;
|
||||||
break;
|
break;
|
||||||
case 3:
|
case PMSIDR_EL1_COUNTSIZE_16_BIT_SAT:
|
||||||
spe_pmu->counter_sz = 16;
|
spe_pmu->counter_sz = 16;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
Loading…
Reference in a new issue