mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-09-04 01:49:36 +00:00
Merge branch 'for-linus' into work.lookups
for the sake of namei.c fixes
This commit is contained in:
commit
05ef1c50e7
992 changed files with 10634 additions and 58747 deletions
1
.mailmap
1
.mailmap
|
@ -21,6 +21,7 @@ Andrey Ryabinin <ryabinin.a.a@gmail.com> <a.ryabinin@samsung.com>
|
|||
Andrew Morton <akpm@linux-foundation.org>
|
||||
Andrew Vasquez <andrew.vasquez@qlogic.com>
|
||||
Andy Adamson <andros@citi.umich.edu>
|
||||
Antonio Ospite <ao2@ao2.it> <ao2@amarulasolutions.com>
|
||||
Archit Taneja <archit@ti.com>
|
||||
Arnaud Patard <arnaud.patard@rtp-net.org>
|
||||
Arnd Bergmann <arnd@arndb.de>
|
||||
|
|
|
@ -3,7 +3,7 @@ Linux IOMMU Support
|
|||
|
||||
The architecture spec can be obtained from the below location.
|
||||
|
||||
http://www.intel.com/technology/virtualization/
|
||||
http://www.intel.com/content/dam/www/public/us/en/documents/product-specifications/vt-directed-io-spec.pdf
|
||||
|
||||
This guide gives a quick cheat sheet for some basic understanding.
|
||||
|
||||
|
|
|
@ -7,7 +7,7 @@ This is the authoritative documentation on the design, interface and
|
|||
conventions of cgroup v2. It describes all userland-visible aspects
|
||||
of cgroup including core and specific controller behaviors. All
|
||||
future changes must be reflected in this document. Documentation for
|
||||
v1 is available under Documentation/cgroup-legacy/.
|
||||
v1 is available under Documentation/cgroup-v1/.
|
||||
|
||||
CONTENTS
|
||||
|
||||
|
@ -843,6 +843,10 @@ PAGE_SIZE multiple when read back.
|
|||
Amount of memory used to cache filesystem data,
|
||||
including tmpfs and shared memory.
|
||||
|
||||
sock
|
||||
|
||||
Amount of memory used in network transmission buffers
|
||||
|
||||
file_mapped
|
||||
|
||||
Amount of cached filesystem data mapped with mmap()
|
||||
|
|
|
@ -68,7 +68,7 @@ ethernet@f0b60000 {
|
|||
phy1: ethernet-phy@1 {
|
||||
max-speed = <1000>;
|
||||
reg = <0x1>;
|
||||
compatible = "brcm,28nm-gphy", "ethernet-phy-ieee802.3-c22";
|
||||
compatible = "ethernet-phy-ieee802.3-c22";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
@ -115,7 +115,7 @@ ethernet@f0ba0000 {
|
|||
phy0: ethernet-phy@0 {
|
||||
max-speed = <1000>;
|
||||
reg = <0x0>;
|
||||
compatible = "brcm,bcm53125", "ethernet-phy-ieee802.3-c22";
|
||||
compatible = "ethernet-phy-ieee802.3-c22";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
@ -4,8 +4,6 @@ Required properties:
|
|||
- compatible: should be "hisilicon,hns-dsaf-v1" or "hisilicon,hns-dsaf-v2".
|
||||
"hisilicon,hns-dsaf-v1" is for hip05.
|
||||
"hisilicon,hns-dsaf-v2" is for Hi1610 and Hi1612.
|
||||
- dsa-name: dsa fabric name who provide this interface.
|
||||
should be "dsafX", X is the dsaf id.
|
||||
- mode: dsa fabric mode string. only support one of dsaf modes like these:
|
||||
"2port-64vf",
|
||||
"6port-16rss",
|
||||
|
@ -26,9 +24,8 @@ Required properties:
|
|||
|
||||
Example:
|
||||
|
||||
dsa: dsa@c7000000 {
|
||||
dsaf0: dsa@c7000000 {
|
||||
compatible = "hisilicon,hns-dsaf-v1";
|
||||
dsa_name = "dsaf0";
|
||||
mode = "6port-16rss";
|
||||
interrupt-parent = <&mbigen_dsa>;
|
||||
reg = <0x0 0xC0000000 0x0 0x420000
|
||||
|
|
|
@ -4,8 +4,9 @@ Required properties:
|
|||
- compatible: "hisilicon,hns-nic-v1" or "hisilicon,hns-nic-v2".
|
||||
"hisilicon,hns-nic-v1" is for hip05.
|
||||
"hisilicon,hns-nic-v2" is for Hi1610 and Hi1612.
|
||||
- ae-name: accelerator name who provides this interface,
|
||||
is simply a name referring to the name of name in the accelerator node.
|
||||
- ae-handle: accelerator engine handle for hns,
|
||||
specifies a reference to the associating hardware driver node.
|
||||
see Documentation/devicetree/bindings/net/hisilicon-hns-dsaf.txt
|
||||
- port-id: is the index of port provided by DSAF (the accelerator). DSAF can
|
||||
connect to 8 PHYs. Port 0 to 1 are both used for adminstration purpose. They
|
||||
are called debug ports.
|
||||
|
@ -41,7 +42,7 @@ Example:
|
|||
|
||||
ethernet@0{
|
||||
compatible = "hisilicon,hns-nic-v1";
|
||||
ae-name = "dsaf0";
|
||||
ae-handle = <&dsaf0>;
|
||||
port-id = <0>;
|
||||
local-mac-address = [a2 14 e4 4b 56 76];
|
||||
};
|
||||
|
|
|
@ -6,12 +6,17 @@ Required properties:
|
|||
- interrupts: interrupt for the device
|
||||
- phy: See ethernet.txt file in the same directory.
|
||||
- phy-mode: See ethernet.txt file in the same directory
|
||||
- clocks: a pointer to the reference clock for this device.
|
||||
- clocks: List of clocks for this device. At least one clock is
|
||||
mandatory for the core clock. If several clocks are given, then the
|
||||
clock-names property must be used to identify them.
|
||||
|
||||
Optional properties:
|
||||
- tx-csum-limit: maximum mtu supported by port that allow TX checksum.
|
||||
Value is presented in bytes. If not used, by default 1600B is set for
|
||||
"marvell,armada-370-neta" and 9800B for others.
|
||||
- clock-names: List of names corresponding to clocks property; shall be
|
||||
"core" for core clock and "bus" for the optional bus clock.
|
||||
|
||||
|
||||
Example:
|
||||
|
||||
|
|
|
@ -38,7 +38,6 @@ Example :
|
|||
|
||||
phy11: ethernet-phy@1 {
|
||||
reg = <1>;
|
||||
compatible = "marvell,88e1149r";
|
||||
marvell,reg-init = <3 0x10 0 0x5777>,
|
||||
<3 0x11 0 0x00aa>,
|
||||
<3 0x12 0 0x4105>,
|
||||
|
@ -48,7 +47,6 @@ Example :
|
|||
};
|
||||
phy12: ethernet-phy@2 {
|
||||
reg = <2>;
|
||||
compatible = "marvell,88e1149r";
|
||||
marvell,reg-init = <3 0x10 0 0x5777>,
|
||||
<3 0x11 0 0x00aa>,
|
||||
<3 0x12 0 0x4105>,
|
||||
|
@ -58,7 +56,6 @@ Example :
|
|||
};
|
||||
phy13: ethernet-phy@3 {
|
||||
reg = <3>;
|
||||
compatible = "marvell,88e1149r";
|
||||
marvell,reg-init = <3 0x10 0 0x5777>,
|
||||
<3 0x11 0 0x00aa>,
|
||||
<3 0x12 0 0x4105>,
|
||||
|
@ -68,7 +65,6 @@ Example :
|
|||
};
|
||||
phy14: ethernet-phy@4 {
|
||||
reg = <4>;
|
||||
compatible = "marvell,88e1149r";
|
||||
marvell,reg-init = <3 0x10 0 0x5777>,
|
||||
<3 0x11 0 0x00aa>,
|
||||
<3 0x12 0 0x4105>,
|
||||
|
@ -85,7 +81,6 @@ Example :
|
|||
|
||||
phy21: ethernet-phy@1 {
|
||||
reg = <1>;
|
||||
compatible = "marvell,88e1149r";
|
||||
marvell,reg-init = <3 0x10 0 0x5777>,
|
||||
<3 0x11 0 0x00aa>,
|
||||
<3 0x12 0 0x4105>,
|
||||
|
@ -95,7 +90,6 @@ Example :
|
|||
};
|
||||
phy22: ethernet-phy@2 {
|
||||
reg = <2>;
|
||||
compatible = "marvell,88e1149r";
|
||||
marvell,reg-init = <3 0x10 0 0x5777>,
|
||||
<3 0x11 0 0x00aa>,
|
||||
<3 0x12 0 0x4105>,
|
||||
|
@ -105,7 +99,6 @@ Example :
|
|||
};
|
||||
phy23: ethernet-phy@3 {
|
||||
reg = <3>;
|
||||
compatible = "marvell,88e1149r";
|
||||
marvell,reg-init = <3 0x10 0 0x5777>,
|
||||
<3 0x11 0 0x00aa>,
|
||||
<3 0x12 0 0x4105>,
|
||||
|
@ -115,7 +108,6 @@ Example :
|
|||
};
|
||||
phy24: ethernet-phy@4 {
|
||||
reg = <4>;
|
||||
compatible = "marvell,88e1149r";
|
||||
marvell,reg-init = <3 0x10 0 0x5777>,
|
||||
<3 0x11 0 0x00aa>,
|
||||
<3 0x12 0 0x4105>,
|
||||
|
|
|
@ -47,7 +47,6 @@ Example :
|
|||
|
||||
phy11: ethernet-phy@1 {
|
||||
reg = <1>;
|
||||
compatible = "marvell,88e1149r";
|
||||
marvell,reg-init = <3 0x10 0 0x5777>,
|
||||
<3 0x11 0 0x00aa>,
|
||||
<3 0x12 0 0x4105>,
|
||||
|
@ -57,7 +56,6 @@ Example :
|
|||
};
|
||||
phy12: ethernet-phy@2 {
|
||||
reg = <2>;
|
||||
compatible = "marvell,88e1149r";
|
||||
marvell,reg-init = <3 0x10 0 0x5777>,
|
||||
<3 0x11 0 0x00aa>,
|
||||
<3 0x12 0 0x4105>,
|
||||
|
@ -67,7 +65,6 @@ Example :
|
|||
};
|
||||
phy13: ethernet-phy@3 {
|
||||
reg = <3>;
|
||||
compatible = "marvell,88e1149r";
|
||||
marvell,reg-init = <3 0x10 0 0x5777>,
|
||||
<3 0x11 0 0x00aa>,
|
||||
<3 0x12 0 0x4105>,
|
||||
|
@ -77,7 +74,6 @@ Example :
|
|||
};
|
||||
phy14: ethernet-phy@4 {
|
||||
reg = <4>;
|
||||
compatible = "marvell,88e1149r";
|
||||
marvell,reg-init = <3 0x10 0 0x5777>,
|
||||
<3 0x11 0 0x00aa>,
|
||||
<3 0x12 0 0x4105>,
|
||||
|
@ -94,7 +90,6 @@ Example :
|
|||
|
||||
phy21: ethernet-phy@1 {
|
||||
reg = <1>;
|
||||
compatible = "marvell,88e1149r";
|
||||
marvell,reg-init = <3 0x10 0 0x5777>,
|
||||
<3 0x11 0 0x00aa>,
|
||||
<3 0x12 0 0x4105>,
|
||||
|
@ -104,7 +99,6 @@ Example :
|
|||
};
|
||||
phy22: ethernet-phy@2 {
|
||||
reg = <2>;
|
||||
compatible = "marvell,88e1149r";
|
||||
marvell,reg-init = <3 0x10 0 0x5777>,
|
||||
<3 0x11 0 0x00aa>,
|
||||
<3 0x12 0 0x4105>,
|
||||
|
@ -114,7 +108,6 @@ Example :
|
|||
};
|
||||
phy23: ethernet-phy@3 {
|
||||
reg = <3>;
|
||||
compatible = "marvell,88e1149r";
|
||||
marvell,reg-init = <3 0x10 0 0x5777>,
|
||||
<3 0x11 0 0x00aa>,
|
||||
<3 0x12 0 0x4105>,
|
||||
|
@ -124,7 +117,6 @@ Example :
|
|||
};
|
||||
phy24: ethernet-phy@4 {
|
||||
reg = <4>;
|
||||
compatible = "marvell,88e1149r";
|
||||
marvell,reg-init = <3 0x10 0 0x5777>,
|
||||
<3 0x11 0 0x00aa>,
|
||||
<3 0x12 0 0x4105>,
|
||||
|
|
|
@ -17,8 +17,7 @@ Optional Properties:
|
|||
"ethernet-phy-ieee802.3-c22" or "ethernet-phy-ieee802.3-c45" for
|
||||
PHYs that implement IEEE802.3 clause 22 or IEEE802.3 clause 45
|
||||
specifications. If neither of these are specified, the default is to
|
||||
assume clause 22. The compatible list may also contain other
|
||||
elements.
|
||||
assume clause 22.
|
||||
|
||||
If the phy's identifier is known then the list may contain an entry
|
||||
of the form: "ethernet-phy-idAAAA.BBBB" where
|
||||
|
@ -28,6 +27,9 @@ Optional Properties:
|
|||
4 hex digits. This is the chip vendor OUI bits 19:24,
|
||||
followed by 10 bits of a vendor specific ID.
|
||||
|
||||
The compatible list should not contain other values than those
|
||||
listed here.
|
||||
|
||||
- max-speed: Maximum PHY supported speed (10, 100, 1000...)
|
||||
|
||||
- broken-turn-around: If set, indicates the PHY device does not correctly
|
||||
|
|
|
@ -8,6 +8,7 @@ OHCI and EHCI controllers.
|
|||
Required properties:
|
||||
- compatible: "renesas,pci-r8a7790" for the R8A7790 SoC;
|
||||
"renesas,pci-r8a7791" for the R8A7791 SoC;
|
||||
"renesas,pci-r8a7793" for the R8A7793 SoC;
|
||||
"renesas,pci-r8a7794" for the R8A7794 SoC;
|
||||
"renesas,pci-rcar-gen2" for a generic R-Car Gen2 compatible device
|
||||
|
||||
|
|
|
@ -4,6 +4,7 @@ Required properties:
|
|||
compatible: "renesas,pcie-r8a7779" for the R8A7779 SoC;
|
||||
"renesas,pcie-r8a7790" for the R8A7790 SoC;
|
||||
"renesas,pcie-r8a7791" for the R8A7791 SoC;
|
||||
"renesas,pcie-r8a7793" for the R8A7793 SoC;
|
||||
"renesas,pcie-r8a7795" for the R8A7795 SoC;
|
||||
"renesas,pcie-rcar-gen2" for a generic R-Car Gen2 compatible device.
|
||||
|
||||
|
|
|
@ -30,6 +30,8 @@ The compatible list for this generic sound card currently:
|
|||
"fsl,imx-audio-sgtl5000"
|
||||
(compatible with Documentation/devicetree/bindings/sound/imx-audio-sgtl5000.txt)
|
||||
|
||||
"fsl,imx-audio-wm8960"
|
||||
|
||||
Required properties:
|
||||
|
||||
- compatible : Contains one of entries in the compatible list.
|
||||
|
|
|
@ -1,8 +1,9 @@
|
|||
* Renesas R-Car Thermal
|
||||
|
||||
Required properties:
|
||||
- compatible : "renesas,thermal-<soctype>", "renesas,rcar-thermal"
|
||||
as fallback.
|
||||
- compatible : "renesas,thermal-<soctype>",
|
||||
"renesas,rcar-gen2-thermal" (with thermal-zone) or
|
||||
"renesas,rcar-thermal" (without thermal-zone) as fallback.
|
||||
Examples with soctypes are:
|
||||
- "renesas,thermal-r8a73a4" (R-Mobile APE6)
|
||||
- "renesas,thermal-r8a7779" (R-Car H1)
|
||||
|
@ -36,3 +37,35 @@ thermal@e61f0000 {
|
|||
0xe61f0300 0x38>;
|
||||
interrupts = <0 69 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
|
||||
Example (with thermal-zone):
|
||||
|
||||
thermal-zones {
|
||||
cpu_thermal: cpu-thermal {
|
||||
polling-delay-passive = <1000>;
|
||||
polling-delay = <5000>;
|
||||
|
||||
thermal-sensors = <&thermal>;
|
||||
|
||||
trips {
|
||||
cpu-crit {
|
||||
temperature = <115000>;
|
||||
hysteresis = <0>;
|
||||
type = "critical";
|
||||
};
|
||||
};
|
||||
cooling-maps {
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
thermal: thermal@e61f0000 {
|
||||
compatible = "renesas,thermal-r8a7790",
|
||||
"renesas,rcar-gen2-thermal",
|
||||
"renesas,rcar-thermal";
|
||||
reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>;
|
||||
interrupts = <0 69 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&mstp5_clks R8A7790_CLK_THERMAL>;
|
||||
power-domains = <&cpg_clocks>;
|
||||
#thermal-sensor-cells = <0>;
|
||||
};
|
||||
|
|
|
@ -240,8 +240,8 @@ Table 1-2: Contents of the status files (as of 4.1)
|
|||
RssFile size of resident file mappings
|
||||
RssShmem size of resident shmem memory (includes SysV shm,
|
||||
mapping of tmpfs and shared anonymous mappings)
|
||||
VmData size of data, stack, and text segments
|
||||
VmStk size of data, stack, and text segments
|
||||
VmData size of private data segments
|
||||
VmStk size of stack segments
|
||||
VmExe size of text segment
|
||||
VmLib size of shared library code
|
||||
VmPTE size of page table entries
|
||||
|
@ -356,7 +356,7 @@ address perms offset dev inode pathname
|
|||
a7cb1000-a7cb2000 ---p 00000000 00:00 0
|
||||
a7cb2000-a7eb2000 rw-p 00000000 00:00 0
|
||||
a7eb2000-a7eb3000 ---p 00000000 00:00 0
|
||||
a7eb3000-a7ed5000 rw-p 00000000 00:00 0 [stack:1001]
|
||||
a7eb3000-a7ed5000 rw-p 00000000 00:00 0
|
||||
a7ed5000-a8008000 r-xp 00000000 03:00 4222 /lib/libc.so.6
|
||||
a8008000-a800a000 r--p 00133000 03:00 4222 /lib/libc.so.6
|
||||
a800a000-a800b000 rw-p 00135000 03:00 4222 /lib/libc.so.6
|
||||
|
@ -388,7 +388,6 @@ is not associated with a file:
|
|||
|
||||
[heap] = the heap of the program
|
||||
[stack] = the stack of the main process
|
||||
[stack:1001] = the stack of the thread with tid 1001
|
||||
[vdso] = the "virtual dynamic shared object",
|
||||
the kernel system call handler
|
||||
|
||||
|
@ -396,10 +395,8 @@ is not associated with a file:
|
|||
|
||||
The /proc/PID/task/TID/maps is a view of the virtual memory from the viewpoint
|
||||
of the individual tasks of a process. In this file you will see a mapping marked
|
||||
as [stack] if that task sees it as a stack. This is a key difference from the
|
||||
content of /proc/PID/maps, where you will see all mappings that are being used
|
||||
as stack by all of those tasks. Hence, for the example above, the task-level
|
||||
map, i.e. /proc/PID/task/TID/maps for thread 1001 will look like this:
|
||||
as [stack] if that task sees it as a stack. Hence, for the example above, the
|
||||
task-level map, i.e. /proc/PID/task/TID/maps for thread 1001 will look like this:
|
||||
|
||||
08048000-08049000 r-xp 00000000 03:00 8312 /opt/test
|
||||
08049000-0804a000 rw-p 00001000 03:00 8312 /opt/test
|
||||
|
|
|
@ -1496,6 +1496,11 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
|
|||
could change it dynamically, usually by
|
||||
/sys/module/printk/parameters/ignore_loglevel.
|
||||
|
||||
ignore_rlimit_data
|
||||
Ignore RLIMIT_DATA setting for data mappings,
|
||||
print warning at first misuse. Can be changed via
|
||||
/sys/module/kernel/parameters/ignore_rlimit_data.
|
||||
|
||||
ihash_entries= [KNL]
|
||||
Set number of hash buckets for inode cache.
|
||||
|
||||
|
@ -4230,6 +4235,17 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
|
|||
The default value of this parameter is determined by
|
||||
the config option CONFIG_WQ_POWER_EFFICIENT_DEFAULT.
|
||||
|
||||
workqueue.debug_force_rr_cpu
|
||||
Workqueue used to implicitly guarantee that work
|
||||
items queued without explicit CPU specified are put
|
||||
on the local CPU. This guarantee is no longer true
|
||||
and while local CPU is still preferred work items
|
||||
may be put on foreign CPUs. This debug option
|
||||
forces round-robin CPU selection to flush out
|
||||
usages which depend on the now broken guarantee.
|
||||
When enabled, memory and cache locality will be
|
||||
impacted.
|
||||
|
||||
x2apic_phys [X86-64,APIC] Use x2apic physical mode instead of
|
||||
default x2apic cluster mode on platforms
|
||||
supporting x2apic.
|
||||
|
|
|
@ -594,7 +594,7 @@ tcp_fastopen - INTEGER
|
|||
|
||||
tcp_syn_retries - INTEGER
|
||||
Number of times initial SYNs for an active TCP connection attempt
|
||||
will be retransmitted. Should not be higher than 255. Default value
|
||||
will be retransmitted. Should not be higher than 127. Default value
|
||||
is 6, which corresponds to 63seconds till the last retransmission
|
||||
with the current initial RTO of 1second. With this the final timeout
|
||||
for an active TCP connection attempt will happen after 127seconds.
|
||||
|
|
|
@ -3025,7 +3025,7 @@ len must be a multiple of sizeof(struct kvm_s390_irq). It must be > 0
|
|||
and it must not exceed (max_vcpus + 32) * sizeof(struct kvm_s390_irq),
|
||||
which is the maximum number of possibly pending cpu-local interrupts.
|
||||
|
||||
4.90 KVM_SMI
|
||||
4.96 KVM_SMI
|
||||
|
||||
Capability: KVM_CAP_X86_SMM
|
||||
Architectures: x86
|
||||
|
|
75
MAINTAINERS
75
MAINTAINERS
|
@ -223,9 +223,7 @@ F: drivers/scsi/aacraid/
|
|||
|
||||
ABI/API
|
||||
L: linux-api@vger.kernel.org
|
||||
F: Documentation/ABI/
|
||||
F: include/linux/syscalls.h
|
||||
F: include/uapi/
|
||||
F: kernel/sys_ni.c
|
||||
|
||||
ABIT UGURU 1,2 HARDWARE MONITOR DRIVER
|
||||
|
@ -686,13 +684,6 @@ M: Michael Hanselmann <linux-kernel@hansmi.ch>
|
|||
S: Supported
|
||||
F: drivers/macintosh/ams/
|
||||
|
||||
AMSO1100 RNIC DRIVER
|
||||
M: Tom Tucker <tom@opengridcomputing.com>
|
||||
M: Steve Wise <swise@opengridcomputing.com>
|
||||
L: linux-rdma@vger.kernel.org
|
||||
S: Maintained
|
||||
F: drivers/infiniband/hw/amso1100/
|
||||
|
||||
ANALOG DEVICES INC AD9389B DRIVER
|
||||
M: Hans Verkuil <hans.verkuil@cisco.com>
|
||||
L: linux-media@vger.kernel.org
|
||||
|
@ -967,6 +958,8 @@ M: Rob Herring <robh@kernel.org>
|
|||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
S: Maintained
|
||||
F: arch/arm/mach-highbank/
|
||||
F: arch/arm/boot/dts/highbank.dts
|
||||
F: arch/arm/boot/dts/ecx-*.dts*
|
||||
|
||||
ARM/CAVIUM NETWORKS CNS3XXX MACHINE SUPPORT
|
||||
M: Krzysztof Halasa <khalasa@piap.pl>
|
||||
|
@ -1042,6 +1035,7 @@ M: Barry Song <baohua@kernel.org>
|
|||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/baohua/linux.git
|
||||
S: Maintained
|
||||
F: arch/arm/boot/dts/prima2*
|
||||
F: arch/arm/mach-prima2/
|
||||
F: drivers/clk/sirf/
|
||||
F: drivers/clocksource/timer-prima2.c
|
||||
|
@ -1143,6 +1137,10 @@ W: http://www.hisilicon.com
|
|||
S: Supported
|
||||
T: git git://github.com/hisilicon/linux-hisi.git
|
||||
F: arch/arm/mach-hisi/
|
||||
F: arch/arm/boot/dts/hi3*
|
||||
F: arch/arm/boot/dts/hip*
|
||||
F: arch/arm/boot/dts/hisi*
|
||||
F: arch/arm64/boot/dts/hisilicon/
|
||||
|
||||
ARM/HP JORNADA 7XX MACHINE SUPPORT
|
||||
M: Kristoffer Ericson <kristoffer.ericson@gmail.com>
|
||||
|
@ -1219,6 +1217,7 @@ M: Santosh Shilimkar <ssantosh@kernel.org>
|
|||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
S: Maintained
|
||||
F: arch/arm/mach-keystone/
|
||||
F: arch/arm/boot/dts/k2*
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone.git
|
||||
|
||||
ARM/TEXAS INSTRUMENT KEYSTONE CLOCK FRAMEWORK
|
||||
|
@ -1287,6 +1286,7 @@ L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
|||
S: Maintained
|
||||
F: arch/arm/mach-berlin/
|
||||
F: arch/arm/boot/dts/berlin*
|
||||
F: arch/arm64/boot/dts/marvell/berlin*
|
||||
|
||||
|
||||
ARM/Marvell Dove/MV78xx0/Orion SOC support
|
||||
|
@ -1425,6 +1425,7 @@ S: Maintained
|
|||
F: arch/arm/boot/dts/qcom-*.dts
|
||||
F: arch/arm/boot/dts/qcom-*.dtsi
|
||||
F: arch/arm/mach-qcom/
|
||||
F: arch/arm64/boot/dts/qcom/*
|
||||
F: drivers/soc/qcom/
|
||||
F: drivers/tty/serial/msm_serial.h
|
||||
F: drivers/tty/serial/msm_serial.c
|
||||
|
@ -1484,6 +1485,8 @@ L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
|||
L: linux-samsung-soc@vger.kernel.org (moderated for non-subscribers)
|
||||
S: Maintained
|
||||
F: arch/arm/boot/dts/s3c*
|
||||
F: arch/arm/boot/dts/s5p*
|
||||
F: arch/arm/boot/dts/samsung*
|
||||
F: arch/arm/boot/dts/exynos*
|
||||
F: arch/arm64/boot/dts/exynos/
|
||||
F: arch/arm/plat-samsung/
|
||||
|
@ -1563,6 +1566,7 @@ S: Maintained
|
|||
F: arch/arm/mach-socfpga/
|
||||
F: arch/arm/boot/dts/socfpga*
|
||||
F: arch/arm/configs/socfpga_defconfig
|
||||
F: arch/arm64/boot/dts/altera/
|
||||
W: http://www.rocketboards.org
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux.git
|
||||
|
||||
|
@ -1716,7 +1720,7 @@ M: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
|
|||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
S: Maintained
|
||||
F: arch/arm/boot/dts/vexpress*
|
||||
F: arch/arm64/boot/dts/arm/vexpress*
|
||||
F: arch/arm64/boot/dts/arm/
|
||||
F: arch/arm/mach-vexpress/
|
||||
F: */*/vexpress*
|
||||
F: */*/*/vexpress*
|
||||
|
@ -2343,6 +2347,7 @@ F: arch/arm/mach-bcm/
|
|||
F: arch/arm/boot/dts/bcm113*
|
||||
F: arch/arm/boot/dts/bcm216*
|
||||
F: arch/arm/boot/dts/bcm281*
|
||||
F: arch/arm64/boot/dts/broadcom/
|
||||
F: arch/arm/configs/bcm_defconfig
|
||||
F: drivers/mmc/host/sdhci-bcm-kona.c
|
||||
F: drivers/clocksource/bcm_kona_timer.c
|
||||
|
@ -2357,14 +2362,6 @@ T: git git://git.kernel.org/pub/scm/linux/kernel/git/rpi/linux-rpi.git
|
|||
S: Maintained
|
||||
N: bcm2835
|
||||
|
||||
BROADCOM BCM33XX MIPS ARCHITECTURE
|
||||
M: Kevin Cernekee <cernekee@gmail.com>
|
||||
L: linux-mips@linux-mips.org
|
||||
S: Maintained
|
||||
F: arch/mips/bcm3384/*
|
||||
F: arch/mips/include/asm/mach-bcm3384/*
|
||||
F: arch/mips/kernel/*bmips*
|
||||
|
||||
BROADCOM BCM47XX MIPS ARCHITECTURE
|
||||
M: Hauke Mehrtens <hauke@hauke-m.de>
|
||||
M: Rafał Miłecki <zajec5@gmail.com>
|
||||
|
@ -3445,7 +3442,7 @@ S: Maintained
|
|||
F: drivers/usb/dwc2/
|
||||
|
||||
DESIGNWARE USB3 DRD IP DRIVER
|
||||
M: Felipe Balbi <balbi@ti.com>
|
||||
M: Felipe Balbi <balbi@kernel.org>
|
||||
L: linux-usb@vger.kernel.org
|
||||
L: linux-omap@vger.kernel.org
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb.git
|
||||
|
@ -4184,13 +4181,6 @@ W: http://aeschi.ch.eu.org/efs/
|
|||
S: Orphan
|
||||
F: fs/efs/
|
||||
|
||||
EHCA (IBM GX bus InfiniBand adapter) DRIVER
|
||||
M: Hoang-Nam Nguyen <hnguyen@de.ibm.com>
|
||||
M: Christoph Raisch <raisch@de.ibm.com>
|
||||
L: linux-rdma@vger.kernel.org
|
||||
S: Supported
|
||||
F: drivers/infiniband/hw/ehca/
|
||||
|
||||
EHEA (IBM pSeries eHEA 10Gb ethernet adapter) DRIVER
|
||||
M: Thadeu Lima de Souza Cascardo <cascardo@linux.vnet.ibm.com>
|
||||
L: netdev@vger.kernel.org
|
||||
|
@ -5809,12 +5799,6 @@ M: Juanjo Ciarlante <jjciarla@raiz.uncu.edu.ar>
|
|||
S: Maintained
|
||||
F: net/ipv4/netfilter/ipt_MASQUERADE.c
|
||||
|
||||
IPATH DRIVER
|
||||
M: Mike Marciniszyn <infinipath@intel.com>
|
||||
L: linux-rdma@vger.kernel.org
|
||||
S: Maintained
|
||||
F: drivers/staging/rdma/ipath/
|
||||
|
||||
IPMI SUBSYSTEM
|
||||
M: Corey Minyard <minyard@acm.org>
|
||||
L: openipmi-developer@lists.sourceforge.net (moderated for non-subscribers)
|
||||
|
@ -7370,7 +7354,7 @@ F: drivers/tty/isicom.c
|
|||
F: include/linux/isicom.h
|
||||
|
||||
MUSB MULTIPOINT HIGH SPEED DUAL-ROLE CONTROLLER
|
||||
M: Felipe Balbi <balbi@ti.com>
|
||||
M: Felipe Balbi <balbi@kernel.org>
|
||||
L: linux-usb@vger.kernel.org
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb.git
|
||||
S: Maintained
|
||||
|
@ -7939,7 +7923,7 @@ F: drivers/media/platform/omap3isp/
|
|||
F: drivers/staging/media/omap4iss/
|
||||
|
||||
OMAP USB SUPPORT
|
||||
M: Felipe Balbi <balbi@ti.com>
|
||||
M: Felipe Balbi <balbi@kernel.org>
|
||||
L: linux-usb@vger.kernel.org
|
||||
L: linux-omap@vger.kernel.org
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb.git
|
||||
|
@ -8818,6 +8802,7 @@ L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
|||
T: git git://github.com/hzhuang1/linux.git
|
||||
T: git git://github.com/rjarzmik/linux.git
|
||||
S: Maintained
|
||||
F: arch/arm/boot/dts/pxa*
|
||||
F: arch/arm/mach-pxa/
|
||||
F: drivers/dma/pxa*
|
||||
F: drivers/pcmcia/pxa2xx*
|
||||
|
@ -8847,6 +8832,7 @@ L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
|||
T: git git://github.com/hzhuang1/linux.git
|
||||
T: git git://git.linaro.org/people/ycmiao/pxa-linux.git
|
||||
S: Maintained
|
||||
F: arch/arm/boot/dts/mmp*
|
||||
F: arch/arm/mach-mmp/
|
||||
|
||||
PXA MMCI DRIVER
|
||||
|
@ -9793,10 +9779,11 @@ S: Supported
|
|||
F: drivers/scsi/be2iscsi/
|
||||
|
||||
Emulex 10Gbps NIC BE2, BE3-R, Lancer, Skyhawk-R DRIVER
|
||||
M: Sathya Perla <sathya.perla@avagotech.com>
|
||||
M: Ajit Khaparde <ajit.khaparde@avagotech.com>
|
||||
M: Padmanabh Ratnakar <padmanabh.ratnakar@avagotech.com>
|
||||
M: Sriharsha Basavapatna <sriharsha.basavapatna@avagotech.com>
|
||||
M: Sathya Perla <sathya.perla@broadcom.com>
|
||||
M: Ajit Khaparde <ajit.khaparde@broadcom.com>
|
||||
M: Padmanabh Ratnakar <padmanabh.ratnakar@broadcom.com>
|
||||
M: Sriharsha Basavapatna <sriharsha.basavapatna@broadcom.com>
|
||||
M: Somnath Kotur <somnath.kotur@broadcom.com>
|
||||
L: netdev@vger.kernel.org
|
||||
W: http://www.emulex.com
|
||||
S: Supported
|
||||
|
@ -10158,6 +10145,7 @@ S: Supported
|
|||
F: drivers/media/pci/solo6x10/
|
||||
|
||||
SOFTWARE RAID (Multiple Disks) SUPPORT
|
||||
M: Shaohua Li <shli@kernel.org>
|
||||
L: linux-raid@vger.kernel.org
|
||||
T: git git://neil.brown.name/md
|
||||
S: Supported
|
||||
|
@ -10173,7 +10161,7 @@ F: drivers/net/ethernet/natsemi/sonic.*
|
|||
|
||||
SONICS SILICON BACKPLANE DRIVER (SSB)
|
||||
M: Michael Buesch <m@bues.ch>
|
||||
L: netdev@vger.kernel.org
|
||||
L: linux-wireless@vger.kernel.org
|
||||
S: Maintained
|
||||
F: drivers/ssb/
|
||||
F: include/linux/ssb/
|
||||
|
@ -10291,6 +10279,7 @@ L: spear-devel@list.st.com
|
|||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
W: http://www.st.com/spear
|
||||
S: Maintained
|
||||
F: arch/arm/boot/dts/spear*
|
||||
F: arch/arm/mach-spear/
|
||||
|
||||
SPEAR CLOCK FRAMEWORK SUPPORT
|
||||
|
@ -11318,7 +11307,7 @@ F: Documentation/usb/ehci.txt
|
|||
F: drivers/usb/host/ehci*
|
||||
|
||||
USB GADGET/PERIPHERAL SUBSYSTEM
|
||||
M: Felipe Balbi <balbi@ti.com>
|
||||
M: Felipe Balbi <balbi@kernel.org>
|
||||
L: linux-usb@vger.kernel.org
|
||||
W: http://www.linux-usb.org/gadget
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb.git
|
||||
|
@ -11394,7 +11383,7 @@ S: Maintained
|
|||
F: drivers/net/usb/pegasus.*
|
||||
|
||||
USB PHY LAYER
|
||||
M: Felipe Balbi <balbi@ti.com>
|
||||
M: Felipe Balbi <balbi@kernel.org>
|
||||
L: linux-usb@vger.kernel.org
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb.git
|
||||
S: Maintained
|
||||
|
@ -12133,7 +12122,7 @@ F: drivers/net/hamradio/*scc.c
|
|||
F: drivers/net/hamradio/z8530.h
|
||||
|
||||
ZBUD COMPRESSED PAGE ALLOCATOR
|
||||
M: Seth Jennings <sjennings@variantweb.net>
|
||||
M: Seth Jennings <sjenning@redhat.com>
|
||||
L: linux-mm@kvack.org
|
||||
S: Maintained
|
||||
F: mm/zbud.c
|
||||
|
@ -12188,7 +12177,7 @@ F: include/linux/zsmalloc.h
|
|||
F: Documentation/vm/zsmalloc.txt
|
||||
|
||||
ZSWAP COMPRESSED SWAP CACHING
|
||||
M: Seth Jennings <sjennings@variantweb.net>
|
||||
M: Seth Jennings <sjenning@redhat.com>
|
||||
L: linux-mm@kvack.org
|
||||
S: Maintained
|
||||
F: mm/zswap.c
|
||||
|
|
2
Makefile
2
Makefile
|
@ -1,7 +1,7 @@
|
|||
VERSION = 4
|
||||
PATCHLEVEL = 5
|
||||
SUBLEVEL = 0
|
||||
EXTRAVERSION = -rc1
|
||||
EXTRAVERSION = -rc4
|
||||
NAME = Blurry Fish Butt
|
||||
|
||||
# *DOCUMENTATION*
|
||||
|
|
|
@ -338,6 +338,19 @@ config ARC_PAGE_SIZE_4K
|
|||
|
||||
endchoice
|
||||
|
||||
choice
|
||||
prompt "MMU Super Page Size"
|
||||
depends on ISA_ARCV2 && TRANSPARENT_HUGEPAGE
|
||||
default ARC_HUGEPAGE_2M
|
||||
|
||||
config ARC_HUGEPAGE_2M
|
||||
bool "2MB"
|
||||
|
||||
config ARC_HUGEPAGE_16M
|
||||
bool "16MB"
|
||||
|
||||
endchoice
|
||||
|
||||
if ISA_ARCOMPACT
|
||||
|
||||
config ARC_COMPACT_IRQ_LEVELS
|
||||
|
@ -410,7 +423,7 @@ config ARC_HAS_RTC
|
|||
default n
|
||||
depends on !SMP
|
||||
|
||||
config ARC_HAS_GRTC
|
||||
config ARC_HAS_GFRC
|
||||
bool "SMP synchronized 64-bit cycle counter"
|
||||
default y
|
||||
depends on SMP
|
||||
|
@ -566,6 +579,12 @@ endmenu
|
|||
endmenu # "ARC Architecture Configuration"
|
||||
|
||||
source "mm/Kconfig"
|
||||
|
||||
config FORCE_MAX_ZONEORDER
|
||||
int "Maximum zone order"
|
||||
default "12" if ARC_HUGEPAGE_16M
|
||||
default "11"
|
||||
|
||||
source "net/Kconfig"
|
||||
source "drivers/Kconfig"
|
||||
source "fs/Kconfig"
|
||||
|
|
|
@ -16,7 +16,7 @@ CONFIG_ARC_PLAT_AXS10X=y
|
|||
CONFIG_AXS103=y
|
||||
CONFIG_ISA_ARCV2=y
|
||||
CONFIG_SMP=y
|
||||
# CONFIG_ARC_HAS_GRTC is not set
|
||||
# CONFIG_ARC_HAS_GFRC is not set
|
||||
CONFIG_ARC_UBOOT_SUPPORT=y
|
||||
CONFIG_ARC_BUILTIN_DTB_NAME="vdk_hs38_smp"
|
||||
CONFIG_PREEMPT=y
|
||||
|
|
|
@ -349,14 +349,13 @@ struct cpuinfo_arc {
|
|||
struct cpuinfo_arc_bpu bpu;
|
||||
struct bcr_identity core;
|
||||
struct bcr_isa isa;
|
||||
struct bcr_timer timers;
|
||||
unsigned int vec_base;
|
||||
struct cpuinfo_arc_ccm iccm, dccm;
|
||||
struct {
|
||||
unsigned int swap:1, norm:1, minmax:1, barrel:1, crc:1, pad1:3,
|
||||
fpu_sp:1, fpu_dp:1, pad2:6,
|
||||
debug:1, ap:1, smart:1, rtt:1, pad3:4,
|
||||
pad4:8;
|
||||
timer0:1, timer1:1, rtc:1, gfrc:1, pad4:4;
|
||||
} extn;
|
||||
struct bcr_mpy extn_mpy;
|
||||
struct bcr_extn_xymem extn_xymem;
|
||||
|
|
|
@ -30,8 +30,11 @@
|
|||
/* Was Intr taken in User Mode */
|
||||
#define AUX_IRQ_ACT_BIT_U 31
|
||||
|
||||
/* 0 is highest level, but taken by FIRQs, if present in design */
|
||||
#define ARCV2_IRQ_DEF_PRIO 0
|
||||
/*
|
||||
* User space should be interruptable even by lowest prio interrupt
|
||||
* Safe even if actual interrupt priorities is fewer or even one
|
||||
*/
|
||||
#define ARCV2_IRQ_DEF_PRIO 15
|
||||
|
||||
/* seed value for status register */
|
||||
#define ISA_INIT_STATUS_BITS (STATUS_IE_MASK | STATUS_AD_MASK | \
|
||||
|
|
|
@ -39,8 +39,8 @@ struct mcip_cmd {
|
|||
#define CMD_DEBUG_SET_MASK 0x34
|
||||
#define CMD_DEBUG_SET_SELECT 0x36
|
||||
|
||||
#define CMD_GRTC_READ_LO 0x42
|
||||
#define CMD_GRTC_READ_HI 0x43
|
||||
#define CMD_GFRC_READ_LO 0x42
|
||||
#define CMD_GFRC_READ_HI 0x43
|
||||
|
||||
#define CMD_IDU_ENABLE 0x71
|
||||
#define CMD_IDU_DISABLE 0x72
|
||||
|
|
|
@ -179,37 +179,44 @@
|
|||
#define __S111 PAGE_U_X_W_R
|
||||
|
||||
/****************************************************************
|
||||
* Page Table Lookup split
|
||||
* 2 tier (PGD:PTE) software page walker
|
||||
*
|
||||
* We implement 2 tier paging and since this is all software, we are free
|
||||
* to customize the span of a PGD / PTE entry to suit us
|
||||
*
|
||||
* 32 bit virtual address
|
||||
* [31] 32 bit virtual address [0]
|
||||
* -------------------------------------------------------
|
||||
* | BITS_FOR_PGD | BITS_FOR_PTE | BITS_IN_PAGE |
|
||||
* | | <------------ PGDIR_SHIFT ----------> |
|
||||
* | | |
|
||||
* | BITS_FOR_PGD | BITS_FOR_PTE | <-- PAGE_SHIFT --> |
|
||||
* -------------------------------------------------------
|
||||
* | | |
|
||||
* | | --> off in page frame
|
||||
* | |
|
||||
* | ---> index into Page Table
|
||||
* |
|
||||
* ----> index into Page Directory
|
||||
*
|
||||
* In a single page size configuration, only PAGE_SHIFT is fixed
|
||||
* So both PGD and PTE sizing can be tweaked
|
||||
* e.g. 8K page (PAGE_SHIFT 13) can have
|
||||
* - PGDIR_SHIFT 21 -> 11:8:13 address split
|
||||
* - PGDIR_SHIFT 24 -> 8:11:13 address split
|
||||
*
|
||||
* If Super Page is configured, PGDIR_SHIFT becomes fixed too,
|
||||
* so the sizing flexibility is gone.
|
||||
*/
|
||||
|
||||
#define BITS_IN_PAGE PAGE_SHIFT
|
||||
|
||||
/* Optimal Sizing of Pg Tbl - based on MMU page size */
|
||||
#if defined(CONFIG_ARC_PAGE_SIZE_8K)
|
||||
#define BITS_FOR_PTE 8 /* 11:8:13 */
|
||||
#elif defined(CONFIG_ARC_PAGE_SIZE_16K)
|
||||
#define BITS_FOR_PTE 8 /* 10:8:14 */
|
||||
#elif defined(CONFIG_ARC_PAGE_SIZE_4K)
|
||||
#define BITS_FOR_PTE 9 /* 11:9:12 */
|
||||
#if defined(CONFIG_ARC_HUGEPAGE_16M)
|
||||
#define PGDIR_SHIFT 24
|
||||
#elif defined(CONFIG_ARC_HUGEPAGE_2M)
|
||||
#define PGDIR_SHIFT 21
|
||||
#else
|
||||
/*
|
||||
* Only Normal page support so "hackable" (see comment above)
|
||||
* Default value provides 11:8:13 (8K), 11:9:12 (4K)
|
||||
*/
|
||||
#define PGDIR_SHIFT 21
|
||||
#endif
|
||||
|
||||
#define BITS_FOR_PGD (32 - BITS_FOR_PTE - BITS_IN_PAGE)
|
||||
#define BITS_FOR_PTE (PGDIR_SHIFT - PAGE_SHIFT)
|
||||
#define BITS_FOR_PGD (32 - PGDIR_SHIFT)
|
||||
|
||||
#define PGDIR_SHIFT (32 - BITS_FOR_PGD)
|
||||
#define PGDIR_SIZE (1UL << PGDIR_SHIFT) /* vaddr span, not PDG sz */
|
||||
#define PGDIR_MASK (~(PGDIR_SIZE-1))
|
||||
|
||||
|
|
|
@ -211,7 +211,11 @@ debug_marker_syscall:
|
|||
; (since IRQ NOT allowed in DS in ARCv2, this can only happen if orig
|
||||
; entry was via Exception in DS which got preempted in kernel).
|
||||
;
|
||||
; IRQ RTIE won't reliably restore DE bit and/or BTA, needs handling
|
||||
; IRQ RTIE won't reliably restore DE bit and/or BTA, needs workaround
|
||||
;
|
||||
; Solution is return from Intr w/o any delay slot quirks into a kernel trampoline
|
||||
; and from pure kernel mode return to delay slot which handles DS bit/BTA correctly
|
||||
|
||||
.Lintr_ret_to_delay_slot:
|
||||
debug_marker_ds:
|
||||
|
||||
|
@ -222,18 +226,23 @@ debug_marker_ds:
|
|||
ld r2, [sp, PT_ret]
|
||||
ld r3, [sp, PT_status32]
|
||||
|
||||
; STAT32 for Int return created from scratch
|
||||
; (No delay dlot, disable Further intr in trampoline)
|
||||
|
||||
bic r0, r3, STATUS_U_MASK|STATUS_DE_MASK|STATUS_IE_MASK|STATUS_L_MASK
|
||||
st r0, [sp, PT_status32]
|
||||
|
||||
mov r1, .Lintr_ret_to_delay_slot_2
|
||||
st r1, [sp, PT_ret]
|
||||
|
||||
; Orig exception PC/STAT32 safekept @orig_r0 and @event stack slots
|
||||
st r2, [sp, 0]
|
||||
st r3, [sp, 4]
|
||||
|
||||
b .Lisr_ret_fast_path
|
||||
|
||||
.Lintr_ret_to_delay_slot_2:
|
||||
; Trampoline to restore orig exception PC/STAT32/BTA/AUX_USER_SP
|
||||
sub sp, sp, SZ_PT_REGS
|
||||
st r9, [sp, -4]
|
||||
|
||||
|
@ -243,11 +252,19 @@ debug_marker_ds:
|
|||
ld r9, [sp, 4]
|
||||
sr r9, [erstatus]
|
||||
|
||||
; restore AUX_USER_SP if returning to U mode
|
||||
bbit0 r9, STATUS_U_BIT, 1f
|
||||
ld r9, [sp, PT_sp]
|
||||
sr r9, [AUX_USER_SP]
|
||||
|
||||
1:
|
||||
ld r9, [sp, 8]
|
||||
sr r9, [erbta]
|
||||
|
||||
ld r9, [sp, -4]
|
||||
add sp, sp, SZ_PT_REGS
|
||||
|
||||
; return from pure kernel mode to delay slot
|
||||
rtie
|
||||
|
||||
END(ret_from_exception)
|
||||
|
|
|
@ -14,6 +14,8 @@
|
|||
#include <linux/irqchip.h>
|
||||
#include <asm/irq.h>
|
||||
|
||||
static int irq_prio;
|
||||
|
||||
/*
|
||||
* Early Hardware specific Interrupt setup
|
||||
* -Called very early (start_kernel -> setup_arch -> setup_processor)
|
||||
|
@ -24,6 +26,14 @@ void arc_init_IRQ(void)
|
|||
{
|
||||
unsigned int tmp;
|
||||
|
||||
struct irq_build {
|
||||
#ifdef CONFIG_CPU_BIG_ENDIAN
|
||||
unsigned int pad:3, firq:1, prio:4, exts:8, irqs:8, ver:8;
|
||||
#else
|
||||
unsigned int ver:8, irqs:8, exts:8, prio:4, firq:1, pad:3;
|
||||
#endif
|
||||
} irq_bcr;
|
||||
|
||||
struct aux_irq_ctrl {
|
||||
#ifdef CONFIG_CPU_BIG_ENDIAN
|
||||
unsigned int res3:18, save_idx_regs:1, res2:1,
|
||||
|
@ -46,28 +56,25 @@ void arc_init_IRQ(void)
|
|||
|
||||
WRITE_AUX(AUX_IRQ_CTRL, ictrl);
|
||||
|
||||
/* setup status32, don't enable intr yet as kernel doesn't want */
|
||||
tmp = read_aux_reg(0xa);
|
||||
tmp |= ISA_INIT_STATUS_BITS;
|
||||
tmp &= ~STATUS_IE_MASK;
|
||||
asm volatile("flag %0 \n"::"r"(tmp));
|
||||
|
||||
/*
|
||||
* ARCv2 core intc provides multiple interrupt priorities (upto 16).
|
||||
* Typical builds though have only two levels (0-high, 1-low)
|
||||
* Linux by default uses lower prio 1 for most irqs, reserving 0 for
|
||||
* NMI style interrupts in future (say perf)
|
||||
*
|
||||
* Read the intc BCR to confirm that Linux default priority is avail
|
||||
* in h/w
|
||||
*
|
||||
* Note:
|
||||
* IRQ_BCR[27..24] contains N-1 (for N priority levels) and prio level
|
||||
* is 0 based.
|
||||
*/
|
||||
tmp = (read_aux_reg(ARC_REG_IRQ_BCR) >> 24 ) & 0xF;
|
||||
if (ARCV2_IRQ_DEF_PRIO > tmp)
|
||||
panic("Linux default irq prio incorrect\n");
|
||||
|
||||
READ_BCR(ARC_REG_IRQ_BCR, irq_bcr);
|
||||
|
||||
irq_prio = irq_bcr.prio; /* Encoded as N-1 for N levels */
|
||||
pr_info("archs-intc\t: %d priority levels (default %d)%s\n",
|
||||
irq_prio + 1, irq_prio,
|
||||
irq_bcr.firq ? " FIRQ (not used)":"");
|
||||
|
||||
/* setup status32, don't enable intr yet as kernel doesn't want */
|
||||
tmp = read_aux_reg(0xa);
|
||||
tmp |= STATUS_AD_MASK | (irq_prio << 1);
|
||||
tmp &= ~STATUS_IE_MASK;
|
||||
asm volatile("flag %0 \n"::"r"(tmp));
|
||||
}
|
||||
|
||||
static void arcv2_irq_mask(struct irq_data *data)
|
||||
|
@ -86,7 +93,7 @@ void arcv2_irq_enable(struct irq_data *data)
|
|||
{
|
||||
/* set default priority */
|
||||
write_aux_reg(AUX_IRQ_SELECT, data->irq);
|
||||
write_aux_reg(AUX_IRQ_PRIORITY, ARCV2_IRQ_DEF_PRIO);
|
||||
write_aux_reg(AUX_IRQ_PRIORITY, irq_prio);
|
||||
|
||||
/*
|
||||
* hw auto enables (linux unmask) all by default
|
||||
|
|
|
@ -96,13 +96,13 @@ static void mcip_probe_n_setup(void)
|
|||
#ifdef CONFIG_CPU_BIG_ENDIAN
|
||||
unsigned int pad3:8,
|
||||
idu:1, llm:1, num_cores:6,
|
||||
iocoh:1, grtc:1, dbg:1, pad2:1,
|
||||
iocoh:1, gfrc:1, dbg:1, pad2:1,
|
||||
msg:1, sem:1, ipi:1, pad:1,
|
||||
ver:8;
|
||||
#else
|
||||
unsigned int ver:8,
|
||||
pad:1, ipi:1, sem:1, msg:1,
|
||||
pad2:1, dbg:1, grtc:1, iocoh:1,
|
||||
pad2:1, dbg:1, gfrc:1, iocoh:1,
|
||||
num_cores:6, llm:1, idu:1,
|
||||
pad3:8;
|
||||
#endif
|
||||
|
@ -116,7 +116,7 @@ static void mcip_probe_n_setup(void)
|
|||
IS_AVAIL1(mp.ipi, "IPI "),
|
||||
IS_AVAIL1(mp.idu, "IDU "),
|
||||
IS_AVAIL1(mp.dbg, "DEBUG "),
|
||||
IS_AVAIL1(mp.grtc, "GRTC"));
|
||||
IS_AVAIL1(mp.gfrc, "GFRC"));
|
||||
|
||||
idu_detected = mp.idu;
|
||||
|
||||
|
@ -125,8 +125,8 @@ static void mcip_probe_n_setup(void)
|
|||
__mcip_cmd_data(CMD_DEBUG_SET_MASK, 0xf, 0xf);
|
||||
}
|
||||
|
||||
if (IS_ENABLED(CONFIG_ARC_HAS_GRTC) && !mp.grtc)
|
||||
panic("kernel trying to use non-existent GRTC\n");
|
||||
if (IS_ENABLED(CONFIG_ARC_HAS_GFRC) && !mp.gfrc)
|
||||
panic("kernel trying to use non-existent GFRC\n");
|
||||
}
|
||||
|
||||
struct plat_smp_ops plat_smp_ops = {
|
||||
|
|
|
@ -45,6 +45,7 @@ struct cpuinfo_arc cpuinfo_arc700[NR_CPUS];
|
|||
static void read_arc_build_cfg_regs(void)
|
||||
{
|
||||
struct bcr_perip uncached_space;
|
||||
struct bcr_timer timer;
|
||||
struct bcr_generic bcr;
|
||||
struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()];
|
||||
unsigned long perip_space;
|
||||
|
@ -53,7 +54,11 @@ static void read_arc_build_cfg_regs(void)
|
|||
READ_BCR(AUX_IDENTITY, cpu->core);
|
||||
READ_BCR(ARC_REG_ISA_CFG_BCR, cpu->isa);
|
||||
|
||||
READ_BCR(ARC_REG_TIMERS_BCR, cpu->timers);
|
||||
READ_BCR(ARC_REG_TIMERS_BCR, timer);
|
||||
cpu->extn.timer0 = timer.t0;
|
||||
cpu->extn.timer1 = timer.t1;
|
||||
cpu->extn.rtc = timer.rtc;
|
||||
|
||||
cpu->vec_base = read_aux_reg(AUX_INTR_VEC_BASE);
|
||||
|
||||
READ_BCR(ARC_REG_D_UNCACH_BCR, uncached_space);
|
||||
|
@ -208,9 +213,9 @@ static char *arc_cpu_mumbojumbo(int cpu_id, char *buf, int len)
|
|||
(unsigned int)(arc_get_core_freq() / 10000) % 100);
|
||||
|
||||
n += scnprintf(buf + n, len - n, "Timers\t\t: %s%s%s%s\nISA Extn\t: ",
|
||||
IS_AVAIL1(cpu->timers.t0, "Timer0 "),
|
||||
IS_AVAIL1(cpu->timers.t1, "Timer1 "),
|
||||
IS_AVAIL2(cpu->timers.rtc, "64-bit RTC ",
|
||||
IS_AVAIL1(cpu->extn.timer0, "Timer0 "),
|
||||
IS_AVAIL1(cpu->extn.timer1, "Timer1 "),
|
||||
IS_AVAIL2(cpu->extn.rtc, "Local-64-bit-Ctr ",
|
||||
CONFIG_ARC_HAS_RTC));
|
||||
|
||||
n += i = scnprintf(buf + n, len - n, "%s%s%s%s%s",
|
||||
|
@ -293,13 +298,13 @@ static void arc_chk_core_config(void)
|
|||
struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()];
|
||||
int fpu_enabled;
|
||||
|
||||
if (!cpu->timers.t0)
|
||||
if (!cpu->extn.timer0)
|
||||
panic("Timer0 is not present!\n");
|
||||
|
||||
if (!cpu->timers.t1)
|
||||
if (!cpu->extn.timer1)
|
||||
panic("Timer1 is not present!\n");
|
||||
|
||||
if (IS_ENABLED(CONFIG_ARC_HAS_RTC) && !cpu->timers.rtc)
|
||||
if (IS_ENABLED(CONFIG_ARC_HAS_RTC) && !cpu->extn.rtc)
|
||||
panic("RTC is not present\n");
|
||||
|
||||
#ifdef CONFIG_ARC_HAS_DCCM
|
||||
|
@ -334,6 +339,7 @@ static void arc_chk_core_config(void)
|
|||
panic("FPU non-existent, disable CONFIG_ARC_FPU_SAVE_RESTORE\n");
|
||||
|
||||
if (is_isa_arcv2() && IS_ENABLED(CONFIG_SMP) && cpu->isa.atomic &&
|
||||
IS_ENABLED(CONFIG_ARC_HAS_LLSC) &&
|
||||
!IS_ENABLED(CONFIG_ARC_STAR_9000923308))
|
||||
panic("llock/scond livelock workaround missing\n");
|
||||
}
|
||||
|
|
|
@ -62,7 +62,7 @@
|
|||
|
||||
/********** Clock Source Device *********/
|
||||
|
||||
#ifdef CONFIG_ARC_HAS_GRTC
|
||||
#ifdef CONFIG_ARC_HAS_GFRC
|
||||
|
||||
static int arc_counter_setup(void)
|
||||
{
|
||||
|
@ -83,10 +83,10 @@ static cycle_t arc_counter_read(struct clocksource *cs)
|
|||
|
||||
local_irq_save(flags);
|
||||
|
||||
__mcip_cmd(CMD_GRTC_READ_LO, 0);
|
||||
__mcip_cmd(CMD_GFRC_READ_LO, 0);
|
||||
stamp.l = read_aux_reg(ARC_REG_MCIP_READBACK);
|
||||
|
||||
__mcip_cmd(CMD_GRTC_READ_HI, 0);
|
||||
__mcip_cmd(CMD_GFRC_READ_HI, 0);
|
||||
stamp.h = read_aux_reg(ARC_REG_MCIP_READBACK);
|
||||
|
||||
local_irq_restore(flags);
|
||||
|
@ -95,7 +95,7 @@ static cycle_t arc_counter_read(struct clocksource *cs)
|
|||
}
|
||||
|
||||
static struct clocksource arc_counter = {
|
||||
.name = "ARConnect GRTC",
|
||||
.name = "ARConnect GFRC",
|
||||
.rating = 400,
|
||||
.read = arc_counter_read,
|
||||
.mask = CLOCKSOURCE_MASK(64),
|
||||
|
|
|
@ -106,6 +106,15 @@ ORIG_CFLAGS := $(KBUILD_CFLAGS)
|
|||
KBUILD_CFLAGS = $(subst -pg, , $(ORIG_CFLAGS))
|
||||
endif
|
||||
|
||||
# -fstack-protector-strong triggers protection checks in this code,
|
||||
# but it is being used too early to link to meaningful stack_chk logic.
|
||||
nossp_flags := $(call cc-option, -fno-stack-protector)
|
||||
CFLAGS_atags_to_fdt.o := $(nossp_flags)
|
||||
CFLAGS_fdt.o := $(nossp_flags)
|
||||
CFLAGS_fdt_ro.o := $(nossp_flags)
|
||||
CFLAGS_fdt_rw.o := $(nossp_flags)
|
||||
CFLAGS_fdt_wip.o := $(nossp_flags)
|
||||
|
||||
ccflags-y := -fpic -mno-single-pic-base -fno-builtin -I$(obj)
|
||||
asflags-y := -DZIMAGE
|
||||
|
||||
|
|
|
@ -439,6 +439,7 @@ mailbox: mailbox@480C8000 {
|
|||
ti,mbox-num-users = <4>;
|
||||
ti,mbox-num-fifos = <8>;
|
||||
mbox_wkupm3: wkup_m3 {
|
||||
ti,mbox-send-noirq;
|
||||
ti,mbox-tx = <0 0 0>;
|
||||
ti,mbox-rx = <0 0 3>;
|
||||
};
|
||||
|
|
|
@ -73,7 +73,7 @@ scu: scu@48240000 {
|
|||
global_timer: timer@48240200 {
|
||||
compatible = "arm,cortex-a9-global-timer";
|
||||
reg = <0x48240200 0x100>;
|
||||
interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <GIC_PPI 11 IRQ_TYPE_EDGE_RISING>;
|
||||
interrupt-parent = <&gic>;
|
||||
clocks = <&mpu_periphclk>;
|
||||
};
|
||||
|
@ -81,7 +81,7 @@ global_timer: timer@48240200 {
|
|||
local_timer: timer@48240600 {
|
||||
compatible = "arm,cortex-a9-twd-timer";
|
||||
reg = <0x48240600 0x100>;
|
||||
interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <GIC_PPI 13 IRQ_TYPE_EDGE_RISING>;
|
||||
interrupt-parent = <&gic>;
|
||||
clocks = <&mpu_periphclk>;
|
||||
};
|
||||
|
@ -290,6 +290,7 @@ mailbox: mailbox@480C8000 {
|
|||
ti,mbox-num-users = <4>;
|
||||
ti,mbox-num-fifos = <8>;
|
||||
mbox_wkupm3: wkup_m3 {
|
||||
ti,mbox-send-noirq;
|
||||
ti,mbox-tx = <0 0 0>;
|
||||
ti,mbox-rx = <0 0 3>;
|
||||
};
|
||||
|
|
|
@ -590,8 +590,6 @@ pixcir_ts@5c {
|
|||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pixcir_ts_pins>;
|
||||
reg = <0x5c>;
|
||||
interrupt-parent = <&gpio3>;
|
||||
interrupts = <22 0>;
|
||||
|
||||
attb-gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
|
||||
|
||||
|
@ -599,7 +597,7 @@ pixcir_ts@5c {
|
|||
* 0x264 represents the offset of padconf register of
|
||||
* gpio3_22 from am43xx_pinmux base.
|
||||
*/
|
||||
interrupts-extended = <&gpio3 22 IRQ_TYPE_NONE>,
|
||||
interrupts-extended = <&gpio3 22 IRQ_TYPE_EDGE_FALLING>,
|
||||
<&am43xx_pinmux 0x264>;
|
||||
interrupt-names = "tsc", "wakeup";
|
||||
|
||||
|
|
|
@ -491,7 +491,7 @@ pixcir_ts@5c {
|
|||
pinctrl-0 = <&pixcir_ts_pins>;
|
||||
reg = <0x5c>;
|
||||
interrupt-parent = <&gpio1>;
|
||||
interrupts = <17 0>;
|
||||
interrupts = <17 IRQ_TYPE_EDGE_FALLING>;
|
||||
|
||||
attb-gpio = <&gpio1 17 GPIO_ACTIVE_HIGH>;
|
||||
|
||||
|
|
|
@ -167,7 +167,7 @@ DRA7XX_CORE_IOPAD(0x35b4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* vin2a_d19.rgmii1_rc
|
|||
DRA7XX_CORE_IOPAD(0x35b8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* vin2a_d20.rgmii1_rd3 */
|
||||
DRA7XX_CORE_IOPAD(0x35bc, PIN_INPUT_PULLDOWN | MUX_MODE3) /* vin2a_d21.rgmii1_rd2 */
|
||||
DRA7XX_CORE_IOPAD(0x35c0, PIN_INPUT_PULLDOWN | MUX_MODE3) /* vin2a_d22.rgmii1_rd1 */
|
||||
DRA7XX_CORE_IOPAD(0x35c4, PIN_INPUT_PULLUP | MUX_MODE3) /* vin2a_d23.rgmii1_rd0 */
|
||||
DRA7XX_CORE_IOPAD(0x35c4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* vin2a_d23.rgmii1_rd0 */
|
||||
>;
|
||||
};
|
||||
|
||||
|
@ -492,14 +492,14 @@ &qspi {
|
|||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&qspi1_pins>;
|
||||
|
||||
spi-max-frequency = <20000000>;
|
||||
spi-max-frequency = <48000000>;
|
||||
|
||||
spi_flash: spi_flash@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "spansion,m25p80", "jedec,spi-nor";
|
||||
reg = <0>; /* CS0 */
|
||||
spi-max-frequency = <20000000>;
|
||||
spi-max-frequency = <48000000>;
|
||||
|
||||
partition@0 {
|
||||
label = "uboot";
|
||||
|
@ -559,13 +559,13 @@ &mac {
|
|||
|
||||
&cpsw_emac0 {
|
||||
phy_id = <&davinci_mdio>, <0>;
|
||||
phy-mode = "rgmii";
|
||||
phy-mode = "rgmii-txid";
|
||||
dual_emac_res_vlan = <0>;
|
||||
};
|
||||
|
||||
&cpsw_emac1 {
|
||||
phy_id = <&davinci_mdio>, <1>;
|
||||
phy-mode = "rgmii";
|
||||
phy-mode = "rgmii-txid";
|
||||
dual_emac_res_vlan = <1>;
|
||||
};
|
||||
|
||||
|
@ -588,7 +588,7 @@ &usb1 {
|
|||
};
|
||||
|
||||
&usb2 {
|
||||
dr_mode = "peripheral";
|
||||
dr_mode = "host";
|
||||
};
|
||||
|
||||
&mcasp3 {
|
||||
|
|
|
@ -25,8 +25,8 @@ aliases {
|
|||
&dra7_pmx_core {
|
||||
uart3_pins_default: uart3_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
DRA7XX_CORE_IOPAD(0x37f8, PIN_INPUT_SLEW | MUX_MODE2) /* uart2_ctsn.uart3_rxd */
|
||||
DRA7XX_CORE_IOPAD(0x37fc, PIN_INPUT_SLEW | MUX_MODE1) /* uart2_rtsn.uart3_txd */
|
||||
DRA7XX_CORE_IOPAD(0x3648, PIN_INPUT_SLEW | MUX_MODE0) /* uart3_rxd */
|
||||
DRA7XX_CORE_IOPAD(0x364c, PIN_INPUT_SLEW | MUX_MODE0) /* uart3_txd */
|
||||
>;
|
||||
};
|
||||
|
||||
|
@ -108,9 +108,9 @@ &i2c5 {
|
|||
pinctrl-0 = <&i2c5_pins_default>;
|
||||
clock-frequency = <400000>;
|
||||
|
||||
eeprom_base: atmel@50 {
|
||||
eeprom_base: atmel@54 {
|
||||
compatible = "atmel,24c08";
|
||||
reg = <0x50>;
|
||||
reg = <0x54>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
|
||||
|
|
|
@ -152,6 +152,7 @@ nand@d0000 {
|
|||
nand-on-flash-bbt;
|
||||
|
||||
partitions {
|
||||
compatible = "fixed-partitions";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
|
|
|
@ -114,9 +114,15 @@ m25p80@0 {
|
|||
|
||||
macb0: ethernet@f8008000 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_macb0_default>;
|
||||
pinctrl-0 = <&pinctrl_macb0_default &pinctrl_macb0_phy_irq>;
|
||||
phy-mode = "rmii";
|
||||
status = "okay";
|
||||
|
||||
ethernet-phy@1 {
|
||||
reg = <0x1>;
|
||||
interrupt-parent = <&pioA>;
|
||||
interrupts = <73 IRQ_TYPE_LEVEL_LOW>;
|
||||
};
|
||||
};
|
||||
|
||||
pdmic@f8018000 {
|
||||
|
@ -300,6 +306,10 @@ pinctrl_macb0_default: macb0_default {
|
|||
bias-disable;
|
||||
};
|
||||
|
||||
pinctrl_macb0_phy_irq: macb0_phy_irq {
|
||||
pinmux = <PIN_PC9__GPIO>;
|
||||
};
|
||||
|
||||
pinctrl_pdmic_default: pdmic_default {
|
||||
pinmux = <PIN_PB26__PDMIC_DAT>,
|
||||
<PIN_PB27__PDMIC_CLK>;
|
||||
|
|
|
@ -86,10 +86,12 @@ i2c0: i2c@f8014000 {
|
|||
macb0: ethernet@f8020000 {
|
||||
phy-mode = "rmii";
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_macb0_rmii &pinctrl_macb0_phy_irq>;
|
||||
|
||||
phy0: ethernet-phy@1 {
|
||||
interrupt-parent = <&pioE>;
|
||||
interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
|
||||
interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
|
||||
reg = <1>;
|
||||
};
|
||||
};
|
||||
|
@ -152,6 +154,10 @@ pinctrl_key_gpio: key_gpio_0 {
|
|||
atmel,pins =
|
||||
<AT91_PIOE 8 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;
|
||||
};
|
||||
pinctrl_macb0_phy_irq: macb0_phy_irq_0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOE 1 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
@ -160,8 +160,15 @@ atmel_mxt_ts@4c {
|
|||
};
|
||||
|
||||
macb0: ethernet@f8020000 {
|
||||
pinctrl-0 = <&pinctrl_macb0_rmii &pinctrl_macb0_phy_irq>;
|
||||
phy-mode = "rmii";
|
||||
status = "okay";
|
||||
|
||||
ethernet-phy@1 {
|
||||
reg = <0x1>;
|
||||
interrupt-parent = <&pioE>;
|
||||
interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
|
||||
};
|
||||
};
|
||||
|
||||
mmc1: mmc@fc000000 {
|
||||
|
@ -193,6 +200,10 @@ watchdog@fc068640 {
|
|||
|
||||
pinctrl@fc06a000 {
|
||||
board {
|
||||
pinctrl_macb0_phy_irq: macb0_phy_irq {
|
||||
atmel,pins =
|
||||
<AT91_PIOE 1 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
|
||||
};
|
||||
pinctrl_mmc0_cd: mmc0_cd {
|
||||
atmel,pins =
|
||||
<AT91_PIOE 5 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;
|
||||
|
|
|
@ -215,7 +215,7 @@ enter {
|
|||
};
|
||||
|
||||
panel: panel {
|
||||
compatible = "qd,qd43003c0-40", "simple-panel";
|
||||
compatible = "qiaodian,qd43003c0-40", "simple-panel";
|
||||
backlight = <&backlight>;
|
||||
power-supply = <&panel_reg>;
|
||||
#address-cells = <1>;
|
||||
|
|
|
@ -1,7 +1,8 @@
|
|||
/*
|
||||
* Device Tree file for Buffalo Linkstation LS-WVL/VL
|
||||
*
|
||||
* Copyright (C) 2015, rogershimizu@gmail.com
|
||||
* Copyright (C) 2015, 2016
|
||||
* Roger Shimizu <rogershimizu@gmail.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
|
@ -156,21 +157,21 @@ gpio_keys {
|
|||
button@1 {
|
||||
label = "Function Button";
|
||||
linux,code = <KEY_OPTION>;
|
||||
gpios = <&gpio0 45 GPIO_ACTIVE_LOW>;
|
||||
gpios = <&gpio1 13 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
button@2 {
|
||||
label = "Power-on Switch";
|
||||
linux,code = <KEY_RESERVED>;
|
||||
linux,input-type = <5>;
|
||||
gpios = <&gpio0 46 GPIO_ACTIVE_LOW>;
|
||||
gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
button@3 {
|
||||
label = "Power-auto Switch";
|
||||
linux,code = <KEY_ESC>;
|
||||
linux,input-type = <5>;
|
||||
gpios = <&gpio0 47 GPIO_ACTIVE_LOW>;
|
||||
gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
|
||||
|
@ -185,38 +186,38 @@ &pmx_led_hdderr0
|
|||
|
||||
led@1 {
|
||||
label = "lswvl:red:alarm";
|
||||
gpios = <&gpio0 36 GPIO_ACTIVE_LOW>;
|
||||
gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led@2 {
|
||||
label = "lswvl:red:func";
|
||||
gpios = <&gpio0 37 GPIO_ACTIVE_LOW>;
|
||||
gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led@3 {
|
||||
label = "lswvl:amber:info";
|
||||
gpios = <&gpio0 38 GPIO_ACTIVE_LOW>;
|
||||
gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led@4 {
|
||||
label = "lswvl:blue:func";
|
||||
gpios = <&gpio0 39 GPIO_ACTIVE_LOW>;
|
||||
gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led@5 {
|
||||
label = "lswvl:blue:power";
|
||||
gpios = <&gpio0 40 GPIO_ACTIVE_LOW>;
|
||||
gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
|
||||
default-state = "keep";
|
||||
};
|
||||
|
||||
led@6 {
|
||||
label = "lswvl:red:hdderr0";
|
||||
gpios = <&gpio0 34 GPIO_ACTIVE_LOW>;
|
||||
gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led@7 {
|
||||
label = "lswvl:red:hdderr1";
|
||||
gpios = <&gpio0 35 GPIO_ACTIVE_LOW>;
|
||||
gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
|
||||
|
@ -233,7 +234,7 @@ gpio_fan {
|
|||
3250 1
|
||||
5000 0>;
|
||||
|
||||
alarm-gpios = <&gpio0 43 GPIO_ACTIVE_HIGH>;
|
||||
alarm-gpios = <&gpio1 11 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
restart_poweroff {
|
||||
|
|
|
@ -1,7 +1,8 @@
|
|||
/*
|
||||
* Device Tree file for Buffalo Linkstation LS-WXL/WSXL
|
||||
*
|
||||
* Copyright (C) 2015, rogershimizu@gmail.com
|
||||
* Copyright (C) 2015, 2016
|
||||
* Roger Shimizu <rogershimizu@gmail.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
|
@ -156,21 +157,21 @@ gpio_keys {
|
|||
button@1 {
|
||||
label = "Function Button";
|
||||
linux,code = <KEY_OPTION>;
|
||||
gpios = <&gpio1 41 GPIO_ACTIVE_LOW>;
|
||||
gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
button@2 {
|
||||
label = "Power-on Switch";
|
||||
linux,code = <KEY_RESERVED>;
|
||||
linux,input-type = <5>;
|
||||
gpios = <&gpio1 42 GPIO_ACTIVE_LOW>;
|
||||
gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
button@3 {
|
||||
label = "Power-auto Switch";
|
||||
linux,code = <KEY_ESC>;
|
||||
linux,input-type = <5>;
|
||||
gpios = <&gpio1 43 GPIO_ACTIVE_LOW>;
|
||||
gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
|
||||
|
@ -185,12 +186,12 @@ &pmx_led_hdderr0
|
|||
|
||||
led@1 {
|
||||
label = "lswxl:blue:func";
|
||||
gpios = <&gpio1 36 GPIO_ACTIVE_LOW>;
|
||||
gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
led@2 {
|
||||
label = "lswxl:red:alarm";
|
||||
gpios = <&gpio1 49 GPIO_ACTIVE_LOW>;
|
||||
gpios = <&gpio1 17 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
led@3 {
|
||||
|
@ -200,23 +201,23 @@ led@3 {
|
|||
|
||||
led@4 {
|
||||
label = "lswxl:blue:power";
|
||||
gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
|
||||
gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "keep";
|
||||
};
|
||||
|
||||
led@5 {
|
||||
label = "lswxl:red:func";
|
||||
gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
|
||||
default-state = "keep";
|
||||
gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led@6 {
|
||||
label = "lswxl:red:hdderr0";
|
||||
gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;
|
||||
gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led@7 {
|
||||
label = "lswxl:red:hdderr1";
|
||||
gpios = <&gpio1 3 GPIO_ACTIVE_LOW>;
|
||||
gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
|
||||
|
@ -225,15 +226,15 @@ gpio_fan {
|
|||
pinctrl-0 = <&pmx_fan_low &pmx_fan_high &pmx_fan_lock>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
gpios = <&gpio0 47 GPIO_ACTIVE_LOW
|
||||
&gpio0 48 GPIO_ACTIVE_LOW>;
|
||||
gpios = <&gpio1 16 GPIO_ACTIVE_LOW
|
||||
&gpio1 15 GPIO_ACTIVE_LOW>;
|
||||
|
||||
gpio-fan,speed-map = <0 3
|
||||
1500 2
|
||||
3250 1
|
||||
5000 0>;
|
||||
|
||||
alarm-gpios = <&gpio1 49 GPIO_ACTIVE_HIGH>;
|
||||
alarm-gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
restart_poweroff {
|
||||
|
@ -256,7 +257,7 @@ usb_power: regulator@1 {
|
|||
enable-active-high;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
gpio = <&gpio0 37 GPIO_ACTIVE_HIGH>;
|
||||
gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
hdd_power0: regulator@2 {
|
||||
compatible = "regulator-fixed";
|
||||
|
|
|
@ -131,6 +131,7 @@ &nand {
|
|||
chip-delay = <40>;
|
||||
status = "okay";
|
||||
partitions {
|
||||
compatible = "fixed-partitions";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
|
|
|
@ -112,14 +112,6 @@ &i2c3 {
|
|||
clock-frequency = <400000>;
|
||||
};
|
||||
|
||||
&i2c2 {
|
||||
clock-frequency = <400000>;
|
||||
};
|
||||
|
||||
&i2c3 {
|
||||
clock-frequency = <400000>;
|
||||
};
|
||||
|
||||
/*
|
||||
* Only found on the wireless SOM. For the SOM without wireless, the pins for
|
||||
* MMC3 can be routed with jumpers to the second MMC slot on the devkit and
|
||||
|
@ -143,6 +135,7 @@ wlcore: wlcore@2 {
|
|||
interrupt-parent = <&gpio5>;
|
||||
interrupts = <24 IRQ_TYPE_LEVEL_HIGH>; /* gpio 152 */
|
||||
ref-clock-frequency = <26000000>;
|
||||
tcxo-clock-frequency = <26000000>;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
|
@ -130,6 +130,16 @@ sound: sound {
|
|||
};
|
||||
};
|
||||
|
||||
&gpio8 {
|
||||
/* TI trees use GPIO instead of msecure, see also muxing */
|
||||
p234 {
|
||||
gpio-hog;
|
||||
gpios = <10 GPIO_ACTIVE_HIGH>;
|
||||
output-high;
|
||||
line-name = "gpio8_234/msecure";
|
||||
};
|
||||
};
|
||||
|
||||
&omap5_pmx_core {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <
|
||||
|
@ -213,6 +223,13 @@ OMAP5_IOPAD(0x1bc, PIN_OUTPUT | MUX_MODE6) /* mcspi1_clk.gpio5_140 */
|
|||
>;
|
||||
};
|
||||
|
||||
/* TI trees use GPIO mode; msecure mode does not work reliably? */
|
||||
palmas_msecure_pins: palmas_msecure_pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP5_IOPAD(0x180, PIN_OUTPUT | MUX_MODE6) /* gpio8_234 */
|
||||
>;
|
||||
};
|
||||
|
||||
usbhost_pins: pinmux_usbhost_pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP5_IOPAD(0x0c4, PIN_INPUT | MUX_MODE0) /* usbb2_hsic_strobe */
|
||||
|
@ -278,6 +295,12 @@ &omap5_pmx_wkup {
|
|||
&usbhost_wkup_pins
|
||||
>;
|
||||
|
||||
palmas_sys_nirq_pins: pinmux_palmas_sys_nirq_pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP5_IOPAD(0x068, PIN_INPUT_PULLUP | MUX_MODE0) /* sys_nirq1 */
|
||||
>;
|
||||
};
|
||||
|
||||
usbhost_wkup_pins: pinmux_usbhost_wkup_pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP5_IOPAD(0x05a, PIN_OUTPUT | MUX_MODE0) /* fref_clk1_out, USB hub clk */
|
||||
|
@ -345,6 +368,8 @@ palmas: palmas@48 {
|
|||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
ti,system-power-controller;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&palmas_sys_nirq_pins &palmas_msecure_pins>;
|
||||
|
||||
extcon_usb3: palmas_usb {
|
||||
compatible = "ti,palmas-usb-vid";
|
||||
|
@ -358,6 +383,14 @@ clk32kgaudio: palmas_clk32k@1 {
|
|||
#clock-cells = <0>;
|
||||
};
|
||||
|
||||
rtc {
|
||||
compatible = "ti,palmas-rtc";
|
||||
interrupt-parent = <&palmas>;
|
||||
interrupts = <8 IRQ_TYPE_NONE>;
|
||||
ti,backup-battery-chargeable;
|
||||
ti,backup-battery-charge-high-current;
|
||||
};
|
||||
|
||||
palmas_pmic {
|
||||
compatible = "ti,palmas-pmic";
|
||||
interrupt-parent = <&palmas>;
|
||||
|
|
|
@ -1,7 +1,8 @@
|
|||
/*
|
||||
* Device Tree file for Buffalo Linkstation LS-WTGL
|
||||
*
|
||||
* Copyright (C) 2015, Roger Shimizu <rogershimizu@gmail.com>
|
||||
* Copyright (C) 2015, 2016
|
||||
* Roger Shimizu <rogershimizu@gmail.com>
|
||||
*
|
||||
* This file is dual-licensed: you can use it either under the terms
|
||||
* of the GPL or the X11 license, at your option. Note that this dual
|
||||
|
@ -69,8 +70,6 @@ soc {
|
|||
|
||||
internal-regs {
|
||||
pinctrl: pinctrl@10000 {
|
||||
pinctrl-0 = <&pmx_usb_power &pmx_power_hdd
|
||||
&pmx_fan_low &pmx_fan_high &pmx_fan_lock>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
pmx_led_power: pmx-leds {
|
||||
|
@ -162,6 +161,7 @@ gpio_leds {
|
|||
led@1 {
|
||||
label = "lswtgl:blue:power";
|
||||
gpios = <&gpio0 0 GPIO_ACTIVE_LOW>;
|
||||
default-state = "keep";
|
||||
};
|
||||
|
||||
led@2 {
|
||||
|
@ -188,7 +188,7 @@ gpio_fan {
|
|||
3250 1
|
||||
5000 0>;
|
||||
|
||||
alarm-gpios = <&gpio0 2 GPIO_ACTIVE_HIGH>;
|
||||
alarm-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
restart_poweroff {
|
||||
|
|
|
@ -1342,7 +1342,7 @@ rtc@fc0686b0 {
|
|||
dbgu: serial@fc069000 {
|
||||
compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
|
||||
reg = <0xfc069000 0x200>;
|
||||
interrupts = <2 IRQ_TYPE_LEVEL_HIGH 7>;
|
||||
interrupts = <45 IRQ_TYPE_LEVEL_HIGH 7>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_dbgu>;
|
||||
clocks = <&dbgu_clk>;
|
||||
|
|
|
@ -127,22 +127,14 @@ mmcsd_default_mux {
|
|||
};
|
||||
mmcsd_default_mode: mmcsd_default {
|
||||
mmcsd_default_cfg1 {
|
||||
/* MCCLK */
|
||||
pins = "GPIO8_B10";
|
||||
ste,output = <0>;
|
||||
};
|
||||
mmcsd_default_cfg2 {
|
||||
/* MCCMDDIR, MCDAT0DIR, MCDAT31DIR, MCDATDIR2 */
|
||||
pins = "GPIO10_C11", "GPIO15_A12",
|
||||
"GPIO16_C13", "GPIO23_D15";
|
||||
ste,output = <1>;
|
||||
};
|
||||
mmcsd_default_cfg3 {
|
||||
/* MCCMD, MCDAT3-0, MCMSFBCLK */
|
||||
pins = "GPIO9_A10", "GPIO11_B11",
|
||||
"GPIO12_A11", "GPIO13_C12",
|
||||
"GPIO14_B12", "GPIO24_C15";
|
||||
ste,input = <1>;
|
||||
/*
|
||||
* MCCLK, MCCMDDIR, MCDAT0DIR, MCDAT31DIR, MCDATDIR2
|
||||
* MCCMD, MCDAT3-0, MCMSFBCLK
|
||||
*/
|
||||
pins = "GPIO8_B10", "GPIO9_A10", "GPIO10_C11", "GPIO11_B11",
|
||||
"GPIO12_A11", "GPIO13_C12", "GPIO14_B12", "GPIO15_A12",
|
||||
"GPIO16_C13", "GPIO23_D15", "GPIO24_C15";
|
||||
ste,output = <2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
@ -802,10 +794,21 @@ mmcsd: sdi@101f6000 {
|
|||
clock-names = "mclk", "apb_pclk";
|
||||
interrupt-parent = <&vica>;
|
||||
interrupts = <22>;
|
||||
max-frequency = <48000000>;
|
||||
max-frequency = <400000>;
|
||||
bus-width = <4>;
|
||||
cap-mmc-highspeed;
|
||||
cap-sd-highspeed;
|
||||
full-pwr-cycle;
|
||||
/*
|
||||
* The STw4811 circuit used with the Nomadik strictly
|
||||
* requires that all of these signal direction pins be
|
||||
* routed and used for its 4-bit levelshifter.
|
||||
*/
|
||||
st,sig-dir-dat0;
|
||||
st,sig-dir-dat2;
|
||||
st,sig-dir-dat31;
|
||||
st,sig-dir-cmd;
|
||||
st,sig-pin-fbclk;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mmcsd_default_mux>, <&mmcsd_default_mode>;
|
||||
vmmc-supply = <&vmmc_regulator>;
|
||||
|
|
|
@ -16,7 +16,7 @@
|
|||
*/
|
||||
#include <linux/module.h>
|
||||
#include <linux/kernel.h>
|
||||
|
||||
#include <asm/div64.h>
|
||||
#include <asm/hardware/icst.h>
|
||||
|
||||
/*
|
||||
|
@ -29,7 +29,11 @@ EXPORT_SYMBOL(icst525_s2div);
|
|||
|
||||
unsigned long icst_hz(const struct icst_params *p, struct icst_vco vco)
|
||||
{
|
||||
return p->ref * 2 * (vco.v + 8) / ((vco.r + 2) * p->s2div[vco.s]);
|
||||
u64 dividend = p->ref * 2 * (u64)(vco.v + 8);
|
||||
u32 divisor = (vco.r + 2) * p->s2div[vco.s];
|
||||
|
||||
do_div(dividend, divisor);
|
||||
return (unsigned long)dividend;
|
||||
}
|
||||
|
||||
EXPORT_SYMBOL(icst_hz);
|
||||
|
@ -58,6 +62,7 @@ icst_hz_to_vco(const struct icst_params *p, unsigned long freq)
|
|||
|
||||
if (f > p->vco_min && f <= p->vco_max)
|
||||
break;
|
||||
i++;
|
||||
} while (i < 8);
|
||||
|
||||
if (i >= 8)
|
||||
|
|
|
@ -426,6 +426,7 @@ CONFIG_SUNXI_WATCHDOG=y
|
|||
CONFIG_IMX2_WDT=y
|
||||
CONFIG_TEGRA_WATCHDOG=m
|
||||
CONFIG_MESON_WATCHDOG=y
|
||||
CONFIG_DW_WATCHDOG=y
|
||||
CONFIG_DIGICOLOR_WATCHDOG=y
|
||||
CONFIG_MFD_AS3711=y
|
||||
CONFIG_MFD_AS3722=y
|
||||
|
|
|
@ -50,6 +50,7 @@ CONFIG_SOC_AM33XX=y
|
|||
CONFIG_SOC_AM43XX=y
|
||||
CONFIG_SOC_DRA7XX=y
|
||||
CONFIG_ARM_THUMBEE=y
|
||||
CONFIG_ARM_KERNMEM_PERMS=y
|
||||
CONFIG_ARM_ERRATA_411920=y
|
||||
CONFIG_ARM_ERRATA_430973=y
|
||||
CONFIG_SMP=y
|
||||
|
@ -177,6 +178,7 @@ CONFIG_TI_CPTS=y
|
|||
CONFIG_AT803X_PHY=y
|
||||
CONFIG_SMSC_PHY=y
|
||||
CONFIG_USB_USBNET=m
|
||||
CONFIG_USB_NET_SMSC75XX=m
|
||||
CONFIG_USB_NET_SMSC95XX=m
|
||||
CONFIG_USB_ALI_M5632=y
|
||||
CONFIG_USB_AN2720=y
|
||||
|
@ -290,24 +292,23 @@ CONFIG_FB=y
|
|||
CONFIG_FIRMWARE_EDID=y
|
||||
CONFIG_FB_MODE_HELPERS=y
|
||||
CONFIG_FB_TILEBLITTING=y
|
||||
CONFIG_OMAP2_DSS=m
|
||||
CONFIG_OMAP5_DSS_HDMI=y
|
||||
CONFIG_OMAP2_DSS_SDI=y
|
||||
CONFIG_OMAP2_DSS_DSI=y
|
||||
CONFIG_FB_OMAP5_DSS_HDMI=y
|
||||
CONFIG_FB_OMAP2_DSS_SDI=y
|
||||
CONFIG_FB_OMAP2_DSS_DSI=y
|
||||
CONFIG_FB_OMAP2=m
|
||||
CONFIG_DISPLAY_ENCODER_TFP410=m
|
||||
CONFIG_DISPLAY_ENCODER_TPD12S015=m
|
||||
CONFIG_DISPLAY_CONNECTOR_DVI=m
|
||||
CONFIG_DISPLAY_CONNECTOR_HDMI=m
|
||||
CONFIG_DISPLAY_CONNECTOR_ANALOG_TV=m
|
||||
CONFIG_DISPLAY_PANEL_DPI=m
|
||||
CONFIG_DISPLAY_PANEL_DSI_CM=m
|
||||
CONFIG_DISPLAY_PANEL_SONY_ACX565AKM=m
|
||||
CONFIG_DISPLAY_PANEL_LGPHILIPS_LB035Q02=m
|
||||
CONFIG_DISPLAY_PANEL_SHARP_LS037V7DW01=m
|
||||
CONFIG_DISPLAY_PANEL_TPO_TD028TTEC1=m
|
||||
CONFIG_DISPLAY_PANEL_TPO_TD043MTEA1=m
|
||||
CONFIG_DISPLAY_PANEL_NEC_NL8048HL11=m
|
||||
CONFIG_FB_OMAP2_ENCODER_TFP410=m
|
||||
CONFIG_FB_OMAP2_ENCODER_TPD12S015=m
|
||||
CONFIG_FB_OMAP2_CONNECTOR_DVI=m
|
||||
CONFIG_FB_OMAP2_CONNECTOR_HDMI=m
|
||||
CONFIG_FB_OMAP2_CONNECTOR_ANALOG_TV=m
|
||||
CONFIG_FB_OMAP2_PANEL_DPI=m
|
||||
CONFIG_FB_OMAP2_PANEL_DSI_CM=m
|
||||
CONFIG_FB_OMAP2_PANEL_SONY_ACX565AKM=m
|
||||
CONFIG_FB_OMAP2_PANEL_LGPHILIPS_LB035Q02=m
|
||||
CONFIG_FB_OMAP2_PANEL_SHARP_LS037V7DW01=m
|
||||
CONFIG_FB_OMAP2_PANEL_TPO_TD028TTEC1=m
|
||||
CONFIG_FB_OMAP2_PANEL_TPO_TD043MTEA1=m
|
||||
CONFIG_FB_OMAP2_PANEL_NEC_NL8048HL11=m
|
||||
CONFIG_BACKLIGHT_LCD_SUPPORT=y
|
||||
CONFIG_LCD_CLASS_DEVICE=y
|
||||
CONFIG_LCD_PLATFORM=y
|
||||
|
@ -354,6 +355,11 @@ CONFIG_USB_MUSB_DSPS=m
|
|||
CONFIG_USB_INVENTRA_DMA=y
|
||||
CONFIG_USB_TI_CPPI41_DMA=y
|
||||
CONFIG_USB_DWC3=m
|
||||
CONFIG_USB_SERIAL=m
|
||||
CONFIG_USB_SERIAL_GENERIC=y
|
||||
CONFIG_USB_SERIAL_SIMPLE=m
|
||||
CONFIG_USB_SERIAL_FTDI_SIO=m
|
||||
CONFIG_USB_SERIAL_PL2303=m
|
||||
CONFIG_USB_TEST=m
|
||||
CONFIG_AM335X_PHY_USB=y
|
||||
CONFIG_USB_GADGET=m
|
||||
|
@ -387,6 +393,7 @@ CONFIG_NEW_LEDS=y
|
|||
CONFIG_LEDS_CLASS=m
|
||||
CONFIG_LEDS_GPIO=m
|
||||
CONFIG_LEDS_PWM=m
|
||||
CONFIG_LEDS_PCA963X=m
|
||||
CONFIG_LEDS_TRIGGERS=y
|
||||
CONFIG_LEDS_TRIGGER_TIMER=m
|
||||
CONFIG_LEDS_TRIGGER_ONESHOT=m
|
||||
|
@ -449,6 +456,8 @@ CONFIG_NLS_CODEPAGE_437=y
|
|||
CONFIG_NLS_ISO8859_1=y
|
||||
CONFIG_PRINTK_TIME=y
|
||||
CONFIG_DEBUG_INFO=y
|
||||
CONFIG_DEBUG_INFO_SPLIT=y
|
||||
CONFIG_DEBUG_INFO_DWARF4=y
|
||||
CONFIG_MAGIC_SYSRQ=y
|
||||
CONFIG_SCHEDSTATS=y
|
||||
CONFIG_TIMER_STATS=y
|
||||
|
|
|
@ -417,6 +417,7 @@
|
|||
#define __NR_userfaultfd (__NR_SYSCALL_BASE+388)
|
||||
#define __NR_membarrier (__NR_SYSCALL_BASE+389)
|
||||
#define __NR_mlock2 (__NR_SYSCALL_BASE+390)
|
||||
#define __NR_copy_file_range (__NR_SYSCALL_BASE+391)
|
||||
|
||||
/*
|
||||
* The following SWIs are ARM private.
|
||||
|
|
|
@ -400,6 +400,7 @@
|
|||
CALL(sys_userfaultfd)
|
||||
CALL(sys_membarrier)
|
||||
CALL(sys_mlock2)
|
||||
CALL(sys_copy_file_range)
|
||||
#ifndef syscalls_counted
|
||||
.equ syscalls_padding, ((NR_syscalls + 3) & ~3) - NR_syscalls
|
||||
#define syscalls_counted
|
||||
|
|
|
@ -18,7 +18,6 @@
|
|||
#include <linux/slab.h>
|
||||
#include <linux/of.h>
|
||||
#include <linux/pinctrl/machine.h>
|
||||
#include <linux/platform_data/mailbox-omap.h>
|
||||
|
||||
#include <asm/mach-types.h>
|
||||
#include <asm/mach/map.h>
|
||||
|
@ -66,32 +65,6 @@ static int __init omap3_l3_init(void)
|
|||
}
|
||||
omap_postcore_initcall(omap3_l3_init);
|
||||
|
||||
#if defined(CONFIG_OMAP2PLUS_MBOX) || defined(CONFIG_OMAP2PLUS_MBOX_MODULE)
|
||||
static inline void __init omap_init_mbox(void)
|
||||
{
|
||||
struct omap_hwmod *oh;
|
||||
struct platform_device *pdev;
|
||||
struct omap_mbox_pdata *pdata;
|
||||
|
||||
oh = omap_hwmod_lookup("mailbox");
|
||||
if (!oh) {
|
||||
pr_err("%s: unable to find hwmod\n", __func__);
|
||||
return;
|
||||
}
|
||||
if (!oh->dev_attr) {
|
||||
pr_err("%s: hwmod doesn't have valid attrs\n", __func__);
|
||||
return;
|
||||
}
|
||||
|
||||
pdata = (struct omap_mbox_pdata *)oh->dev_attr;
|
||||
pdev = omap_device_build("omap-mailbox", -1, oh, pdata, sizeof(*pdata));
|
||||
WARN(IS_ERR(pdev), "%s: could not build device, err %ld\n",
|
||||
__func__, PTR_ERR(pdev));
|
||||
}
|
||||
#else
|
||||
static inline void omap_init_mbox(void) { }
|
||||
#endif /* CONFIG_OMAP2PLUS_MBOX */
|
||||
|
||||
static inline void omap_init_sti(void) {}
|
||||
|
||||
#if defined(CONFIG_SPI_OMAP24XX) || defined(CONFIG_SPI_OMAP24XX_MODULE)
|
||||
|
@ -229,7 +202,6 @@ static int __init omap2_init_devices(void)
|
|||
* please keep these calls, and their implementations above,
|
||||
* in alphabetical order so they're easier to sort through.
|
||||
*/
|
||||
omap_init_mbox();
|
||||
omap_init_mcspi();
|
||||
omap_init_sham();
|
||||
omap_init_aes();
|
||||
|
|
|
@ -23,6 +23,8 @@
|
|||
#include <linux/platform_data/pinctrl-single.h>
|
||||
#include <linux/platform_data/iommu-omap.h>
|
||||
#include <linux/platform_data/wkup_m3.h>
|
||||
#include <linux/platform_data/pwm_omap_dmtimer.h>
|
||||
#include <plat/dmtimer.h>
|
||||
|
||||
#include "common.h"
|
||||
#include "common-board-devices.h"
|
||||
|
@ -449,6 +451,24 @@ void omap_auxdata_legacy_init(struct device *dev)
|
|||
dev->platform_data = &twl_gpio_auxdata;
|
||||
}
|
||||
|
||||
/* Dual mode timer PWM callbacks platdata */
|
||||
#if IS_ENABLED(CONFIG_OMAP_DM_TIMER)
|
||||
struct pwm_omap_dmtimer_pdata pwm_dmtimer_pdata = {
|
||||
.request_by_node = omap_dm_timer_request_by_node,
|
||||
.free = omap_dm_timer_free,
|
||||
.enable = omap_dm_timer_enable,
|
||||
.disable = omap_dm_timer_disable,
|
||||
.get_fclk = omap_dm_timer_get_fclk,
|
||||
.start = omap_dm_timer_start,
|
||||
.stop = omap_dm_timer_stop,
|
||||
.set_load = omap_dm_timer_set_load,
|
||||
.set_match = omap_dm_timer_set_match,
|
||||
.set_pwm = omap_dm_timer_set_pwm,
|
||||
.set_prescaler = omap_dm_timer_set_prescaler,
|
||||
.write_counter = omap_dm_timer_write_counter,
|
||||
};
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Few boards still need auxdata populated before we populate
|
||||
* the dev entries in of_platform_populate().
|
||||
|
@ -502,6 +522,9 @@ static struct of_dev_auxdata omap_auxdata_lookup[] __initdata = {
|
|||
OF_DEV_AUXDATA("ti,am4372-wkup-m3", 0x44d00000, "44d00000.wkup_m3",
|
||||
&wkup_m3_data),
|
||||
#endif
|
||||
#if IS_ENABLED(CONFIG_OMAP_DM_TIMER)
|
||||
OF_DEV_AUXDATA("ti,omap-dmtimer-pwm", 0, NULL, &pwm_dmtimer_pdata),
|
||||
#endif
|
||||
#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5)
|
||||
OF_DEV_AUXDATA("ti,omap4-iommu", 0x4a066000, "4a066000.mmu",
|
||||
&omap4_iommu_pdata),
|
||||
|
|
|
@ -86,13 +86,18 @@ ENTRY(enable_omap3630_toggle_l2_on_restore)
|
|||
stmfd sp!, {lr} @ save registers on stack
|
||||
/* Setup so that we will disable and enable l2 */
|
||||
mov r1, #0x1
|
||||
adrl r2, l2dis_3630 @ may be too distant for plain adr
|
||||
str r1, [r2]
|
||||
adrl r3, l2dis_3630_offset @ may be too distant for plain adr
|
||||
ldr r2, [r3] @ value for offset
|
||||
str r1, [r2, r3] @ write to l2dis_3630
|
||||
ldmfd sp!, {pc} @ restore regs and return
|
||||
ENDPROC(enable_omap3630_toggle_l2_on_restore)
|
||||
|
||||
.text
|
||||
/* Function to call rom code to save secure ram context */
|
||||
/*
|
||||
* Function to call rom code to save secure ram context. This gets
|
||||
* relocated to SRAM, so it can be all in .data section. Otherwise
|
||||
* we need to initialize api_params separately.
|
||||
*/
|
||||
.data
|
||||
.align 3
|
||||
ENTRY(save_secure_ram_context)
|
||||
stmfd sp!, {r4 - r11, lr} @ save registers on stack
|
||||
|
@ -126,6 +131,8 @@ ENDPROC(save_secure_ram_context)
|
|||
ENTRY(save_secure_ram_context_sz)
|
||||
.word . - save_secure_ram_context
|
||||
|
||||
.text
|
||||
|
||||
/*
|
||||
* ======================
|
||||
* == Idle entry point ==
|
||||
|
@ -289,12 +296,6 @@ wait_sdrc_ready:
|
|||
bic r5, r5, #0x40
|
||||
str r5, [r4]
|
||||
|
||||
/*
|
||||
* PC-relative stores lead to undefined behaviour in Thumb-2: use a r7 as a
|
||||
* base instead.
|
||||
* Be careful not to clobber r7 when maintaing this code.
|
||||
*/
|
||||
|
||||
is_dll_in_lock_mode:
|
||||
/* Is dll in lock mode? */
|
||||
ldr r4, sdrc_dlla_ctrl
|
||||
|
@ -302,11 +303,7 @@ is_dll_in_lock_mode:
|
|||
tst r5, #0x4
|
||||
bne exit_nonoff_modes @ Return if locked
|
||||
/* wait till dll locks */
|
||||
adr r7, kick_counter
|
||||
wait_dll_lock_timed:
|
||||
ldr r4, wait_dll_lock_counter
|
||||
add r4, r4, #1
|
||||
str r4, [r7, #wait_dll_lock_counter - kick_counter]
|
||||
ldr r4, sdrc_dlla_status
|
||||
/* Wait 20uS for lock */
|
||||
mov r6, #8
|
||||
|
@ -330,9 +327,6 @@ kick_dll:
|
|||
orr r6, r6, #(1<<3) @ enable dll
|
||||
str r6, [r4]
|
||||
dsb
|
||||
ldr r4, kick_counter
|
||||
add r4, r4, #1
|
||||
str r4, [r7] @ kick_counter
|
||||
b wait_dll_lock_timed
|
||||
|
||||
exit_nonoff_modes:
|
||||
|
@ -360,15 +354,6 @@ sdrc_dlla_status:
|
|||
.word SDRC_DLLA_STATUS_V
|
||||
sdrc_dlla_ctrl:
|
||||
.word SDRC_DLLA_CTRL_V
|
||||
/*
|
||||
* When exporting to userspace while the counters are in SRAM,
|
||||
* these 2 words need to be at the end to facilitate retrival!
|
||||
*/
|
||||
kick_counter:
|
||||
.word 0
|
||||
wait_dll_lock_counter:
|
||||
.word 0
|
||||
|
||||
ENTRY(omap3_do_wfi_sz)
|
||||
.word . - omap3_do_wfi
|
||||
|
||||
|
@ -437,7 +422,9 @@ ENTRY(omap3_restore)
|
|||
cmp r2, #0x0 @ Check if target power state was OFF or RET
|
||||
bne logic_l1_restore
|
||||
|
||||
ldr r0, l2dis_3630
|
||||
adr r1, l2dis_3630_offset @ address for offset
|
||||
ldr r0, [r1] @ value for offset
|
||||
ldr r0, [r1, r0] @ value at l2dis_3630
|
||||
cmp r0, #0x1 @ should we disable L2 on 3630?
|
||||
bne skipl2dis
|
||||
mrc p15, 0, r0, c1, c0, 1
|
||||
|
@ -449,12 +436,14 @@ skipl2dis:
|
|||
and r1, #0x700
|
||||
cmp r1, #0x300
|
||||
beq l2_inv_gp
|
||||
adr r0, l2_inv_api_params_offset
|
||||
ldr r3, [r0]
|
||||
add r3, r3, r0 @ r3 points to dummy parameters
|
||||
mov r0, #40 @ set service ID for PPA
|
||||
mov r12, r0 @ copy secure Service ID in r12
|
||||
mov r1, #0 @ set task id for ROM code in r1
|
||||
mov r2, #4 @ set some flags in r2, r6
|
||||
mov r6, #0xff
|
||||
adr r3, l2_inv_api_params @ r3 points to dummy parameters
|
||||
dsb @ data write barrier
|
||||
dmb @ data memory barrier
|
||||
smc #1 @ call SMI monitor (smi #1)
|
||||
|
@ -488,8 +477,8 @@ skipl2dis:
|
|||
b logic_l1_restore
|
||||
|
||||
.align
|
||||
l2_inv_api_params:
|
||||
.word 0x1, 0x00
|
||||
l2_inv_api_params_offset:
|
||||
.long l2_inv_api_params - .
|
||||
l2_inv_gp:
|
||||
/* Execute smi to invalidate L2 cache */
|
||||
mov r12, #0x1 @ set up to invalidate L2
|
||||
|
@ -506,7 +495,9 @@ l2_inv_gp:
|
|||
mov r12, #0x2
|
||||
smc #0 @ Call SMI monitor (smieq)
|
||||
logic_l1_restore:
|
||||
ldr r1, l2dis_3630
|
||||
adr r0, l2dis_3630_offset @ adress for offset
|
||||
ldr r1, [r0] @ value for offset
|
||||
ldr r1, [r0, r1] @ value at l2dis_3630
|
||||
cmp r1, #0x1 @ Test if L2 re-enable needed on 3630
|
||||
bne skipl2reen
|
||||
mrc p15, 0, r1, c1, c0, 1
|
||||
|
@ -535,9 +526,17 @@ control_stat:
|
|||
.word CONTROL_STAT
|
||||
control_mem_rta:
|
||||
.word CONTROL_MEM_RTA_CTRL
|
||||
l2dis_3630_offset:
|
||||
.long l2dis_3630 - .
|
||||
|
||||
.data
|
||||
l2dis_3630:
|
||||
.word 0
|
||||
|
||||
.data
|
||||
l2_inv_api_params:
|
||||
.word 0x1, 0x00
|
||||
|
||||
/*
|
||||
* Internal functions
|
||||
*/
|
||||
|
|
|
@ -29,12 +29,6 @@
|
|||
dsb
|
||||
.endm
|
||||
|
||||
ppa_zero_params:
|
||||
.word 0x0
|
||||
|
||||
ppa_por_params:
|
||||
.word 1, 0
|
||||
|
||||
#ifdef CONFIG_ARCH_OMAP4
|
||||
|
||||
/*
|
||||
|
@ -266,7 +260,9 @@ ENTRY(omap4_cpu_resume)
|
|||
beq skip_ns_smp_enable
|
||||
ppa_actrl_retry:
|
||||
mov r0, #OMAP4_PPA_CPU_ACTRL_SMP_INDEX
|
||||
adr r3, ppa_zero_params @ Pointer to parameters
|
||||
adr r1, ppa_zero_params_offset
|
||||
ldr r3, [r1]
|
||||
add r3, r3, r1 @ Pointer to ppa_zero_params
|
||||
mov r1, #0x0 @ Process ID
|
||||
mov r2, #0x4 @ Flag
|
||||
mov r6, #0xff
|
||||
|
@ -303,7 +299,9 @@ skip_ns_smp_enable:
|
|||
ldr r0, =OMAP4_PPA_L2_POR_INDEX
|
||||
ldr r1, =OMAP44XX_SAR_RAM_BASE
|
||||
ldr r4, [r1, #L2X0_PREFETCH_CTRL_OFFSET]
|
||||
adr r3, ppa_por_params
|
||||
adr r1, ppa_por_params_offset
|
||||
ldr r3, [r1]
|
||||
add r3, r3, r1 @ Pointer to ppa_por_params
|
||||
str r4, [r3, #0x04]
|
||||
mov r1, #0x0 @ Process ID
|
||||
mov r2, #0x4 @ Flag
|
||||
|
@ -328,6 +326,8 @@ skip_l2en:
|
|||
#endif
|
||||
|
||||
b cpu_resume @ Jump to generic resume
|
||||
ppa_por_params_offset:
|
||||
.long ppa_por_params - .
|
||||
ENDPROC(omap4_cpu_resume)
|
||||
#endif /* CONFIG_ARCH_OMAP4 */
|
||||
|
||||
|
@ -380,4 +380,13 @@ ENTRY(omap_do_wfi)
|
|||
nop
|
||||
|
||||
ldmfd sp!, {pc}
|
||||
ppa_zero_params_offset:
|
||||
.long ppa_zero_params - .
|
||||
ENDPROC(omap_do_wfi)
|
||||
|
||||
.data
|
||||
ppa_zero_params:
|
||||
.word 0
|
||||
|
||||
ppa_por_params:
|
||||
.word 1, 0
|
||||
|
|
|
@ -1,5 +1,6 @@
|
|||
menuconfig ARCH_REALVIEW
|
||||
bool "ARM Ltd. RealView family" if ARCH_MULTI_V5 || ARCH_MULTI_V6 || ARCH_MULTI_V7
|
||||
bool "ARM Ltd. RealView family"
|
||||
depends on ARCH_MULTI_V5 || ARCH_MULTI_V6 || ARCH_MULTI_V7
|
||||
select ARM_AMBA
|
||||
select ARM_TIMER_SP804
|
||||
select COMMON_CLK_VERSATILE
|
||||
|
|
|
@ -80,7 +80,7 @@ static void __init realview_smp_prepare_cpus(unsigned int max_cpus)
|
|||
virt_to_phys(versatile_secondary_startup));
|
||||
}
|
||||
|
||||
struct smp_operations realview_dt_smp_ops __initdata = {
|
||||
static const struct smp_operations realview_dt_smp_ops __initconst = {
|
||||
.smp_prepare_cpus = realview_smp_prepare_cpus,
|
||||
.smp_secondary_init = versatile_secondary_init,
|
||||
.smp_boot_secondary = versatile_boot_secondary,
|
||||
|
|
|
@ -1,5 +1,6 @@
|
|||
config ARCH_TANGO
|
||||
bool "Sigma Designs Tango4 (SMP87xx)" if ARCH_MULTI_V7
|
||||
bool "Sigma Designs Tango4 (SMP87xx)"
|
||||
depends on ARCH_MULTI_V7
|
||||
# Cortex-A9 MPCore r3p0, PL310 r3p2
|
||||
select ARCH_HAS_HOLES_MEMORYMODEL
|
||||
select ARM_ERRATA_754322
|
||||
|
|
|
@ -9,7 +9,7 @@ static int tango_boot_secondary(unsigned int cpu, struct task_struct *idle)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static struct smp_operations tango_smp_ops __initdata = {
|
||||
static const struct smp_operations tango_smp_ops __initconst = {
|
||||
.smp_boot_secondary = tango_boot_secondary,
|
||||
};
|
||||
|
||||
|
|
|
@ -27,6 +27,8 @@ $(warning LSE atomics not supported by binutils)
|
|||
endif
|
||||
|
||||
KBUILD_CFLAGS += -mgeneral-regs-only $(lseinstr)
|
||||
KBUILD_CFLAGS += -fno-asynchronous-unwind-tables
|
||||
KBUILD_CFLAGS += $(call cc-option, -mpc-relative-literal-loads)
|
||||
KBUILD_AFLAGS += $(lseinstr)
|
||||
|
||||
ifeq ($(CONFIG_CPU_BIG_ENDIAN), y)
|
||||
|
|
|
@ -115,6 +115,7 @@ dma@7ff00000 {
|
|||
<GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
|
||||
|
|
|
@ -23,9 +23,8 @@ soc0_phy1: ethernet-phy@1 {
|
|||
};
|
||||
};
|
||||
|
||||
dsa: dsa@c7000000 {
|
||||
dsaf0: dsa@c7000000 {
|
||||
compatible = "hisilicon,hns-dsaf-v1";
|
||||
dsa_name = "dsaf0";
|
||||
mode = "6port-16rss";
|
||||
interrupt-parent = <&mbigen_dsa>;
|
||||
|
||||
|
@ -127,7 +126,7 @@ dsa: dsa@c7000000 {
|
|||
|
||||
eth0: ethernet@0{
|
||||
compatible = "hisilicon,hns-nic-v1";
|
||||
ae-name = "dsaf0";
|
||||
ae-handle = <&dsaf0>;
|
||||
port-id = <0>;
|
||||
local-mac-address = [00 00 00 01 00 58];
|
||||
status = "disabled";
|
||||
|
@ -135,14 +134,14 @@ eth0: ethernet@0{
|
|||
};
|
||||
eth1: ethernet@1{
|
||||
compatible = "hisilicon,hns-nic-v1";
|
||||
ae-name = "dsaf0";
|
||||
ae-handle = <&dsaf0>;
|
||||
port-id = <1>;
|
||||
status = "disabled";
|
||||
dma-coherent;
|
||||
};
|
||||
eth2: ethernet@2{
|
||||
compatible = "hisilicon,hns-nic-v1";
|
||||
ae-name = "dsaf0";
|
||||
ae-handle = <&dsaf0>;
|
||||
port-id = <2>;
|
||||
local-mac-address = [00 00 00 01 00 5a];
|
||||
status = "disabled";
|
||||
|
@ -150,7 +149,7 @@ eth2: ethernet@2{
|
|||
};
|
||||
eth3: ethernet@3{
|
||||
compatible = "hisilicon,hns-nic-v1";
|
||||
ae-name = "dsaf0";
|
||||
ae-handle = <&dsaf0>;
|
||||
port-id = <3>;
|
||||
local-mac-address = [00 00 00 01 00 5b];
|
||||
status = "disabled";
|
||||
|
@ -158,7 +157,7 @@ eth3: ethernet@3{
|
|||
};
|
||||
eth4: ethernet@4{
|
||||
compatible = "hisilicon,hns-nic-v1";
|
||||
ae-name = "dsaf0";
|
||||
ae-handle = <&dsaf0>;
|
||||
port-id = <4>;
|
||||
local-mac-address = [00 00 00 01 00 5c];
|
||||
status = "disabled";
|
||||
|
@ -166,7 +165,7 @@ eth4: ethernet@4{
|
|||
};
|
||||
eth5: ethernet@5{
|
||||
compatible = "hisilicon,hns-nic-v1";
|
||||
ae-name = "dsaf0";
|
||||
ae-handle = <&dsaf0>;
|
||||
port-id = <5>;
|
||||
local-mac-address = [00 00 00 01 00 5d];
|
||||
status = "disabled";
|
||||
|
@ -174,7 +173,7 @@ eth5: ethernet@5{
|
|||
};
|
||||
eth6: ethernet@6{
|
||||
compatible = "hisilicon,hns-nic-v1";
|
||||
ae-name = "dsaf0";
|
||||
ae-handle = <&dsaf0>;
|
||||
port-id = <6>;
|
||||
local-mac-address = [00 00 00 01 00 5e];
|
||||
status = "disabled";
|
||||
|
@ -182,7 +181,7 @@ eth6: ethernet@6{
|
|||
};
|
||||
eth7: ethernet@7{
|
||||
compatible = "hisilicon,hns-nic-v1";
|
||||
ae-name = "dsaf0";
|
||||
ae-handle = <&dsaf0>;
|
||||
port-id = <7>;
|
||||
local-mac-address = [00 00 00 01 00 5f];
|
||||
status = "disabled";
|
||||
|
|
|
@ -12,6 +12,8 @@ aliases {
|
|||
rtc1 = "/rtc@0,7000e000";
|
||||
};
|
||||
|
||||
chosen { };
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x0 0x80000000 0x0 0x80000000>;
|
||||
|
|
|
@ -16,7 +16,6 @@ CONFIG_IKCONFIG_PROC=y
|
|||
CONFIG_LOG_BUF_SHIFT=14
|
||||
CONFIG_MEMCG=y
|
||||
CONFIG_MEMCG_SWAP=y
|
||||
CONFIG_MEMCG_KMEM=y
|
||||
CONFIG_CGROUP_HUGETLB=y
|
||||
# CONFIG_UTS_NS is not set
|
||||
# CONFIG_IPC_NS is not set
|
||||
|
@ -37,15 +36,13 @@ CONFIG_ARCH_EXYNOS7=y
|
|||
CONFIG_ARCH_LAYERSCAPE=y
|
||||
CONFIG_ARCH_HISI=y
|
||||
CONFIG_ARCH_MEDIATEK=y
|
||||
CONFIG_ARCH_QCOM=y
|
||||
CONFIG_ARCH_ROCKCHIP=y
|
||||
CONFIG_ARCH_SEATTLE=y
|
||||
CONFIG_ARCH_RENESAS=y
|
||||
CONFIG_ARCH_R8A7795=y
|
||||
CONFIG_ARCH_STRATIX10=y
|
||||
CONFIG_ARCH_TEGRA=y
|
||||
CONFIG_ARCH_TEGRA_132_SOC=y
|
||||
CONFIG_ARCH_TEGRA_210_SOC=y
|
||||
CONFIG_ARCH_QCOM=y
|
||||
CONFIG_ARCH_SPRD=y
|
||||
CONFIG_ARCH_THUNDER=y
|
||||
CONFIG_ARCH_UNIPHIER=y
|
||||
|
@ -54,14 +51,19 @@ CONFIG_ARCH_XGENE=y
|
|||
CONFIG_ARCH_ZYNQMP=y
|
||||
CONFIG_PCI=y
|
||||
CONFIG_PCI_MSI=y
|
||||
CONFIG_PCI_IOV=y
|
||||
CONFIG_PCI_RCAR_GEN2_PCIE=y
|
||||
CONFIG_PCI_HOST_GENERIC=y
|
||||
CONFIG_PCI_XGENE=y
|
||||
CONFIG_SMP=y
|
||||
CONFIG_PCI_LAYERSCAPE=y
|
||||
CONFIG_PCI_HISI=y
|
||||
CONFIG_PCIE_QCOM=y
|
||||
CONFIG_SCHED_MC=y
|
||||
CONFIG_PREEMPT=y
|
||||
CONFIG_KSM=y
|
||||
CONFIG_TRANSPARENT_HUGEPAGE=y
|
||||
CONFIG_CMA=y
|
||||
CONFIG_XEN=y
|
||||
CONFIG_CMDLINE="console=ttyAMA0"
|
||||
# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
|
||||
CONFIG_COMPAT=y
|
||||
|
@ -100,7 +102,11 @@ CONFIG_PATA_OF_PLATFORM=y
|
|||
CONFIG_NETDEVICES=y
|
||||
CONFIG_TUN=y
|
||||
CONFIG_VIRTIO_NET=y
|
||||
CONFIG_AMD_XGBE=y
|
||||
CONFIG_NET_XGENE=y
|
||||
CONFIG_E1000E=y
|
||||
CONFIG_IGB=y
|
||||
CONFIG_IGBVF=y
|
||||
CONFIG_SKY2=y
|
||||
CONFIG_RAVB=y
|
||||
CONFIG_SMC91X=y
|
||||
|
@ -117,25 +123,23 @@ CONFIG_SERIAL_8250_CONSOLE=y
|
|||
CONFIG_SERIAL_8250_DW=y
|
||||
CONFIG_SERIAL_8250_MT6577=y
|
||||
CONFIG_SERIAL_8250_UNIPHIER=y
|
||||
CONFIG_SERIAL_OF_PLATFORM=y
|
||||
CONFIG_SERIAL_AMBA_PL011=y
|
||||
CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
|
||||
CONFIG_SERIAL_SAMSUNG=y
|
||||
CONFIG_SERIAL_SAMSUNG_UARTS_4=y
|
||||
CONFIG_SERIAL_SAMSUNG_UARTS=4
|
||||
CONFIG_SERIAL_SAMSUNG_CONSOLE=y
|
||||
CONFIG_SERIAL_TEGRA=y
|
||||
CONFIG_SERIAL_SH_SCI=y
|
||||
CONFIG_SERIAL_SH_SCI_NR_UARTS=11
|
||||
CONFIG_SERIAL_SH_SCI_CONSOLE=y
|
||||
CONFIG_SERIAL_TEGRA=y
|
||||
CONFIG_SERIAL_MSM=y
|
||||
CONFIG_SERIAL_MSM_CONSOLE=y
|
||||
CONFIG_SERIAL_OF_PLATFORM=y
|
||||
CONFIG_SERIAL_XILINX_PS_UART=y
|
||||
CONFIG_SERIAL_XILINX_PS_UART_CONSOLE=y
|
||||
CONFIG_VIRTIO_CONSOLE=y
|
||||
# CONFIG_HW_RANDOM is not set
|
||||
CONFIG_I2C=y
|
||||
CONFIG_I2C_QUP=y
|
||||
CONFIG_I2C_UNIPHIER_F=y
|
||||
CONFIG_I2C_RCAR=y
|
||||
CONFIG_SPI=y
|
||||
CONFIG_SPI_PL022=y
|
||||
|
@ -176,8 +180,6 @@ CONFIG_MMC_SDHCI_PLTFM=y
|
|||
CONFIG_MMC_SDHCI_TEGRA=y
|
||||
CONFIG_MMC_SPI=y
|
||||
CONFIG_MMC_DW=y
|
||||
CONFIG_MMC_DW_IDMAC=y
|
||||
CONFIG_MMC_DW_PLTFM=y
|
||||
CONFIG_MMC_DW_EXYNOS=y
|
||||
CONFIG_NEW_LEDS=y
|
||||
CONFIG_LEDS_CLASS=y
|
||||
|
@ -187,28 +189,33 @@ CONFIG_LEDS_TRIGGER_HEARTBEAT=y
|
|||
CONFIG_LEDS_TRIGGER_CPU=y
|
||||
CONFIG_RTC_CLASS=y
|
||||
CONFIG_RTC_DRV_EFI=y
|
||||
CONFIG_RTC_DRV_PL031=y
|
||||
CONFIG_RTC_DRV_XGENE=y
|
||||
CONFIG_DMADEVICES=y
|
||||
CONFIG_RCAR_DMAC=y
|
||||
CONFIG_QCOM_BAM_DMA=y
|
||||
CONFIG_TEGRA20_APB_DMA=y
|
||||
CONFIG_RCAR_DMAC=y
|
||||
CONFIG_VFIO=y
|
||||
CONFIG_VFIO_PCI=y
|
||||
CONFIG_VIRTIO_PCI=y
|
||||
CONFIG_VIRTIO_BALLOON=y
|
||||
CONFIG_VIRTIO_MMIO=y
|
||||
CONFIG_XEN_GNTDEV=y
|
||||
CONFIG_XEN_GRANT_DEV_ALLOC=y
|
||||
CONFIG_COMMON_CLK_CS2000_CP=y
|
||||
CONFIG_COMMON_CLK_QCOM=y
|
||||
CONFIG_MSM_GCC_8916=y
|
||||
CONFIG_HWSPINLOCK_QCOM=y
|
||||
# CONFIG_IOMMU_SUPPORT is not set
|
||||
CONFIG_ARM_SMMU=y
|
||||
CONFIG_QCOM_SMEM=y
|
||||
CONFIG_QCOM_SMD=y
|
||||
CONFIG_QCOM_SMD_RPM=y
|
||||
CONFIG_ARCH_TEGRA_132_SOC=y
|
||||
CONFIG_ARCH_TEGRA_210_SOC=y
|
||||
CONFIG_HISILICON_IRQ_MBIGEN=y
|
||||
CONFIG_PHY_XGENE=y
|
||||
CONFIG_EXT2_FS=y
|
||||
CONFIG_EXT3_FS=y
|
||||
# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
|
||||
# CONFIG_EXT3_FS_XATTR is not set
|
||||
CONFIG_EXT4_FS=y
|
||||
CONFIG_FANOTIFY=y
|
||||
CONFIG_FANOTIFY_ACCESS_PERMISSIONS=y
|
||||
CONFIG_QUOTA=y
|
||||
|
@ -239,6 +246,7 @@ CONFIG_LOCKUP_DETECTOR=y
|
|||
# CONFIG_FTRACE is not set
|
||||
CONFIG_MEMTEST=y
|
||||
CONFIG_SECURITY=y
|
||||
CONFIG_CRYPTO_ECHAINIV=y
|
||||
CONFIG_CRYPTO_ANSI_CPRNG=y
|
||||
CONFIG_ARM64_CRYPTO=y
|
||||
CONFIG_CRYPTO_SHA1_ARM64_CE=y
|
||||
|
|
|
@ -103,6 +103,7 @@ static inline u64 gic_read_iar_common(void)
|
|||
u64 irqstat;
|
||||
|
||||
asm volatile("mrs_s %0, " __stringify(ICC_IAR1_EL1) : "=r" (irqstat));
|
||||
dsb(sy);
|
||||
return irqstat;
|
||||
}
|
||||
|
||||
|
|
|
@ -121,6 +121,7 @@ futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
|
|||
return -EFAULT;
|
||||
|
||||
asm volatile("// futex_atomic_cmpxchg_inatomic\n"
|
||||
ALTERNATIVE("nop", SET_PSTATE_PAN(0), ARM64_HAS_PAN, CONFIG_ARM64_PAN)
|
||||
" prfm pstl1strm, %2\n"
|
||||
"1: ldxr %w1, %2\n"
|
||||
" sub %w3, %w1, %w4\n"
|
||||
|
@ -137,6 +138,7 @@ futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
|
|||
" .align 3\n"
|
||||
" .quad 1b, 4b, 2b, 4b\n"
|
||||
" .popsection\n"
|
||||
ALTERNATIVE("nop", SET_PSTATE_PAN(1), ARM64_HAS_PAN, CONFIG_ARM64_PAN)
|
||||
: "+r" (ret), "=&r" (val), "+Q" (*uaddr), "=&r" (tmp)
|
||||
: "r" (oldval), "r" (newval), "Ir" (-EFAULT)
|
||||
: "memory");
|
||||
|
|
|
@ -182,6 +182,7 @@
|
|||
#define CPTR_EL2_TCPAC (1 << 31)
|
||||
#define CPTR_EL2_TTA (1 << 20)
|
||||
#define CPTR_EL2_TFP (1 << CPTR_EL2_TFP_SHIFT)
|
||||
#define CPTR_EL2_DEFAULT 0x000033ff
|
||||
|
||||
/* Hyp Debug Configuration Register bits */
|
||||
#define MDCR_EL2_TDRA (1 << 11)
|
||||
|
|
|
@ -127,10 +127,14 @@ static inline unsigned long *vcpu_spsr(const struct kvm_vcpu *vcpu)
|
|||
|
||||
static inline bool vcpu_mode_priv(const struct kvm_vcpu *vcpu)
|
||||
{
|
||||
u32 mode = *vcpu_cpsr(vcpu) & PSR_MODE_MASK;
|
||||
u32 mode;
|
||||
|
||||
if (vcpu_mode_is_32bit(vcpu))
|
||||
if (vcpu_mode_is_32bit(vcpu)) {
|
||||
mode = *vcpu_cpsr(vcpu) & COMPAT_PSR_MODE_MASK;
|
||||
return mode > COMPAT_PSR_MODE_USR;
|
||||
}
|
||||
|
||||
mode = *vcpu_cpsr(vcpu) & PSR_MODE_MASK;
|
||||
|
||||
return mode != PSR_MODE_EL0t;
|
||||
}
|
||||
|
|
|
@ -39,6 +39,7 @@
|
|||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
#include <linux/personality.h> /* for READ_IMPLIES_EXEC */
|
||||
#include <asm/pgtable-types.h>
|
||||
|
||||
extern void __cpu_clear_user_page(void *p, unsigned long user);
|
||||
|
|
|
@ -67,11 +67,11 @@ extern void __pgd_error(const char *file, int line, unsigned long val);
|
|||
#define PROT_DEFAULT (PTE_TYPE_PAGE | PTE_AF | PTE_SHARED)
|
||||
#define PROT_SECT_DEFAULT (PMD_TYPE_SECT | PMD_SECT_AF | PMD_SECT_S)
|
||||
|
||||
#define PROT_DEVICE_nGnRnE (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_ATTRINDX(MT_DEVICE_nGnRnE))
|
||||
#define PROT_DEVICE_nGnRE (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_ATTRINDX(MT_DEVICE_nGnRE))
|
||||
#define PROT_NORMAL_NC (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_ATTRINDX(MT_NORMAL_NC))
|
||||
#define PROT_NORMAL_WT (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_ATTRINDX(MT_NORMAL_WT))
|
||||
#define PROT_NORMAL (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_ATTRINDX(MT_NORMAL))
|
||||
#define PROT_DEVICE_nGnRnE (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_DIRTY | PTE_WRITE | PTE_ATTRINDX(MT_DEVICE_nGnRnE))
|
||||
#define PROT_DEVICE_nGnRE (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_DIRTY | PTE_WRITE | PTE_ATTRINDX(MT_DEVICE_nGnRE))
|
||||
#define PROT_NORMAL_NC (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_DIRTY | PTE_WRITE | PTE_ATTRINDX(MT_NORMAL_NC))
|
||||
#define PROT_NORMAL_WT (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_DIRTY | PTE_WRITE | PTE_ATTRINDX(MT_NORMAL_WT))
|
||||
#define PROT_NORMAL (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_DIRTY | PTE_WRITE | PTE_ATTRINDX(MT_NORMAL))
|
||||
|
||||
#define PROT_SECT_DEVICE_nGnRE (PROT_SECT_DEFAULT | PMD_SECT_PXN | PMD_SECT_UXN | PMD_ATTRINDX(MT_DEVICE_nGnRE))
|
||||
#define PROT_SECT_NORMAL (PROT_SECT_DEFAULT | PMD_SECT_PXN | PMD_SECT_UXN | PMD_ATTRINDX(MT_NORMAL))
|
||||
|
@ -81,7 +81,7 @@ extern void __pgd_error(const char *file, int line, unsigned long val);
|
|||
|
||||
#define PAGE_KERNEL __pgprot(_PAGE_DEFAULT | PTE_PXN | PTE_UXN | PTE_DIRTY | PTE_WRITE)
|
||||
#define PAGE_KERNEL_RO __pgprot(_PAGE_DEFAULT | PTE_PXN | PTE_UXN | PTE_DIRTY | PTE_RDONLY)
|
||||
#define PAGE_KERNEL_ROX __pgprot(_PAGE_DEFAULT | PTE_UXN | PTE_DIRTY | PTE_RDONLY)
|
||||
#define PAGE_KERNEL_ROX __pgprot(_PAGE_DEFAULT | PTE_UXN | PTE_DIRTY | PTE_RDONLY)
|
||||
#define PAGE_KERNEL_EXEC __pgprot(_PAGE_DEFAULT | PTE_UXN | PTE_DIRTY | PTE_WRITE)
|
||||
#define PAGE_KERNEL_EXEC_CONT __pgprot(_PAGE_DEFAULT | PTE_UXN | PTE_DIRTY | PTE_WRITE | PTE_CONT)
|
||||
|
||||
|
@ -153,6 +153,7 @@ extern struct page *empty_zero_page;
|
|||
#define pte_write(pte) (!!(pte_val(pte) & PTE_WRITE))
|
||||
#define pte_exec(pte) (!(pte_val(pte) & PTE_UXN))
|
||||
#define pte_cont(pte) (!!(pte_val(pte) & PTE_CONT))
|
||||
#define pte_user(pte) (!!(pte_val(pte) & PTE_USER))
|
||||
|
||||
#ifdef CONFIG_ARM64_HW_AFDBM
|
||||
#define pte_hw_dirty(pte) (pte_write(pte) && !(pte_val(pte) & PTE_RDONLY))
|
||||
|
@ -163,8 +164,6 @@ extern struct page *empty_zero_page;
|
|||
#define pte_dirty(pte) (pte_sw_dirty(pte) || pte_hw_dirty(pte))
|
||||
|
||||
#define pte_valid(pte) (!!(pte_val(pte) & PTE_VALID))
|
||||
#define pte_valid_user(pte) \
|
||||
((pte_val(pte) & (PTE_VALID | PTE_USER)) == (PTE_VALID | PTE_USER))
|
||||
#define pte_valid_not_user(pte) \
|
||||
((pte_val(pte) & (PTE_VALID | PTE_USER)) == PTE_VALID)
|
||||
#define pte_valid_young(pte) \
|
||||
|
@ -278,13 +277,13 @@ extern void __sync_icache_dcache(pte_t pteval, unsigned long addr);
|
|||
static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
|
||||
pte_t *ptep, pte_t pte)
|
||||
{
|
||||
if (pte_valid_user(pte)) {
|
||||
if (!pte_special(pte) && pte_exec(pte))
|
||||
__sync_icache_dcache(pte, addr);
|
||||
if (pte_valid(pte)) {
|
||||
if (pte_sw_dirty(pte) && pte_write(pte))
|
||||
pte_val(pte) &= ~PTE_RDONLY;
|
||||
else
|
||||
pte_val(pte) |= PTE_RDONLY;
|
||||
if (pte_user(pte) && pte_exec(pte) && !pte_special(pte))
|
||||
__sync_icache_dcache(pte, addr);
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
|
@ -514,9 +514,14 @@ CPU_LE( movk x0, #0x30d0, lsl #16 ) // Clear EE and E0E on LE systems
|
|||
#endif
|
||||
|
||||
/* EL2 debug */
|
||||
mrs x0, id_aa64dfr0_el1 // Check ID_AA64DFR0_EL1 PMUVer
|
||||
sbfx x0, x0, #8, #4
|
||||
cmp x0, #1
|
||||
b.lt 4f // Skip if no PMU present
|
||||
mrs x0, pmcr_el0 // Disable debug access traps
|
||||
ubfx x0, x0, #11, #5 // to EL2 and allow access to
|
||||
msr mdcr_el2, x0 // all PMU counters from EL1
|
||||
4:
|
||||
|
||||
/* Stage-2 translation */
|
||||
msr vttbr_el2, xzr
|
||||
|
|
|
@ -64,6 +64,16 @@
|
|||
|
||||
#ifdef CONFIG_EFI
|
||||
|
||||
/*
|
||||
* Prevent the symbol aliases below from being emitted into the kallsyms
|
||||
* table, by forcing them to be absolute symbols (which are conveniently
|
||||
* ignored by scripts/kallsyms) rather than section relative symbols.
|
||||
* The distinction is only relevant for partial linking, and only for symbols
|
||||
* that are defined within a section declaration (which is not the case for
|
||||
* the definitions below) so the resulting values will be identical.
|
||||
*/
|
||||
#define KALLSYMS_HIDE(sym) ABSOLUTE(sym)
|
||||
|
||||
/*
|
||||
* The EFI stub has its own symbol namespace prefixed by __efistub_, to
|
||||
* isolate it from the kernel proper. The following symbols are legally
|
||||
|
@ -73,25 +83,25 @@
|
|||
* linked at. The routines below are all implemented in assembler in a
|
||||
* position independent manner
|
||||
*/
|
||||
__efistub_memcmp = __pi_memcmp;
|
||||
__efistub_memchr = __pi_memchr;
|
||||
__efistub_memcpy = __pi_memcpy;
|
||||
__efistub_memmove = __pi_memmove;
|
||||
__efistub_memset = __pi_memset;
|
||||
__efistub_strlen = __pi_strlen;
|
||||
__efistub_strcmp = __pi_strcmp;
|
||||
__efistub_strncmp = __pi_strncmp;
|
||||
__efistub___flush_dcache_area = __pi___flush_dcache_area;
|
||||
__efistub_memcmp = KALLSYMS_HIDE(__pi_memcmp);
|
||||
__efistub_memchr = KALLSYMS_HIDE(__pi_memchr);
|
||||
__efistub_memcpy = KALLSYMS_HIDE(__pi_memcpy);
|
||||
__efistub_memmove = KALLSYMS_HIDE(__pi_memmove);
|
||||
__efistub_memset = KALLSYMS_HIDE(__pi_memset);
|
||||
__efistub_strlen = KALLSYMS_HIDE(__pi_strlen);
|
||||
__efistub_strcmp = KALLSYMS_HIDE(__pi_strcmp);
|
||||
__efistub_strncmp = KALLSYMS_HIDE(__pi_strncmp);
|
||||
__efistub___flush_dcache_area = KALLSYMS_HIDE(__pi___flush_dcache_area);
|
||||
|
||||
#ifdef CONFIG_KASAN
|
||||
__efistub___memcpy = __pi_memcpy;
|
||||
__efistub___memmove = __pi_memmove;
|
||||
__efistub___memset = __pi_memset;
|
||||
__efistub___memcpy = KALLSYMS_HIDE(__pi_memcpy);
|
||||
__efistub___memmove = KALLSYMS_HIDE(__pi_memmove);
|
||||
__efistub___memset = KALLSYMS_HIDE(__pi_memset);
|
||||
#endif
|
||||
|
||||
__efistub__text = _text;
|
||||
__efistub__end = _end;
|
||||
__efistub__edata = _edata;
|
||||
__efistub__text = KALLSYMS_HIDE(_text);
|
||||
__efistub__end = KALLSYMS_HIDE(_end);
|
||||
__efistub__edata = KALLSYMS_HIDE(_edata);
|
||||
|
||||
#endif
|
||||
|
||||
|
|
|
@ -36,7 +36,11 @@ static void __hyp_text __activate_traps(struct kvm_vcpu *vcpu)
|
|||
write_sysreg(val, hcr_el2);
|
||||
/* Trap on AArch32 cp15 c15 accesses (EL1 or EL0) */
|
||||
write_sysreg(1 << 15, hstr_el2);
|
||||
write_sysreg(CPTR_EL2_TTA | CPTR_EL2_TFP, cptr_el2);
|
||||
|
||||
val = CPTR_EL2_DEFAULT;
|
||||
val |= CPTR_EL2_TTA | CPTR_EL2_TFP;
|
||||
write_sysreg(val, cptr_el2);
|
||||
|
||||
write_sysreg(vcpu->arch.mdcr_el2, mdcr_el2);
|
||||
}
|
||||
|
||||
|
@ -45,7 +49,7 @@ static void __hyp_text __deactivate_traps(struct kvm_vcpu *vcpu)
|
|||
write_sysreg(HCR_RW, hcr_el2);
|
||||
write_sysreg(0, hstr_el2);
|
||||
write_sysreg(read_sysreg(mdcr_el2) & MDCR_EL2_HPMN_MASK, mdcr_el2);
|
||||
write_sysreg(0, cptr_el2);
|
||||
write_sysreg(CPTR_EL2_DEFAULT, cptr_el2);
|
||||
}
|
||||
|
||||
static void __hyp_text __activate_vm(struct kvm_vcpu *vcpu)
|
||||
|
|
|
@ -27,7 +27,11 @@
|
|||
|
||||
#define PSTATE_FAULT_BITS_64 (PSR_MODE_EL1h | PSR_A_BIT | PSR_F_BIT | \
|
||||
PSR_I_BIT | PSR_D_BIT)
|
||||
#define EL1_EXCEPT_SYNC_OFFSET 0x200
|
||||
|
||||
#define CURRENT_EL_SP_EL0_VECTOR 0x0
|
||||
#define CURRENT_EL_SP_ELx_VECTOR 0x200
|
||||
#define LOWER_EL_AArch64_VECTOR 0x400
|
||||
#define LOWER_EL_AArch32_VECTOR 0x600
|
||||
|
||||
static void prepare_fault32(struct kvm_vcpu *vcpu, u32 mode, u32 vect_offset)
|
||||
{
|
||||
|
@ -97,6 +101,34 @@ static void inject_abt32(struct kvm_vcpu *vcpu, bool is_pabt,
|
|||
*fsr = 0x14;
|
||||
}
|
||||
|
||||
enum exception_type {
|
||||
except_type_sync = 0,
|
||||
except_type_irq = 0x80,
|
||||
except_type_fiq = 0x100,
|
||||
except_type_serror = 0x180,
|
||||
};
|
||||
|
||||
static u64 get_except_vector(struct kvm_vcpu *vcpu, enum exception_type type)
|
||||
{
|
||||
u64 exc_offset;
|
||||
|
||||
switch (*vcpu_cpsr(vcpu) & (PSR_MODE_MASK | PSR_MODE32_BIT)) {
|
||||
case PSR_MODE_EL1t:
|
||||
exc_offset = CURRENT_EL_SP_EL0_VECTOR;
|
||||
break;
|
||||
case PSR_MODE_EL1h:
|
||||
exc_offset = CURRENT_EL_SP_ELx_VECTOR;
|
||||
break;
|
||||
case PSR_MODE_EL0t:
|
||||
exc_offset = LOWER_EL_AArch64_VECTOR;
|
||||
break;
|
||||
default:
|
||||
exc_offset = LOWER_EL_AArch32_VECTOR;
|
||||
}
|
||||
|
||||
return vcpu_sys_reg(vcpu, VBAR_EL1) + exc_offset + type;
|
||||
}
|
||||
|
||||
static void inject_abt64(struct kvm_vcpu *vcpu, bool is_iabt, unsigned long addr)
|
||||
{
|
||||
unsigned long cpsr = *vcpu_cpsr(vcpu);
|
||||
|
@ -108,8 +140,8 @@ static void inject_abt64(struct kvm_vcpu *vcpu, bool is_iabt, unsigned long addr
|
|||
*vcpu_spsr(vcpu) = cpsr;
|
||||
*vcpu_elr_el1(vcpu) = *vcpu_pc(vcpu);
|
||||
|
||||
*vcpu_pc(vcpu) = get_except_vector(vcpu, except_type_sync);
|
||||
*vcpu_cpsr(vcpu) = PSTATE_FAULT_BITS_64;
|
||||
*vcpu_pc(vcpu) = vcpu_sys_reg(vcpu, VBAR_EL1) + EL1_EXCEPT_SYNC_OFFSET;
|
||||
|
||||
vcpu_sys_reg(vcpu, FAR_EL1) = addr;
|
||||
|
||||
|
@ -143,8 +175,8 @@ static void inject_undef64(struct kvm_vcpu *vcpu)
|
|||
*vcpu_spsr(vcpu) = cpsr;
|
||||
*vcpu_elr_el1(vcpu) = *vcpu_pc(vcpu);
|
||||
|
||||
*vcpu_pc(vcpu) = get_except_vector(vcpu, except_type_sync);
|
||||
*vcpu_cpsr(vcpu) = PSTATE_FAULT_BITS_64;
|
||||
*vcpu_pc(vcpu) = vcpu_sys_reg(vcpu, VBAR_EL1) + EL1_EXCEPT_SYNC_OFFSET;
|
||||
|
||||
/*
|
||||
* Build an unknown exception, depending on the instruction
|
||||
|
|
|
@ -1007,10 +1007,9 @@ static int emulate_cp(struct kvm_vcpu *vcpu,
|
|||
if (likely(r->access(vcpu, params, r))) {
|
||||
/* Skip instruction, since it was emulated */
|
||||
kvm_skip_instr(vcpu, kvm_vcpu_trap_il_is32bit(vcpu));
|
||||
/* Handled */
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* Handled */
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* Not handled */
|
||||
|
@ -1043,7 +1042,7 @@ static void unhandled_cp_access(struct kvm_vcpu *vcpu,
|
|||
}
|
||||
|
||||
/**
|
||||
* kvm_handle_cp_64 -- handles a mrrc/mcrr trap on a guest CP15 access
|
||||
* kvm_handle_cp_64 -- handles a mrrc/mcrr trap on a guest CP14/CP15 access
|
||||
* @vcpu: The VCPU pointer
|
||||
* @run: The kvm_run struct
|
||||
*/
|
||||
|
@ -1095,7 +1094,7 @@ static int kvm_handle_cp_64(struct kvm_vcpu *vcpu,
|
|||
}
|
||||
|
||||
/**
|
||||
* kvm_handle_cp15_32 -- handles a mrc/mcr trap on a guest CP15 access
|
||||
* kvm_handle_cp_32 -- handles a mrc/mcr trap on a guest CP14/CP15 access
|
||||
* @vcpu: The VCPU pointer
|
||||
* @run: The kvm_run struct
|
||||
*/
|
||||
|
|
|
@ -46,7 +46,7 @@ enum address_markers_idx {
|
|||
PCI_START_NR,
|
||||
PCI_END_NR,
|
||||
MODULES_START_NR,
|
||||
MODUELS_END_NR,
|
||||
MODULES_END_NR,
|
||||
KERNEL_SPACE_NR,
|
||||
};
|
||||
|
||||
|
|
|
@ -120,6 +120,7 @@ static void __init cpu_set_ttbr1(unsigned long ttbr1)
|
|||
void __init kasan_init(void)
|
||||
{
|
||||
struct memblock_region *reg;
|
||||
int i;
|
||||
|
||||
/*
|
||||
* We are going to perform proper setup of shadow memory.
|
||||
|
@ -155,6 +156,14 @@ void __init kasan_init(void)
|
|||
pfn_to_nid(virt_to_pfn(start)));
|
||||
}
|
||||
|
||||
/*
|
||||
* KAsan may reuse the contents of kasan_zero_pte directly, so we
|
||||
* should make sure that it maps the zero page read-only.
|
||||
*/
|
||||
for (i = 0; i < PTRS_PER_PTE; i++)
|
||||
set_pte(&kasan_zero_pte[i],
|
||||
pfn_pte(virt_to_pfn(kasan_zero_page), PAGE_KERNEL_RO));
|
||||
|
||||
memset(kasan_zero_page, 0, PAGE_SIZE);
|
||||
cpu_set_ttbr1(__pa(swapper_pg_dir));
|
||||
flush_tlb_all();
|
||||
|
|
|
@ -14,6 +14,7 @@
|
|||
#include <linux/mm.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/sched.h>
|
||||
#include <linux/vmalloc.h>
|
||||
|
||||
#include <asm/pgtable.h>
|
||||
#include <asm/tlbflush.h>
|
||||
|
@ -44,6 +45,7 @@ static int change_memory_common(unsigned long addr, int numpages,
|
|||
unsigned long end = start + size;
|
||||
int ret;
|
||||
struct page_change_data data;
|
||||
struct vm_struct *area;
|
||||
|
||||
if (!PAGE_ALIGNED(addr)) {
|
||||
start &= PAGE_MASK;
|
||||
|
@ -51,11 +53,27 @@ static int change_memory_common(unsigned long addr, int numpages,
|
|||
WARN_ON_ONCE(1);
|
||||
}
|
||||
|
||||
if (start < MODULES_VADDR || start >= MODULES_END)
|
||||
/*
|
||||
* Kernel VA mappings are always live, and splitting live section
|
||||
* mappings into page mappings may cause TLB conflicts. This means
|
||||
* we have to ensure that changing the permission bits of the range
|
||||
* we are operating on does not result in such splitting.
|
||||
*
|
||||
* Let's restrict ourselves to mappings created by vmalloc (or vmap).
|
||||
* Those are guaranteed to consist entirely of page mappings, and
|
||||
* splitting is never needed.
|
||||
*
|
||||
* So check whether the [addr, addr + size) interval is entirely
|
||||
* covered by precisely one VM area that has the VM_ALLOC flag set.
|
||||
*/
|
||||
area = find_vm_area((void *)addr);
|
||||
if (!area ||
|
||||
end > (unsigned long)area->addr + area->size ||
|
||||
!(area->flags & VM_ALLOC))
|
||||
return -EINVAL;
|
||||
|
||||
if (end < MODULES_VADDR || end >= MODULES_END)
|
||||
return -EINVAL;
|
||||
if (!numpages)
|
||||
return 0;
|
||||
|
||||
data.set_mask = set_mask;
|
||||
data.clear_mask = clear_mask;
|
||||
|
|
|
@ -84,3 +84,15 @@
|
|||
b.lo 9998b
|
||||
dsb \domain
|
||||
.endm
|
||||
|
||||
/*
|
||||
* reset_pmuserenr_el0 - reset PMUSERENR_EL0 if PMUv3 present
|
||||
*/
|
||||
.macro reset_pmuserenr_el0, tmpreg
|
||||
mrs \tmpreg, id_aa64dfr0_el1 // Check ID_AA64DFR0_EL1 PMUVer
|
||||
sbfx \tmpreg, \tmpreg, #8, #4
|
||||
cmp \tmpreg, #1 // Skip if no PMU present
|
||||
b.lt 9000f
|
||||
msr pmuserenr_el0, xzr // Disable PMU access from EL0
|
||||
9000:
|
||||
.endm
|
||||
|
|
|
@ -117,7 +117,7 @@ ENTRY(cpu_do_resume)
|
|||
*/
|
||||
ubfx x11, x11, #1, #1
|
||||
msr oslar_el1, x11
|
||||
msr pmuserenr_el0, xzr // Disable PMU access from EL0
|
||||
reset_pmuserenr_el0 x0 // Disable PMU access from EL0
|
||||
mov x0, x12
|
||||
dsb nsh // Make sure local tlb invalidation completed
|
||||
isb
|
||||
|
@ -154,7 +154,7 @@ ENTRY(__cpu_setup)
|
|||
msr cpacr_el1, x0 // Enable FP/ASIMD
|
||||
mov x0, #1 << 12 // Reset mdscr_el1 and disable
|
||||
msr mdscr_el1, x0 // access to the DCC from EL0
|
||||
msr pmuserenr_el0, xzr // Disable PMU access from EL0
|
||||
reset_pmuserenr_el0 x0 // Disable PMU access from EL0
|
||||
/*
|
||||
* Memory region attributes for LPAE:
|
||||
*
|
||||
|
|
|
@ -276,6 +276,7 @@ source "kernel/Kconfig.preempt"
|
|||
|
||||
config SMP
|
||||
bool "Symmetric multi-processing support"
|
||||
depends on MMU
|
||||
---help---
|
||||
This enables support for systems with more than one CPU. If you have
|
||||
a system with only one CPU, say N. If you have a system with more
|
||||
|
|
|
@ -2085,7 +2085,7 @@ config PAGE_SIZE_32KB
|
|||
|
||||
config PAGE_SIZE_64KB
|
||||
bool "64kB"
|
||||
depends on !CPU_R3000 && !CPU_TX39XX
|
||||
depends on !CPU_R3000 && !CPU_TX39XX && !CPU_R6000
|
||||
help
|
||||
Using 64kB page size will result in higher performance kernel at
|
||||
the price of higher memory consumption. This option is available on
|
||||
|
|
|
@ -19,6 +19,8 @@
|
|||
|
||||
#include <bcm63xx_nvram.h>
|
||||
|
||||
#define BCM63XX_DEFAULT_PSI_SIZE 64
|
||||
|
||||
static struct bcm963xx_nvram nvram;
|
||||
static int mac_addr_used;
|
||||
|
||||
|
@ -85,3 +87,12 @@ int bcm63xx_nvram_get_mac_address(u8 *mac)
|
|||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL(bcm63xx_nvram_get_mac_address);
|
||||
|
||||
int bcm63xx_nvram_get_psi_size(void)
|
||||
{
|
||||
if (nvram.psi_size > 0)
|
||||
return nvram.psi_size;
|
||||
|
||||
return BCM63XX_DEFAULT_PSI_SIZE;
|
||||
}
|
||||
EXPORT_SYMBOL(bcm63xx_nvram_get_psi_size);
|
||||
|
|
|
@ -74,6 +74,7 @@ uart0: serial@10000100 {
|
|||
timer: timer@10000040 {
|
||||
compatible = "syscon";
|
||||
reg = <0x10000040 0x2c>;
|
||||
little-endian;
|
||||
};
|
||||
|
||||
reboot {
|
||||
|
|
|
@ -98,6 +98,7 @@ upg_irq0_intc: upg_irq0_intc@406780 {
|
|||
sun_top_ctrl: syscon@404000 {
|
||||
compatible = "brcm,bcm7125-sun-top-ctrl", "syscon";
|
||||
reg = <0x404000 0x60c>;
|
||||
little-endian;
|
||||
};
|
||||
|
||||
reboot {
|
||||
|
|
|
@ -118,6 +118,7 @@ upg_aon_irq0_intc: upg_aon_irq0_intc@408b80 {
|
|||
sun_top_ctrl: syscon@404000 {
|
||||
compatible = "brcm,bcm7346-sun-top-ctrl", "syscon";
|
||||
reg = <0x404000 0x51c>;
|
||||
little-endian;
|
||||
};
|
||||
|
||||
reboot {
|
||||
|
|
|
@ -112,6 +112,7 @@ upg_aon_irq0_intc: upg_aon_irq0_intc@408b80 {
|
|||
sun_top_ctrl: syscon@404000 {
|
||||
compatible = "brcm,bcm7358-sun-top-ctrl", "syscon";
|
||||
reg = <0x404000 0x51c>;
|
||||
little-endian;
|
||||
};
|
||||
|
||||
reboot {
|
||||
|
|
|
@ -112,6 +112,7 @@ upg_aon_irq0_intc: upg_aon_irq0_intc@408b80 {
|
|||
sun_top_ctrl: syscon@404000 {
|
||||
compatible = "brcm,bcm7360-sun-top-ctrl", "syscon";
|
||||
reg = <0x404000 0x51c>;
|
||||
little-endian;
|
||||
};
|
||||
|
||||
reboot {
|
||||
|
|
|
@ -118,6 +118,7 @@ upg_aon_irq0_intc: upg_aon_irq0_intc@408b80 {
|
|||
sun_top_ctrl: syscon@404000 {
|
||||
compatible = "brcm,bcm7362-sun-top-ctrl", "syscon";
|
||||
reg = <0x404000 0x51c>;
|
||||
little-endian;
|
||||
};
|
||||
|
||||
reboot {
|
||||
|
|
|
@ -99,6 +99,7 @@ upg_irq0_intc: upg_irq0_intc@406780 {
|
|||
sun_top_ctrl: syscon@404000 {
|
||||
compatible = "brcm,bcm7420-sun-top-ctrl", "syscon";
|
||||
reg = <0x404000 0x60c>;
|
||||
little-endian;
|
||||
};
|
||||
|
||||
reboot {
|
||||
|
|
|
@ -100,6 +100,7 @@ upg_irq0_intc: upg_irq0_intc@406780 {
|
|||
sun_top_ctrl: syscon@404000 {
|
||||
compatible = "brcm,bcm7425-sun-top-ctrl", "syscon";
|
||||
reg = <0x404000 0x51c>;
|
||||
little-endian;
|
||||
};
|
||||
|
||||
reboot {
|
||||
|
|
|
@ -114,6 +114,7 @@ upg_irq0_intc: upg_irq0_intc@406780 {
|
|||
sun_top_ctrl: syscon@404000 {
|
||||
compatible = "brcm,bcm7425-sun-top-ctrl", "syscon";
|
||||
reg = <0x404000 0x51c>;
|
||||
little-endian;
|
||||
};
|
||||
|
||||
reboot {
|
||||
|
|
|
@ -227,7 +227,7 @@ struct mips_elf_abiflags_v0 {
|
|||
int __res = 1; \
|
||||
struct elfhdr *__h = (hdr); \
|
||||
\
|
||||
if (__h->e_machine != EM_MIPS) \
|
||||
if (!mips_elf_check_machine(__h)) \
|
||||
__res = 0; \
|
||||
if (__h->e_ident[EI_CLASS] != ELFCLASS32) \
|
||||
__res = 0; \
|
||||
|
@ -258,7 +258,7 @@ struct mips_elf_abiflags_v0 {
|
|||
int __res = 1; \
|
||||
struct elfhdr *__h = (hdr); \
|
||||
\
|
||||
if (__h->e_machine != EM_MIPS) \
|
||||
if (!mips_elf_check_machine(__h)) \
|
||||
__res = 0; \
|
||||
if (__h->e_ident[EI_CLASS] != ELFCLASS64) \
|
||||
__res = 0; \
|
||||
|
@ -285,6 +285,11 @@ struct mips_elf_abiflags_v0 {
|
|||
|
||||
#endif /* !defined(ELF_ARCH) */
|
||||
|
||||
#define mips_elf_check_machine(x) ((x)->e_machine == EM_MIPS)
|
||||
|
||||
#define vmcore_elf32_check_arch mips_elf_check_machine
|
||||
#define vmcore_elf64_check_arch mips_elf_check_machine
|
||||
|
||||
struct mips_abi;
|
||||
|
||||
extern struct mips_abi mips_abi;
|
||||
|
|
|
@ -179,6 +179,10 @@ static inline void lose_fpu_inatomic(int save, struct task_struct *tsk)
|
|||
if (save)
|
||||
_save_fp(tsk);
|
||||
__disable_fpu();
|
||||
} else {
|
||||
/* FPU should not have been left enabled with no owner */
|
||||
WARN(read_c0_status() & ST0_CU1,
|
||||
"Orphaned FPU left enabled");
|
||||
}
|
||||
KSTK_STATUS(tsk) &= ~ST0_CU1;
|
||||
clear_tsk_thread_flag(tsk, TIF_USEDFPU);
|
||||
|
|
|
@ -30,4 +30,6 @@ u8 *bcm63xx_nvram_get_name(void);
|
|||
*/
|
||||
int bcm63xx_nvram_get_mac_address(u8 *mac);
|
||||
|
||||
int bcm63xx_nvram_get_psi_size(void);
|
||||
|
||||
#endif /* BCM63XX_NVRAM_H */
|
||||
|
|
Some files were not shown because too many files have changed in this diff Show more
Loading…
Reference in a new issue