riscv: fix detection of toolchain Zihintpause support
[ Upstream commitaae538cd03
] It is not sufficient to check if a toolchain supports a particular extension without checking if the linker supports that extension too. For example, Clang 15 supports Zihintpause but GNU bintutils 2.35.2 does not, leading build errors like so: riscv64-linux-gnu-ld: -march=rv64i2p0_m2p0_a2p0_c2p0_zihintpause2p0: Invalid or unknown z ISA extension: 'zihintpause' Add a TOOLCHAIN_HAS_ZIHINTPAUSE which checks if each of the compiler, assembler and linker support the extension. Replace the ifdef in the vdso with one depending on this new symbol. Fixes:8eb060e101
("arch/riscv: add Zihintpause support") Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Nathan Chancellor <nathan@kernel.org> Link: https://lore.kernel.org/r/20221006173520.1785507-3-conor@kernel.org Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com> Signed-off-by: Sasha Levin <sashal@kernel.org>
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@ -426,6 +426,13 @@ config RISCV_ISA_ZICBOM
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If you don't know what to do here, say Y.
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config TOOLCHAIN_HAS_ZIHINTPAUSE
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bool
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default y
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depends on !64BIT || $(cc-option,-mabi=lp64 -march=rv64ima_zihintpause)
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depends on !32BIT || $(cc-option,-mabi=ilp32 -march=rv32ima_zihintpause)
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depends on LLD_VERSION >= 150000 || LD_VERSION >= 23600
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config FPU
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bool "FPU support"
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default y
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@ -62,8 +62,7 @@ riscv-march-$(toolchain-need-zicsr-zifencei) := $(riscv-march-y)_zicsr_zifencei
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riscv-march-$(CONFIG_TOOLCHAIN_HAS_ZICBOM) := $(riscv-march-y)_zicbom
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# Check if the toolchain supports Zihintpause extension
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toolchain-supports-zihintpause := $(call cc-option-yn, -march=$(riscv-march-y)_zihintpause)
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riscv-march-$(toolchain-supports-zihintpause) := $(riscv-march-y)_zihintpause
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riscv-march-$(CONFIG_TOOLCHAIN_HAS_ZIHINTPAUSE) := $(riscv-march-y)_zihintpause
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KBUILD_CFLAGS += -march=$(subst fd,,$(riscv-march-y))
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KBUILD_AFLAGS += -march=$(riscv-march-y)
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@ -21,7 +21,7 @@ static inline void cpu_relax(void)
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* Reduce instruction retirement.
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* This assumes the PC changes.
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*/
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#ifdef __riscv_zihintpause
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#ifdef CONFIG_TOOLCHAIN_HAS_ZIHINTPAUSE
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__asm__ __volatile__ ("pause");
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#else
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/* Encoding of the pause instruction */
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