ASoC: fsl_mqs: simplify the code with adding fsl_mqs_soc_data
Add soc specific data struct fsl_mqs_soc_data, move the definition of control register, each function bits to it, then the code can be simplified. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Link: https://lore.kernel.org/r/1653456221-21613-1-git-send-email-shengjiu.wang@nxp.com Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -10,6 +10,7 @@
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#include <linux/moduleparam.h>
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#include <linux/moduleparam.h>
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#include <linux/mfd/syscon.h>
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#include <linux/mfd/syscon.h>
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#include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
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#include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
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#include <linux/of_device.h>
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#include <linux/pm_runtime.h>
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#include <linux/pm_runtime.h>
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#include <linux/of.h>
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#include <linux/of.h>
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#include <linux/pm.h>
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#include <linux/pm.h>
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@ -29,15 +30,41 @@
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#define MQS_CLK_DIV_MASK (0xFF << 0)
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#define MQS_CLK_DIV_MASK (0xFF << 0)
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#define MQS_CLK_DIV_SHIFT (0)
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#define MQS_CLK_DIV_SHIFT (0)
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/**
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* struct fsl_mqs_soc_data - soc specific data
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*
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* @use_gpr: control register is in General Purpose Register group
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* @ctrl_off: control register offset
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* @en_mask: enable bit mask
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* @en_shift: enable bit shift
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* @rst_mask: reset bit mask
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* @rst_shift: reset bit shift
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* @osr_mask: oversample bit mask
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* @osr_shift: oversample bit shift
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* @div_mask: clock divider mask
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* @div_shift: clock divider bit shift
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*/
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struct fsl_mqs_soc_data {
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bool use_gpr;
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int ctrl_off;
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int en_mask;
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int en_shift;
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int rst_mask;
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int rst_shift;
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int osr_mask;
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int osr_shift;
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int div_mask;
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int div_shift;
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};
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/* codec private data */
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/* codec private data */
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struct fsl_mqs {
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struct fsl_mqs {
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struct regmap *regmap;
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struct regmap *regmap;
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struct clk *mclk;
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struct clk *mclk;
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struct clk *ipg;
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struct clk *ipg;
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const struct fsl_mqs_soc_data *soc;
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unsigned int reg_iomuxc_gpr2;
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unsigned int reg_mqs_ctrl;
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unsigned int reg_mqs_ctrl;
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bool use_gpr;
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};
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};
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#define FSL_MQS_RATES (SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000)
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#define FSL_MQS_RATES (SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000)
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@ -65,19 +92,11 @@ static int fsl_mqs_hw_params(struct snd_pcm_substream *substream,
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res = mclk_rate % (32 * lrclk * 2 * 8);
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res = mclk_rate % (32 * lrclk * 2 * 8);
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if (res == 0 && div > 0 && div <= 256) {
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if (res == 0 && div > 0 && div <= 256) {
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if (mqs_priv->use_gpr) {
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regmap_update_bits(mqs_priv->regmap, mqs_priv->soc->ctrl_off,
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regmap_update_bits(mqs_priv->regmap, IOMUXC_GPR2,
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mqs_priv->soc->div_mask,
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IMX6SX_GPR2_MQS_CLK_DIV_MASK,
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(div - 1) << mqs_priv->soc->div_shift);
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(div - 1) << IMX6SX_GPR2_MQS_CLK_DIV_SHIFT);
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regmap_update_bits(mqs_priv->regmap, mqs_priv->soc->ctrl_off,
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regmap_update_bits(mqs_priv->regmap, IOMUXC_GPR2,
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mqs_priv->soc->osr_mask, 0);
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IMX6SX_GPR2_MQS_OVERSAMPLE_MASK, 0);
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} else {
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regmap_update_bits(mqs_priv->regmap, REG_MQS_CTRL,
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MQS_CLK_DIV_MASK,
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(div - 1) << MQS_CLK_DIV_SHIFT);
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regmap_update_bits(mqs_priv->regmap, REG_MQS_CTRL,
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MQS_OVERSAMPLE_MASK, 0);
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}
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} else {
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} else {
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dev_err(component->dev, "can't get proper divider\n");
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dev_err(component->dev, "can't get proper divider\n");
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}
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}
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@ -118,14 +137,9 @@ static int fsl_mqs_startup(struct snd_pcm_substream *substream,
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struct snd_soc_component *component = dai->component;
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struct snd_soc_component *component = dai->component;
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struct fsl_mqs *mqs_priv = snd_soc_component_get_drvdata(component);
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struct fsl_mqs *mqs_priv = snd_soc_component_get_drvdata(component);
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if (mqs_priv->use_gpr)
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regmap_update_bits(mqs_priv->regmap, mqs_priv->soc->ctrl_off,
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regmap_update_bits(mqs_priv->regmap, IOMUXC_GPR2,
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mqs_priv->soc->en_mask,
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IMX6SX_GPR2_MQS_EN_MASK,
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1 << mqs_priv->soc->en_shift);
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1 << IMX6SX_GPR2_MQS_EN_SHIFT);
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else
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regmap_update_bits(mqs_priv->regmap, REG_MQS_CTRL,
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MQS_EN_MASK,
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1 << MQS_EN_SHIFT);
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return 0;
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return 0;
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}
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}
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@ -135,12 +149,8 @@ static void fsl_mqs_shutdown(struct snd_pcm_substream *substream,
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struct snd_soc_component *component = dai->component;
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struct snd_soc_component *component = dai->component;
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struct fsl_mqs *mqs_priv = snd_soc_component_get_drvdata(component);
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struct fsl_mqs *mqs_priv = snd_soc_component_get_drvdata(component);
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if (mqs_priv->use_gpr)
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regmap_update_bits(mqs_priv->regmap, mqs_priv->soc->ctrl_off,
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regmap_update_bits(mqs_priv->regmap, IOMUXC_GPR2,
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mqs_priv->soc->en_mask, 0);
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IMX6SX_GPR2_MQS_EN_MASK, 0);
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else
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regmap_update_bits(mqs_priv->regmap, REG_MQS_CTRL,
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MQS_EN_MASK, 0);
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}
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}
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static const struct snd_soc_component_driver soc_codec_fsl_mqs = {
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static const struct snd_soc_component_driver soc_codec_fsl_mqs = {
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@ -191,12 +201,9 @@ static int fsl_mqs_probe(struct platform_device *pdev)
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* But in i.MX8QM/i.MX8QXP the control register is moved
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* But in i.MX8QM/i.MX8QXP the control register is moved
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* to its own domain.
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* to its own domain.
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*/
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*/
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if (of_device_is_compatible(np, "fsl,imx8qm-mqs"))
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mqs_priv->soc = of_device_get_match_data(&pdev->dev);
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mqs_priv->use_gpr = false;
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else
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mqs_priv->use_gpr = true;
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if (mqs_priv->use_gpr) {
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if (mqs_priv->soc->use_gpr) {
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gpr_np = of_parse_phandle(np, "gpr", 0);
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gpr_np = of_parse_phandle(np, "gpr", 0);
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if (!gpr_np) {
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if (!gpr_np) {
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dev_err(&pdev->dev, "failed to get gpr node by phandle\n");
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dev_err(&pdev->dev, "failed to get gpr node by phandle\n");
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@ -280,12 +287,7 @@ static int fsl_mqs_runtime_resume(struct device *dev)
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return ret;
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return ret;
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}
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}
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if (mqs_priv->use_gpr)
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regmap_write(mqs_priv->regmap, mqs_priv->soc->ctrl_off, mqs_priv->reg_mqs_ctrl);
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regmap_write(mqs_priv->regmap, IOMUXC_GPR2,
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mqs_priv->reg_iomuxc_gpr2);
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else
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regmap_write(mqs_priv->regmap, REG_MQS_CTRL,
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mqs_priv->reg_mqs_ctrl);
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return 0;
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return 0;
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}
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}
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@ -293,12 +295,7 @@ static int fsl_mqs_runtime_suspend(struct device *dev)
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{
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{
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struct fsl_mqs *mqs_priv = dev_get_drvdata(dev);
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struct fsl_mqs *mqs_priv = dev_get_drvdata(dev);
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if (mqs_priv->use_gpr)
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regmap_read(mqs_priv->regmap, mqs_priv->soc->ctrl_off, &mqs_priv->reg_mqs_ctrl);
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regmap_read(mqs_priv->regmap, IOMUXC_GPR2,
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&mqs_priv->reg_iomuxc_gpr2);
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else
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regmap_read(mqs_priv->regmap, REG_MQS_CTRL,
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&mqs_priv->reg_mqs_ctrl);
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clk_disable_unprepare(mqs_priv->mclk);
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clk_disable_unprepare(mqs_priv->mclk);
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clk_disable_unprepare(mqs_priv->ipg);
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clk_disable_unprepare(mqs_priv->ipg);
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@ -315,9 +312,35 @@ static const struct dev_pm_ops fsl_mqs_pm_ops = {
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pm_runtime_force_resume)
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pm_runtime_force_resume)
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};
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};
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static const struct fsl_mqs_soc_data fsl_mqs_imx8qm_data = {
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.use_gpr = false,
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.ctrl_off = REG_MQS_CTRL,
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.en_mask = MQS_EN_MASK,
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.en_shift = MQS_EN_SHIFT,
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.rst_mask = MQS_SW_RST_MASK,
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.rst_shift = MQS_SW_RST_SHIFT,
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.osr_mask = MQS_OVERSAMPLE_MASK,
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.osr_shift = MQS_OVERSAMPLE_SHIFT,
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.div_mask = MQS_CLK_DIV_MASK,
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.div_shift = MQS_CLK_DIV_SHIFT,
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};
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static const struct fsl_mqs_soc_data fsl_mqs_imx6sx_data = {
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.use_gpr = true,
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.ctrl_off = IOMUXC_GPR2,
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.en_mask = IMX6SX_GPR2_MQS_EN_MASK,
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.en_shift = IMX6SX_GPR2_MQS_EN_SHIFT,
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.rst_mask = IMX6SX_GPR2_MQS_SW_RST_MASK,
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.rst_shift = IMX6SX_GPR2_MQS_SW_RST_SHIFT,
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.osr_mask = IMX6SX_GPR2_MQS_OVERSAMPLE_MASK,
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.osr_shift = IMX6SX_GPR2_MQS_OVERSAMPLE_SHIFT,
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.div_mask = IMX6SX_GPR2_MQS_CLK_DIV_MASK,
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.div_shift = IMX6SX_GPR2_MQS_CLK_DIV_SHIFT,
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};
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static const struct of_device_id fsl_mqs_dt_ids[] = {
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static const struct of_device_id fsl_mqs_dt_ids[] = {
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{ .compatible = "fsl,imx8qm-mqs", },
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{ .compatible = "fsl,imx8qm-mqs", .data = &fsl_mqs_imx8qm_data },
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{ .compatible = "fsl,imx6sx-mqs", },
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{ .compatible = "fsl,imx6sx-mqs", .data = &fsl_mqs_imx6sx_data },
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{}
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{}
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};
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};
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MODULE_DEVICE_TABLE(of, fsl_mqs_dt_ids);
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MODULE_DEVICE_TABLE(of, fsl_mqs_dt_ids);
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