drm/amd/display: Source minimum HBlank support

[Why]
Some sink devices wish to have access to the minimum HBlank supported by
the ASIC.

[How]
Make the ASIC minimum HBlank available in Source Device information
address 0x340.

Signed-off-by: Ashley Thomas <Ashley.Thomas2@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Reviewed-by: Wenjing Liu <Wenjing.Liu@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Ashley Thomas 2020-10-01 00:16:05 -07:00 committed by Alex Deucher
parent e97978e812
commit 06722b37d1
2 changed files with 2 additions and 0 deletions

View file

@ -1761,6 +1761,7 @@ static bool dcn301_resource_construct(
dc->caps.i2c_speed_in_khz = 100;
dc->caps.i2c_speed_in_khz_hdcp = 5; /*1.4 w/a enabled by default*/
dc->caps.max_cursor_size = 256;
dc->caps.min_horizontal_blanking_period = 80;
dc->caps.dmdata_alloc_size = 2048;
dc->caps.max_slave_planes = 1;
dc->caps.is_apu = true;

View file

@ -1309,6 +1309,7 @@ static bool dcn302_resource_construct(
dc->caps.i2c_speed_in_khz = 100;
dc->caps.i2c_speed_in_khz_hdcp = 5; /*1.4 w/a applied by derfault*/
dc->caps.max_cursor_size = 256;
dc->caps.min_horizontal_blanking_period = 80;
dc->caps.dmdata_alloc_size = 2048;
dc->caps.max_slave_planes = 1;