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drm/amd/display: Source minimum HBlank support
[Why] Some sink devices wish to have access to the minimum HBlank supported by the ASIC. [How] Make the ASIC minimum HBlank available in Source Device information address 0x340. Signed-off-by: Ashley Thomas <Ashley.Thomas2@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Reviewed-by: Wenjing Liu <Wenjing.Liu@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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2 changed files with 2 additions and 0 deletions
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@ -1761,6 +1761,7 @@ static bool dcn301_resource_construct(
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dc->caps.i2c_speed_in_khz = 100;
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dc->caps.i2c_speed_in_khz_hdcp = 5; /*1.4 w/a enabled by default*/
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dc->caps.max_cursor_size = 256;
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dc->caps.min_horizontal_blanking_period = 80;
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dc->caps.dmdata_alloc_size = 2048;
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dc->caps.max_slave_planes = 1;
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dc->caps.is_apu = true;
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@ -1309,6 +1309,7 @@ static bool dcn302_resource_construct(
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dc->caps.i2c_speed_in_khz = 100;
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dc->caps.i2c_speed_in_khz_hdcp = 5; /*1.4 w/a applied by derfault*/
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dc->caps.max_cursor_size = 256;
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dc->caps.min_horizontal_blanking_period = 80;
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dc->caps.dmdata_alloc_size = 2048;
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dc->caps.max_slave_planes = 1;
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