Third Round of Renesas ARM Based SoC DT Updates for v3.16

r8a7791 (R-Car M2), r8a7779 (R-Car H1), r8a7778 (R-Car M1),
 r8a7740 (R-Mobile A1) and r8a73a4 (R-Mobile APE6) SoCs
 * Move interrupt-parent property to root node
 
 r8a7791 (R-Car M2) and r8a7790 (R-Car H2) SoCs
 * Add GPIO clocks
 
 r8a7791 (R-Car M2) based Henninger board
 * Add MSIOF0, QSPI and SDHI0/2 support
 * Specify EXTAL frequency
 
 r8a7779 (R-Car H1) based Marzen board
 * Set SMSC lan to use irq-push-pull
 
 r8a7740 (R-Mobile A1) SoC
 * Remove duplicate interrupt-parent property
 
 r8a7740 (R-Mobile A1) based Armadillo800 EVA board
 * Add Ethernet support
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Merge tag 'renesas-dt3-for-v3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt

Merge "Third Round of Renesas ARM Based SoC DT Updates for v3.16" from Simon
Horman:

r8a7791 (R-Car M2), r8a7779 (R-Car H1), r8a7778 (R-Car M1),
r8a7740 (R-Mobile A1) and r8a73a4 (R-Mobile APE6) SoCs
* Move interrupt-parent property to root node

r8a7791 (R-Car M2) and r8a7790 (R-Car H2) SoCs
* Add GPIO clocks

r8a7791 (R-Car M2) based Henninger board
* Add MSIOF0, QSPI and SDHI0/2 support
* Specify EXTAL frequency

r8a7779 (R-Car H1) based Marzen board
* Set SMSC lan to use irq-push-pull

r8a7740 (R-Mobile A1) SoC
* Remove duplicate interrupt-parent property

r8a7740 (R-Mobile A1) based Armadillo800 EVA board
* Add Ethernet support

* tag 'renesas-dt3-for-v3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  ARM: shmobile: r8a7740 dtsi: Remove duplicate interrupt-parent property
  ARM: shmobile: marzen-reference: Set SMSC lan to use irq-push-pull
  ARM: shmobile: r8a7791 dtsi: Add GPIO clocks
  ARM: shmobile: r8a7790 dtsi: Add GPIO clocks
  ARM: shmobile: dts: Move interrupt-parent property to root node
  ARM: shmobile: armadillo-reference dts: Add Ethernet support
  ARM: shmobile: r8a7740 dtsi: Add Ethernet support
  ARM: shmobile: henninger: add MSIOF0 DT support
  ARM: shmobile: henninger: add QSPI DT support
  ARM: shmobile: henninger: add SDHI0/2 DT support
  ARM: shmobile: henninger: specify EXTAL frequency

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2014-05-19 23:00:25 -07:00
commit 0673836c0b
9 changed files with 200 additions and 73 deletions

View file

@ -55,7 +55,6 @@ irqc0: interrupt-controller@e61c0000 {
#interrupt-cells = <2>;
interrupt-controller;
reg = <0 0xe61c0000 0 0x200>;
interrupt-parent = <&gic>;
interrupts = <0 0 IRQ_TYPE_LEVEL_HIGH>,
<0 1 IRQ_TYPE_LEVEL_HIGH>,
<0 2 IRQ_TYPE_LEVEL_HIGH>,
@ -95,7 +94,6 @@ irqc1: interrupt-controller@e61c0200 {
#interrupt-cells = <2>;
interrupt-controller;
reg = <0 0xe61c0200 0 0x200>;
interrupt-parent = <&gic>;
interrupts = <0 32 IRQ_TYPE_LEVEL_HIGH>,
<0 33 IRQ_TYPE_LEVEL_HIGH>,
<0 34 IRQ_TYPE_LEVEL_HIGH>,
@ -136,7 +134,6 @@ dmac: dma-multiplexer@0 {
dma0: dma-controller@e6700020 {
compatible = "renesas,shdma-r8a73a4";
reg = <0 0xe6700020 0 0x89e0>;
interrupt-parent = <&gic>;
interrupts = <0 220 IRQ_TYPE_LEVEL_HIGH
0 200 IRQ_TYPE_LEVEL_HIGH
0 201 IRQ_TYPE_LEVEL_HIGH
@ -171,7 +168,6 @@ thermal@e61f0000 {
compatible = "renesas,rcar-thermal";
reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>,
<0 0xe61f0200 0 0x38>, <0 0xe61f0300 0 0x38>;
interrupt-parent = <&gic>;
interrupts = <0 69 IRQ_TYPE_LEVEL_HIGH>;
};
@ -180,7 +176,6 @@ i2c0: i2c@e6500000 {
#size-cells = <0>;
compatible = "renesas,rmobile-iic";
reg = <0 0xe6500000 0 0x428>;
interrupt-parent = <&gic>;
interrupts = <0 174 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
@ -190,7 +185,6 @@ i2c1: i2c@e6510000 {
#size-cells = <0>;
compatible = "renesas,rmobile-iic";
reg = <0 0xe6510000 0 0x428>;
interrupt-parent = <&gic>;
interrupts = <0 175 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
@ -200,7 +194,6 @@ i2c2: i2c@e6520000 {
#size-cells = <0>;
compatible = "renesas,rmobile-iic";
reg = <0 0xe6520000 0 0x428>;
interrupt-parent = <&gic>;
interrupts = <0 176 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
@ -210,7 +203,6 @@ i2c3: i2c@e6530000 {
#size-cells = <0>;
compatible = "renesas,rmobile-iic";
reg = <0 0xe6530000 0 0x428>;
interrupt-parent = <&gic>;
interrupts = <0 177 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
@ -220,7 +212,6 @@ i2c4: i2c@e6540000 {
#size-cells = <0>;
compatible = "renesas,rmobile-iic";
reg = <0 0xe6540000 0 0x428>;
interrupt-parent = <&gic>;
interrupts = <0 178 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
@ -230,7 +221,6 @@ i2c5: i2c@e60b0000 {
#size-cells = <0>;
compatible = "renesas,rmobile-iic";
reg = <0 0xe60b0000 0 0x428>;
interrupt-parent = <&gic>;
interrupts = <0 179 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
@ -240,7 +230,6 @@ i2c6: i2c@e6550000 {
#size-cells = <0>;
compatible = "renesas,rmobile-iic";
reg = <0 0xe6550000 0 0x428>;
interrupt-parent = <&gic>;
interrupts = <0 184 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
@ -250,7 +239,6 @@ i2c7: i2c@e6560000 {
#size-cells = <0>;
compatible = "renesas,rmobile-iic";
reg = <0 0xe6560000 0 0x428>;
interrupt-parent = <&gic>;
interrupts = <0 185 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
@ -260,7 +248,6 @@ i2c8: i2c@e6570000 {
#size-cells = <0>;
compatible = "renesas,rmobile-iic";
reg = <0 0xe6570000 0 0x428>;
interrupt-parent = <&gic>;
interrupts = <0 173 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
@ -268,7 +255,6 @@ i2c8: i2c@e6570000 {
mmcif0: mmc@ee200000 {
compatible = "renesas,sh-mmcif";
reg = <0 0xee200000 0 0x80>;
interrupt-parent = <&gic>;
interrupts = <0 169 IRQ_TYPE_LEVEL_HIGH>;
reg-io-width = <4>;
status = "disabled";
@ -277,7 +263,6 @@ mmcif0: mmc@ee200000 {
mmcif1: mmc@ee220000 {
compatible = "renesas,sh-mmcif";
reg = <0 0xee220000 0 0x80>;
interrupt-parent = <&gic>;
interrupts = <0 170 IRQ_TYPE_LEVEL_HIGH>;
reg-io-width = <4>;
status = "disabled";
@ -309,7 +294,6 @@ pfc: pfc@e6050000 {
sdhi0: sd@ee100000 {
compatible = "renesas,sdhi-r8a73a4";
reg = <0 0xee100000 0 0x100>;
interrupt-parent = <&gic>;
interrupts = <0 165 IRQ_TYPE_LEVEL_HIGH>;
cap-sd-highspeed;
status = "disabled";
@ -318,7 +302,6 @@ sdhi0: sd@ee100000 {
sdhi1: sd@ee120000 {
compatible = "renesas,sdhi-r8a73a4";
reg = <0 0xee120000 0 0x100>;
interrupt-parent = <&gic>;
interrupts = <0 166 IRQ_TYPE_LEVEL_HIGH>;
cap-sd-highspeed;
status = "disabled";
@ -327,7 +310,6 @@ sdhi1: sd@ee120000 {
sdhi2: sd@ee140000 {
compatible = "renesas,sdhi-r8a73a4";
reg = <0 0xee140000 0 0x100>;
interrupt-parent = <&gic>;
interrupts = <0 167 IRQ_TYPE_LEVEL_HIGH>;
cap-sd-highspeed;
status = "disabled";

View file

@ -158,6 +158,18 @@ simple-audio-card,codec {
};
};
&ether {
pinctrl-0 = <&ether_pins>;
pinctrl-names = "default";
phy-handle = <&phy0>;
status = "ok";
phy0: ethernet-phy@0 {
reg = <0>;
};
};
&i2c0 {
status = "okay";
touchscreen@55 {
@ -189,6 +201,11 @@ &pfc {
pinctrl-0 = <&scifa1_pins>;
pinctrl-names = "default";
ether_pins: ether {
renesas,groups = "gether_mii", "gether_int";
renesas,function = "gether";
};
scifa1_pins: serial1 {
renesas,groups = "scifa1_data";
renesas,function = "scifa1";

View file

@ -14,6 +14,7 @@
/ {
compatible = "renesas,r8a7740";
interrupt-parent = <&gic>;
cpus {
#address-cells = <1>;
@ -48,7 +49,6 @@ irqpin0: irqpin@e6900000 {
<0xe6900020 1>,
<0xe6900040 1>,
<0xe6900060 1>;
interrupt-parent = <&gic>;
interrupts = <0 149 IRQ_TYPE_LEVEL_HIGH
0 149 IRQ_TYPE_LEVEL_HIGH
0 149 IRQ_TYPE_LEVEL_HIGH
@ -69,7 +69,6 @@ irqpin1: irqpin@e6900004 {
<0xe6900024 1>,
<0xe6900044 1>,
<0xe6900064 1>;
interrupt-parent = <&gic>;
interrupts = <0 149 IRQ_TYPE_LEVEL_HIGH
0 149 IRQ_TYPE_LEVEL_HIGH
0 149 IRQ_TYPE_LEVEL_HIGH
@ -90,7 +89,6 @@ irqpin2: irqpin@e6900008 {
<0xe6900028 1>,
<0xe6900048 1>,
<0xe6900068 1>;
interrupt-parent = <&gic>;
interrupts = <0 149 IRQ_TYPE_LEVEL_HIGH
0 149 IRQ_TYPE_LEVEL_HIGH
0 149 IRQ_TYPE_LEVEL_HIGH
@ -111,7 +109,6 @@ irqpin3: irqpin@e690000c {
<0xe690002c 1>,
<0xe690004c 1>,
<0xe690006c 1>;
interrupt-parent = <&gic>;
interrupts = <0 149 IRQ_TYPE_LEVEL_HIGH
0 149 IRQ_TYPE_LEVEL_HIGH
0 149 IRQ_TYPE_LEVEL_HIGH
@ -122,12 +119,23 @@ irqpin3: irqpin@e690000c {
0 149 IRQ_TYPE_LEVEL_HIGH>;
};
ether: ethernet@e9a00000 {
compatible = "renesas,gether-r8a7740";
reg = <0xe9a00000 0x800>,
<0xe9a01800 0x800>;
interrupts = <0 110 IRQ_TYPE_LEVEL_HIGH>;
/* clocks = <&mstp3_clks R8A7740_CLK_GETHER>; */
phy-mode = "mii";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
i2c0: i2c@fff20000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,iic-r8a7740", "renesas,rmobile-iic";
reg = <0xfff20000 0x425>;
interrupt-parent = <&gic>;
interrupts = <0 201 IRQ_TYPE_LEVEL_HIGH
0 202 IRQ_TYPE_LEVEL_HIGH
0 203 IRQ_TYPE_LEVEL_HIGH
@ -140,7 +148,6 @@ i2c1: i2c@e6c20000 {
#size-cells = <0>;
compatible = "renesas,iic-r8a7740", "renesas,rmobile-iic";
reg = <0xe6c20000 0x425>;
interrupt-parent = <&gic>;
interrupts = <0 70 IRQ_TYPE_LEVEL_HIGH
0 71 IRQ_TYPE_LEVEL_HIGH
0 72 IRQ_TYPE_LEVEL_HIGH
@ -175,7 +182,6 @@ tpu: pwm@e6600000 {
mmcif0: mmc@e6bd0000 {
compatible = "renesas,mmcif-r8a7740", "renesas,sh-mmcif";
reg = <0xe6bd0000 0x100>;
interrupt-parent = <&gic>;
interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH
0 57 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
@ -184,7 +190,6 @@ mmcif0: mmc@e6bd0000 {
sdhi0: sd@e6850000 {
compatible = "renesas,sdhi-r8a7740";
reg = <0xe6850000 0x100>;
interrupt-parent = <&gic>;
interrupts = <0 117 IRQ_TYPE_LEVEL_HIGH
0 118 IRQ_TYPE_LEVEL_HIGH
0 119 IRQ_TYPE_LEVEL_HIGH>;
@ -196,7 +201,6 @@ sdhi0: sd@e6850000 {
sdhi1: sd@e6860000 {
compatible = "renesas,sdhi-r8a7740";
reg = <0xe6860000 0x100>;
interrupt-parent = <&gic>;
interrupts = <0 121 IRQ_TYPE_LEVEL_HIGH
0 122 IRQ_TYPE_LEVEL_HIGH
0 123 IRQ_TYPE_LEVEL_HIGH>;
@ -208,7 +212,6 @@ sdhi1: sd@e6860000 {
sdhi2: sd@e6870000 {
compatible = "renesas,sdhi-r8a7740";
reg = <0xe6870000 0x100>;
interrupt-parent = <&gic>;
interrupts = <0 125 IRQ_TYPE_LEVEL_HIGH
0 126 IRQ_TYPE_LEVEL_HIGH
0 127 IRQ_TYPE_LEVEL_HIGH>;
@ -221,7 +224,6 @@ sh_fsi2: sound@fe1f0000 {
#sound-dai-cells = <1>;
compatible = "renesas,fsi2-r8a7740", "renesas,sh_fsi2";
reg = <0xfe1f0000 0x400>;
interrupt-parent = <&gic>;
interrupts = <0 9 0x4>;
status = "disabled";
};

View file

@ -20,6 +20,7 @@
/ {
compatible = "renesas,r8a7778";
interrupt-parent = <&gic>;
cpus {
cpu@0 {
@ -52,7 +53,6 @@ irqpin: irqpin@fe78001c {
<0xfe780024 4>,
<0xfe780044 4>,
<0xfe780064 4>;
interrupt-parent = <&gic>;
interrupts = <0 27 IRQ_TYPE_LEVEL_HIGH
0 28 IRQ_TYPE_LEVEL_HIGH
0 29 IRQ_TYPE_LEVEL_HIGH
@ -63,7 +63,6 @@ irqpin: irqpin@fe78001c {
gpio0: gpio@ffc40000 {
compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
reg = <0xffc40000 0x2c>;
interrupt-parent = <&gic>;
interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <2>;
gpio-controller;
@ -75,7 +74,6 @@ gpio0: gpio@ffc40000 {
gpio1: gpio@ffc41000 {
compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
reg = <0xffc41000 0x2c>;
interrupt-parent = <&gic>;
interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <2>;
gpio-controller;
@ -87,7 +85,6 @@ gpio1: gpio@ffc41000 {
gpio2: gpio@ffc42000 {
compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
reg = <0xffc42000 0x2c>;
interrupt-parent = <&gic>;
interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <2>;
gpio-controller;
@ -99,7 +96,6 @@ gpio2: gpio@ffc42000 {
gpio3: gpio@ffc43000 {
compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
reg = <0xffc43000 0x2c>;
interrupt-parent = <&gic>;
interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <2>;
gpio-controller;
@ -111,7 +107,6 @@ gpio3: gpio@ffc43000 {
gpio4: gpio@ffc44000 {
compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
reg = <0xffc44000 0x2c>;
interrupt-parent = <&gic>;
interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <2>;
gpio-controller;
@ -130,7 +125,6 @@ i2c0: i2c@ffc70000 {
#size-cells = <0>;
compatible = "renesas,i2c-r8a7778";
reg = <0xffc70000 0x1000>;
interrupt-parent = <&gic>;
interrupts = <0 67 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
@ -140,7 +134,6 @@ i2c1: i2c@ffc71000 {
#size-cells = <0>;
compatible = "renesas,i2c-r8a7778";
reg = <0xffc71000 0x1000>;
interrupt-parent = <&gic>;
interrupts = <0 78 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
@ -150,7 +143,6 @@ i2c2: i2c@ffc72000 {
#size-cells = <0>;
compatible = "renesas,i2c-r8a7778";
reg = <0xffc72000 0x1000>;
interrupt-parent = <&gic>;
interrupts = <0 76 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
@ -160,7 +152,6 @@ i2c3: i2c@ffc73000 {
#size-cells = <0>;
compatible = "renesas,i2c-r8a7778";
reg = <0xffc73000 0x1000>;
interrupt-parent = <&gic>;
interrupts = <0 77 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
@ -168,7 +159,6 @@ i2c3: i2c@ffc73000 {
mmcif: mmc@ffe4e000 {
compatible = "renesas,sh-mmcif";
reg = <0xffe4e000 0x100>;
interrupt-parent = <&gic>;
interrupts = <0 61 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
@ -176,7 +166,6 @@ mmcif: mmc@ffe4e000 {
sdhi0: sd@ffe4c000 {
compatible = "renesas,sdhi-r8a7778";
reg = <0xffe4c000 0x100>;
interrupt-parent = <&gic>;
interrupts = <0 87 IRQ_TYPE_LEVEL_HIGH>;
cap-sd-highspeed;
cap-sdio-irq;
@ -186,7 +175,6 @@ sdhi0: sd@ffe4c000 {
sdhi1: sd@ffe4d000 {
compatible = "renesas,sdhi-r8a7778";
reg = <0xffe4d000 0x100>;
interrupt-parent = <&gic>;
interrupts = <0 88 IRQ_TYPE_LEVEL_HIGH>;
cap-sd-highspeed;
cap-sdio-irq;
@ -196,7 +184,6 @@ sdhi1: sd@ffe4d000 {
sdhi2: sd@ffe4f000 {
compatible = "renesas,sdhi-r8a7778";
reg = <0xffe4f000 0x100>;
interrupt-parent = <&gic>;
interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>;
cap-sd-highspeed;
cap-sdio-irq;
@ -206,7 +193,6 @@ sdhi2: sd@ffe4f000 {
hspi0: spi@fffc7000 {
compatible = "renesas,hspi-r8a7778", "renesas,hspi";
reg = <0xfffc7000 0x18>;
interrupt-parent = <&gic>;
interrupts = <0 63 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
@ -216,7 +202,6 @@ hspi0: spi@fffc7000 {
hspi1: spi@fffc8000 {
compatible = "renesas,hspi-r8a7778", "renesas,hspi";
reg = <0xfffc8000 0x18>;
interrupt-parent = <&gic>;
interrupts = <0 84 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
@ -226,7 +211,6 @@ hspi1: spi@fffc8000 {
hspi2: spi@fffc6000 {
compatible = "renesas,hspi-r8a7778", "renesas,hspi";
reg = <0xfffc6000 0x18>;
interrupt-parent = <&gic>;
interrupts = <0 85 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;

View file

@ -45,6 +45,7 @@ lan0@18000000 {
phy-mode = "mii";
interrupt-parent = <&irqpin0>;
interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
smsc,irq-push-pull;
reg-io-width = <4>;
vddvario-supply = <&fixedregulator3v3>;
vdd33a-supply = <&fixedregulator3v3>;

View file

@ -15,6 +15,7 @@
/ {
compatible = "renesas,r8a7779";
interrupt-parent = <&gic>;
cpus {
#address-cells = <1>;
@ -59,7 +60,6 @@ gic: interrupt-controller@f0001000 {
gpio0: gpio@ffc40000 {
compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
reg = <0xffc40000 0x2c>;
interrupt-parent = <&gic>;
interrupts = <0 141 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <2>;
gpio-controller;
@ -71,7 +71,6 @@ gpio0: gpio@ffc40000 {
gpio1: gpio@ffc41000 {
compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
reg = <0xffc41000 0x2c>;
interrupt-parent = <&gic>;
interrupts = <0 142 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <2>;
gpio-controller;
@ -83,7 +82,6 @@ gpio1: gpio@ffc41000 {
gpio2: gpio@ffc42000 {
compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
reg = <0xffc42000 0x2c>;
interrupt-parent = <&gic>;
interrupts = <0 143 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <2>;
gpio-controller;
@ -95,7 +93,6 @@ gpio2: gpio@ffc42000 {
gpio3: gpio@ffc43000 {
compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
reg = <0xffc43000 0x2c>;
interrupt-parent = <&gic>;
interrupts = <0 144 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <2>;
gpio-controller;
@ -107,7 +104,6 @@ gpio3: gpio@ffc43000 {
gpio4: gpio@ffc44000 {
compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
reg = <0xffc44000 0x2c>;
interrupt-parent = <&gic>;
interrupts = <0 145 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <2>;
gpio-controller;
@ -119,7 +115,6 @@ gpio4: gpio@ffc44000 {
gpio5: gpio@ffc45000 {
compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
reg = <0xffc45000 0x2c>;
interrupt-parent = <&gic>;
interrupts = <0 146 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <2>;
gpio-controller;
@ -131,7 +126,6 @@ gpio5: gpio@ffc45000 {
gpio6: gpio@ffc46000 {
compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
reg = <0xffc46000 0x2c>;
interrupt-parent = <&gic>;
interrupts = <0 147 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <2>;
gpio-controller;
@ -150,7 +144,6 @@ irqpin0: irqpin@fe780010 {
<0xfe780024 4>,
<0xfe780044 4>,
<0xfe780064 4>;
interrupt-parent = <&gic>;
interrupts = <0 27 IRQ_TYPE_LEVEL_HIGH
0 28 IRQ_TYPE_LEVEL_HIGH
0 29 IRQ_TYPE_LEVEL_HIGH
@ -163,7 +156,6 @@ i2c0: i2c@ffc70000 {
#size-cells = <0>;
compatible = "renesas,i2c-r8a7779";
reg = <0xffc70000 0x1000>;
interrupt-parent = <&gic>;
interrupts = <0 79 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
@ -173,7 +165,6 @@ i2c1: i2c@ffc71000 {
#size-cells = <0>;
compatible = "renesas,i2c-r8a7779";
reg = <0xffc71000 0x1000>;
interrupt-parent = <&gic>;
interrupts = <0 82 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
@ -183,7 +174,6 @@ i2c2: i2c@ffc72000 {
#size-cells = <0>;
compatible = "renesas,i2c-r8a7779";
reg = <0xffc72000 0x1000>;
interrupt-parent = <&gic>;
interrupts = <0 80 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
@ -193,7 +183,6 @@ i2c3: i2c@ffc73000 {
#size-cells = <0>;
compatible = "renesas,i2c-r8a7779";
reg = <0xffc73000 0x1000>;
interrupt-parent = <&gic>;
interrupts = <0 81 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
@ -211,14 +200,12 @@ thermal@ffc48000 {
sata: sata@fc600000 {
compatible = "renesas,rcar-sata";
reg = <0xfc600000 0x2000>;
interrupt-parent = <&gic>;
interrupts = <0 100 IRQ_TYPE_LEVEL_HIGH>;
};
sdhi0: sd@ffe4c000 {
compatible = "renesas,sdhi-r8a7779";
reg = <0xffe4c000 0x100>;
interrupt-parent = <&gic>;
interrupts = <0 104 IRQ_TYPE_LEVEL_HIGH>;
cap-sd-highspeed;
cap-sdio-irq;
@ -228,7 +215,6 @@ sdhi0: sd@ffe4c000 {
sdhi1: sd@ffe4d000 {
compatible = "renesas,sdhi-r8a7779";
reg = <0xffe4d000 0x100>;
interrupt-parent = <&gic>;
interrupts = <0 105 IRQ_TYPE_LEVEL_HIGH>;
cap-sd-highspeed;
cap-sdio-irq;
@ -238,7 +224,6 @@ sdhi1: sd@ffe4d000 {
sdhi2: sd@ffe4e000 {
compatible = "renesas,sdhi-r8a7779";
reg = <0xffe4e000 0x100>;
interrupt-parent = <&gic>;
interrupts = <0 107 IRQ_TYPE_LEVEL_HIGH>;
cap-sd-highspeed;
cap-sdio-irq;
@ -248,7 +233,6 @@ sdhi2: sd@ffe4e000 {
sdhi3: sd@ffe4f000 {
compatible = "renesas,sdhi-r8a7779";
reg = <0xffe4f000 0x100>;
interrupt-parent = <&gic>;
interrupts = <0 106 IRQ_TYPE_LEVEL_HIGH>;
cap-sd-highspeed;
cap-sdio-irq;
@ -258,7 +242,6 @@ sdhi3: sd@ffe4f000 {
hspi0: spi@fffc7000 {
compatible = "renesas,hspi-r8a7779", "renesas,hspi";
reg = <0xfffc7000 0x18>;
interrupt-parent = <&gic>;
interrupts = <0 73 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
@ -268,7 +251,6 @@ hspi0: spi@fffc7000 {
hspi1: spi@fffc8000 {
compatible = "renesas,hspi-r8a7779", "renesas,hspi";
reg = <0xfffc8000 0x18>;
interrupt-parent = <&gic>;
interrupts = <0 74 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
@ -278,7 +260,6 @@ hspi1: spi@fffc8000 {
hspi2: spi@fffc6000 {
compatible = "renesas,hspi-r8a7779", "renesas,hspi";
reg = <0xfffc6000 0x18>;
interrupt-parent = <&gic>;
interrupts = <0 75 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;

View file

@ -117,6 +117,7 @@ gpio0: gpio@e6050000 {
gpio-ranges = <&pfc 0 0 32>;
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&mstp9_clks R8A7790_CLK_GPIO0>;
};
gpio1: gpio@e6051000 {
@ -128,6 +129,7 @@ gpio1: gpio@e6051000 {
gpio-ranges = <&pfc 0 32 32>;
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&mstp9_clks R8A7790_CLK_GPIO1>;
};
gpio2: gpio@e6052000 {
@ -139,6 +141,7 @@ gpio2: gpio@e6052000 {
gpio-ranges = <&pfc 0 64 32>;
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&mstp9_clks R8A7790_CLK_GPIO2>;
};
gpio3: gpio@e6053000 {
@ -150,6 +153,7 @@ gpio3: gpio@e6053000 {
gpio-ranges = <&pfc 0 96 32>;
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&mstp9_clks R8A7790_CLK_GPIO3>;
};
gpio4: gpio@e6054000 {
@ -161,6 +165,7 @@ gpio4: gpio@e6054000 {
gpio-ranges = <&pfc 0 128 32>;
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&mstp9_clks R8A7790_CLK_GPIO4>;
};
gpio5: gpio@e6055000 {
@ -172,6 +177,7 @@ gpio5: gpio@e6055000 {
gpio-ranges = <&pfc 0 160 32>;
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&mstp9_clks R8A7790_CLK_GPIO5>;
};
thermal@e61f0000 {
@ -802,14 +808,19 @@ R8A7790_CLK_SATA0
mstp9_clks: mstp9_clks@e6150994 {
compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
reg = <0 0xe6150994 0 4>, <0 0xe61509a4 0 4>;
clocks = <&p_clk>, <&p_clk>, <&cpg_clocks R8A7790_CLK_QSPI>, <&cp_clk>,
clocks = <&cp_clk>, <&cp_clk>, <&cp_clk>,
<&cp_clk>, <&cp_clk>, <&cp_clk>,
<&p_clk>, <&p_clk>, <&cpg_clocks R8A7790_CLK_QSPI>, <&cp_clk>,
<&hp_clk>, <&hp_clk>, <&hp_clk>, <&hp_clk>;
#clock-cells = <1>;
renesas,clock-indices = <
R8A7790_CLK_GPIO5 R8A7790_CLK_GPIO4 R8A7790_CLK_GPIO3
R8A7790_CLK_GPIO2 R8A7790_CLK_GPIO1 R8A7790_CLK_GPIO0
R8A7790_CLK_RCAN1 R8A7790_CLK_RCAN0 R8A7790_CLK_QSPI_MOD R8A7790_CLK_IICDVFS
R8A7790_CLK_I2C3 R8A7790_CLK_I2C2 R8A7790_CLK_I2C1 R8A7790_CLK_I2C0
>;
clock-output-names =
"gpio5", "gpio4", "gpio3", "gpio2", "gpio1", "gpio0",
"rcan1", "rcan0", "qspi_mod", "iic3",
"i2c3", "i2c2", "i2c1", "i2c0";
};

View file

@ -11,6 +11,7 @@
/dts-v1/;
#include "r8a7791.dtsi"
#include <dt-bindings/gpio/gpio.h>
/ {
model = "Henninger";
@ -33,6 +34,54 @@ memory@200000000 {
device_type = "memory";
reg = <2 0x00000000 0 0x40000000>;
};
vcc_sdhi0: regulator@0 {
compatible = "regulator-fixed";
regulator-name = "SDHI0 Vcc";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
vccq_sdhi0: regulator@1 {
compatible = "regulator-gpio";
regulator-name = "SDHI0 VccQ";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
gpios = <&gpio2 12 GPIO_ACTIVE_HIGH>;
gpios-states = <1>;
states = <3300000 1
1800000 0>;
};
vcc_sdhi2: regulator@2 {
compatible = "regulator-fixed";
regulator-name = "SDHI2 Vcc";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
vccq_sdhi2: regulator@3 {
compatible = "regulator-gpio";
regulator-name = "SDHI2 VccQ";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
gpios = <&gpio2 26 GPIO_ACTIVE_HIGH>;
gpios-states = <1>;
states = <3300000 1
1800000 0>;
};
};
&extal_clk {
clock-frequency = <20000000>;
};
&pfc {
@ -50,6 +99,27 @@ phy1_pins: phy1 {
renesas,groups = "intc_irq0";
renesas,function = "intc";
};
sdhi0_pins: sd0 {
renesas,groups = "sdhi0_data4", "sdhi0_ctrl";
renesas,function = "sdhi0";
};
sdhi2_pins: sd2 {
renesas,groups = "sdhi2_data4", "sdhi2_ctrl";
renesas,function = "sdhi2";
};
qspi_pins: spi0 {
renesas,groups = "qspi_ctrl", "qspi_data4";
renesas,function = "qspi";
};
msiof0_pins: spi1 {
renesas,groups = "msiof0_clk", "msiof0_sync", "msiof0_rx",
"msiof0_tx";
renesas,function = "msiof0";
};
};
&scif0 {
@ -78,3 +148,72 @@ phy1: ethernet-phy@1 {
&sata0 {
status = "okay";
};
&sdhi0 {
pinctrl-0 = <&sdhi0_pins>;
pinctrl-names = "default";
vmmc-supply = <&vcc_sdhi0>;
vqmmc-supply = <&vccq_sdhi0>;
cd-gpios = <&gpio6 6 GPIO_ACTIVE_LOW>;
wp-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>;
status = "okay";
};
&sdhi2 {
pinctrl-0 = <&sdhi2_pins>;
pinctrl-names = "default";
vmmc-supply = <&vcc_sdhi2>;
vqmmc-supply = <&vccq_sdhi2>;
cd-gpios = <&gpio6 22 GPIO_ACTIVE_LOW>;
status = "okay";
};
&qspi {
pinctrl-0 = <&qspi_pins>;
pinctrl-names = "default";
status = "okay";
flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spansion,s25fl512s";
reg = <0>;
spi-max-frequency = <30000000>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;
m25p,fast-read;
partition@0 {
label = "loader_prg";
reg = <0x00000000 0x00040000>;
read-only;
};
partition@40000 {
label = "user_prg";
reg = <0x00040000 0x00400000>;
read-only;
};
partition@440000 {
label = "flash_fs";
reg = <0x00440000 0x03bc0000>;
};
};
};
&msiof0 {
pinctrl-0 = <&msiof0_pins>;
pinctrl-names = "default";
status = "okay";
pmic@0 {
compatible = "renesas,r2a11302ft";
reg = <0>;
spi-max-frequency = <6000000>;
spi-cpol;
spi-cpha;
};
};

View file

@ -76,6 +76,7 @@ gpio0: gpio@e6050000 {
gpio-ranges = <&pfc 0 0 32>;
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&mstp9_clks R8A7791_CLK_GPIO0>;
};
gpio1: gpio@e6051000 {
@ -87,6 +88,7 @@ gpio1: gpio@e6051000 {
gpio-ranges = <&pfc 0 32 32>;
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&mstp9_clks R8A7791_CLK_GPIO1>;
};
gpio2: gpio@e6052000 {
@ -98,6 +100,7 @@ gpio2: gpio@e6052000 {
gpio-ranges = <&pfc 0 64 32>;
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&mstp9_clks R8A7791_CLK_GPIO2>;
};
gpio3: gpio@e6053000 {
@ -109,6 +112,7 @@ gpio3: gpio@e6053000 {
gpio-ranges = <&pfc 0 96 32>;
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&mstp9_clks R8A7791_CLK_GPIO3>;
};
gpio4: gpio@e6054000 {
@ -120,6 +124,7 @@ gpio4: gpio@e6054000 {
gpio-ranges = <&pfc 0 128 32>;
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&mstp9_clks R8A7791_CLK_GPIO4>;
};
gpio5: gpio@e6055000 {
@ -131,6 +136,7 @@ gpio5: gpio@e6055000 {
gpio-ranges = <&pfc 0 160 32>;
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&mstp9_clks R8A7791_CLK_GPIO5>;
};
gpio6: gpio@e6055400 {
@ -142,6 +148,7 @@ gpio6: gpio@e6055400 {
gpio-ranges = <&pfc 0 192 32>;
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&mstp9_clks R8A7791_CLK_GPIO6>;
};
gpio7: gpio@e6055800 {
@ -153,6 +160,7 @@ gpio7: gpio@e6055800 {
gpio-ranges = <&pfc 0 224 26>;
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&mstp9_clks R8A7791_CLK_GPIO7>;
};
thermal@e61f0000 {
@ -289,7 +297,6 @@ pfc: pfc@e6060000 {
sdhi0: sd@ee100000 {
compatible = "renesas,sdhi-r8a7791";
reg = <0 0xee100000 0 0x200>;
interrupt-parent = <&gic>;
interrupts = <0 165 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp3_clks R8A7791_CLK_SDHI0>;
status = "disabled";
@ -298,7 +305,6 @@ sdhi0: sd@ee100000 {
sdhi1: sd@ee140000 {
compatible = "renesas,sdhi-r8a7791";
reg = <0 0xee140000 0 0x100>;
interrupt-parent = <&gic>;
interrupts = <0 167 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp3_clks R8A7791_CLK_SDHI1>;
status = "disabled";
@ -307,7 +313,6 @@ sdhi1: sd@ee140000 {
sdhi2: sd@ee160000 {
compatible = "renesas,sdhi-r8a7791";
reg = <0 0xee160000 0 0x100>;
interrupt-parent = <&gic>;
interrupts = <0 168 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp3_clks R8A7791_CLK_SDHI2>;
status = "disabled";
@ -805,18 +810,23 @@ R8A7791_CLK_ETHER R8A7791_CLK_SATA1 R8A7791_CLK_SATA0
mstp9_clks: mstp9_clks@e6150994 {
compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
reg = <0 0xe6150994 0 4>, <0 0xe61509a4 0 4>;
clocks = <&p_clk>, <&p_clk>, <&cpg_clocks R8A7791_CLK_QSPI>, <&hp_clk>,
clocks = <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>,
<&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>,
<&p_clk>, <&p_clk>, <&cpg_clocks R8A7791_CLK_QSPI>, <&hp_clk>,
<&cp_clk>, <&hp_clk>, <&hp_clk>, <&hp_clk>,
<&hp_clk>, <&hp_clk>;
#clock-cells = <1>;
renesas,clock-indices = <
R8A7791_CLK_GPIO7 R8A7791_CLK_GPIO6 R8A7791_CLK_GPIO5 R8A7791_CLK_GPIO4
R8A7791_CLK_GPIO3 R8A7791_CLK_GPIO2 R8A7791_CLK_GPIO1 R8A7791_CLK_GPIO0
R8A7791_CLK_RCAN1 R8A7791_CLK_RCAN0 R8A7791_CLK_QSPI_MOD R8A7791_CLK_I2C5
R8A7791_CLK_IICDVFS R8A7791_CLK_I2C4 R8A7791_CLK_I2C3 R8A7791_CLK_I2C2
R8A7791_CLK_I2C1 R8A7791_CLK_I2C0
>;
clock-output-names =
"rcan1", "rcan0", "qspi_mod", "i2c5", "i2c6", "i2c4", "i2c3",
"i2c2", "i2c1", "i2c0";
"gpio7", "gpio6", "gpio5", "gpio4", "gpio3", "gpio2", "gpio1", "gpio0",
"rcan1", "rcan0", "qspi_mod", "i2c5", "i2c6", "i2c4", "i2c3", "i2c2",
"i2c1", "i2c0";
};
mstp11_clks: mstp11_clks@e615099c {
compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";