tools headers UAPI: Sync drm/i915_drm.h with the kernel sources
To pick up the changes in:e5e32171a2("drm/i915/guc: Connect UAPI to GuC multi-lrc interface")9409eb3594("drm/i915: Expose logical engine instance to user")ea673f17ab("drm/i915/uapi: Add comment clarifying purpose of I915_TILING_* values")d3ac8d4216("drm/i915/pxp: interfaces for using protected objects")cbbd3764b2("drm/i915/pxp: Create the arbitrary session after boot") That don't add any new ioctl, so no changes in tooling. This silences this perf build warning: Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h' diff -u tools/include/uapi/drm/i915_drm.h include/uapi/drm/i915_drm.h Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Cc: Huang, Sean Z <sean.z.huang@intel.com> Cc: John Harrison <John.C.Harrison@Intel.com> Cc: Matthew Brost <matthew.brost@intel.com> Cc: Matt Roper <matthew.d.roper@intel.com> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
This commit is contained in:
Arnaldo Carvalho de Melo
parent
37057e743c
commit
06cf00c48f
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@ -1522,6 +1522,12 @@ struct drm_i915_gem_caching {
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#define I915_TILING_NONE 0
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#define I915_TILING_X 1
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#define I915_TILING_Y 2
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/*
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* Do not add new tiling types here. The I915_TILING_* values are for
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* de-tiling fence registers that no longer exist on modern platforms. Although
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* the hardware may support new types of tiling in general (e.g., Tile4), we
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* do not need to add them to the uapi that is specific to now-defunct ioctls.
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*/
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#define I915_TILING_LAST I915_TILING_Y
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#define I915_BIT_6_SWIZZLE_NONE 0
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@ -1824,6 +1830,7 @@ struct drm_i915_gem_context_param {
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* Extensions:
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* i915_context_engines_load_balance (I915_CONTEXT_ENGINES_EXT_LOAD_BALANCE)
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* i915_context_engines_bond (I915_CONTEXT_ENGINES_EXT_BOND)
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* i915_context_engines_parallel_submit (I915_CONTEXT_ENGINES_EXT_PARALLEL_SUBMIT)
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*/
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#define I915_CONTEXT_PARAM_ENGINES 0xa
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@ -1846,6 +1853,55 @@ struct drm_i915_gem_context_param {
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* attempted to use it, never re-use this context param number.
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*/
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#define I915_CONTEXT_PARAM_RINGSIZE 0xc
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/*
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* I915_CONTEXT_PARAM_PROTECTED_CONTENT:
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*
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* Mark that the context makes use of protected content, which will result
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* in the context being invalidated when the protected content session is.
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* Given that the protected content session is killed on suspend, the device
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* is kept awake for the lifetime of a protected context, so the user should
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* make sure to dispose of them once done.
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* This flag can only be set at context creation time and, when set to true,
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* must be preceded by an explicit setting of I915_CONTEXT_PARAM_RECOVERABLE
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* to false. This flag can't be set to true in conjunction with setting the
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* I915_CONTEXT_PARAM_BANNABLE flag to false. Creation example:
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*
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* .. code-block:: C
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*
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* struct drm_i915_gem_context_create_ext_setparam p_protected = {
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* .base = {
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* .name = I915_CONTEXT_CREATE_EXT_SETPARAM,
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* },
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* .param = {
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* .param = I915_CONTEXT_PARAM_PROTECTED_CONTENT,
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* .value = 1,
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* }
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* };
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* struct drm_i915_gem_context_create_ext_setparam p_norecover = {
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* .base = {
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* .name = I915_CONTEXT_CREATE_EXT_SETPARAM,
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* .next_extension = to_user_pointer(&p_protected),
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* },
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* .param = {
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* .param = I915_CONTEXT_PARAM_RECOVERABLE,
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* .value = 0,
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* }
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* };
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* struct drm_i915_gem_context_create_ext create = {
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* .flags = I915_CONTEXT_CREATE_FLAGS_USE_EXTENSIONS,
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* .extensions = to_user_pointer(&p_norecover);
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* };
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*
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* ctx_id = gem_context_create_ext(drm_fd, &create);
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*
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* In addition to the normal failure cases, setting this flag during context
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* creation can result in the following errors:
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*
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* -ENODEV: feature not available
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* -EPERM: trying to mark a recoverable or not bannable context as protected
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*/
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#define I915_CONTEXT_PARAM_PROTECTED_CONTENT 0xd
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/* Must be kept compact -- no holes and well documented */
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__u64 value;
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@ -2049,6 +2105,135 @@ struct i915_context_engines_bond {
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struct i915_engine_class_instance engines[N__]; \
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} __attribute__((packed)) name__
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/**
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* struct i915_context_engines_parallel_submit - Configure engine for
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* parallel submission.
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*
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* Setup a slot in the context engine map to allow multiple BBs to be submitted
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* in a single execbuf IOCTL. Those BBs will then be scheduled to run on the GPU
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* in parallel. Multiple hardware contexts are created internally in the i915 to
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* run these BBs. Once a slot is configured for N BBs only N BBs can be
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* submitted in each execbuf IOCTL and this is implicit behavior e.g. The user
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* doesn't tell the execbuf IOCTL there are N BBs, the execbuf IOCTL knows how
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* many BBs there are based on the slot's configuration. The N BBs are the last
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* N buffer objects or first N if I915_EXEC_BATCH_FIRST is set.
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*
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* The default placement behavior is to create implicit bonds between each
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* context if each context maps to more than 1 physical engine (e.g. context is
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* a virtual engine). Also we only allow contexts of same engine class and these
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* contexts must be in logically contiguous order. Examples of the placement
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* behavior are described below. Lastly, the default is to not allow BBs to be
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* preempted mid-batch. Rather insert coordinated preemption points on all
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* hardware contexts between each set of BBs. Flags could be added in the future
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* to change both of these default behaviors.
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*
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* Returns -EINVAL if hardware context placement configuration is invalid or if
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* the placement configuration isn't supported on the platform / submission
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* interface.
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* Returns -ENODEV if extension isn't supported on the platform / submission
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* interface.
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*
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* .. code-block:: none
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*
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* Examples syntax:
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* CS[X] = generic engine of same class, logical instance X
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* INVALID = I915_ENGINE_CLASS_INVALID, I915_ENGINE_CLASS_INVALID_NONE
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*
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* Example 1 pseudo code:
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* set_engines(INVALID)
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* set_parallel(engine_index=0, width=2, num_siblings=1,
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* engines=CS[0],CS[1])
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*
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* Results in the following valid placement:
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* CS[0], CS[1]
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*
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* Example 2 pseudo code:
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* set_engines(INVALID)
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* set_parallel(engine_index=0, width=2, num_siblings=2,
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* engines=CS[0],CS[2],CS[1],CS[3])
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*
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* Results in the following valid placements:
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* CS[0], CS[1]
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* CS[2], CS[3]
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*
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* This can be thought of as two virtual engines, each containing two
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* engines thereby making a 2D array. However, there are bonds tying the
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* entries together and placing restrictions on how they can be scheduled.
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* Specifically, the scheduler can choose only vertical columns from the 2D
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* array. That is, CS[0] is bonded to CS[1] and CS[2] to CS[3]. So if the
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* scheduler wants to submit to CS[0], it must also choose CS[1] and vice
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* versa. Same for CS[2] requires also using CS[3].
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* VE[0] = CS[0], CS[2]
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* VE[1] = CS[1], CS[3]
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*
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* Example 3 pseudo code:
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* set_engines(INVALID)
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* set_parallel(engine_index=0, width=2, num_siblings=2,
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* engines=CS[0],CS[1],CS[1],CS[3])
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*
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* Results in the following valid and invalid placements:
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* CS[0], CS[1]
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* CS[1], CS[3] - Not logically contiguous, return -EINVAL
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*/
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struct i915_context_engines_parallel_submit {
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/**
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* @base: base user extension.
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*/
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struct i915_user_extension base;
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/**
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* @engine_index: slot for parallel engine
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*/
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__u16 engine_index;
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/**
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* @width: number of contexts per parallel engine or in other words the
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* number of batches in each submission
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*/
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__u16 width;
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/**
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* @num_siblings: number of siblings per context or in other words the
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* number of possible placements for each submission
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*/
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__u16 num_siblings;
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/**
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* @mbz16: reserved for future use; must be zero
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*/
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__u16 mbz16;
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/**
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* @flags: all undefined flags must be zero, currently not defined flags
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*/
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__u64 flags;
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/**
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* @mbz64: reserved for future use; must be zero
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*/
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__u64 mbz64[3];
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/**
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* @engines: 2-d array of engine instances to configure parallel engine
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*
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* length = width (i) * num_siblings (j)
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* index = j + i * num_siblings
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*/
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struct i915_engine_class_instance engines[0];
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} __packed;
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#define I915_DEFINE_CONTEXT_ENGINES_PARALLEL_SUBMIT(name__, N__) struct { \
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struct i915_user_extension base; \
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__u16 engine_index; \
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__u16 width; \
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__u16 num_siblings; \
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__u16 mbz16; \
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__u64 flags; \
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__u64 mbz64[3]; \
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struct i915_engine_class_instance engines[N__]; \
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} __attribute__((packed)) name__
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/**
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* DOC: Context Engine Map uAPI
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*
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@ -2108,6 +2293,7 @@ struct i915_context_param_engines {
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__u64 extensions; /* linked chain of extension blocks, 0 terminates */
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#define I915_CONTEXT_ENGINES_EXT_LOAD_BALANCE 0 /* see i915_context_engines_load_balance */
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#define I915_CONTEXT_ENGINES_EXT_BOND 1 /* see i915_context_engines_bond */
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#define I915_CONTEXT_ENGINES_EXT_PARALLEL_SUBMIT 2 /* see i915_context_engines_parallel_submit */
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struct i915_engine_class_instance engines[0];
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} __attribute__((packed));
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@ -2726,14 +2912,20 @@ struct drm_i915_engine_info {
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/** @flags: Engine flags. */
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__u64 flags;
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#define I915_ENGINE_INFO_HAS_LOGICAL_INSTANCE (1 << 0)
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/** @capabilities: Capabilities of this engine. */
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__u64 capabilities;
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#define I915_VIDEO_CLASS_CAPABILITY_HEVC (1 << 0)
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#define I915_VIDEO_AND_ENHANCE_CLASS_CAPABILITY_SFC (1 << 1)
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/** @logical_instance: Logical instance of engine */
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__u16 logical_instance;
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/** @rsvd1: Reserved fields. */
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__u64 rsvd1[4];
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__u16 rsvd1[3];
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/** @rsvd2: Reserved fields. */
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__u64 rsvd2[3];
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};
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/**
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@ -2979,8 +3171,12 @@ struct drm_i915_gem_create_ext {
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*
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* For I915_GEM_CREATE_EXT_MEMORY_REGIONS usage see
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* struct drm_i915_gem_create_ext_memory_regions.
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*
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* For I915_GEM_CREATE_EXT_PROTECTED_CONTENT usage see
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* struct drm_i915_gem_create_ext_protected_content.
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*/
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#define I915_GEM_CREATE_EXT_MEMORY_REGIONS 0
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#define I915_GEM_CREATE_EXT_PROTECTED_CONTENT 1
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__u64 extensions;
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};
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@ -3038,6 +3234,50 @@ struct drm_i915_gem_create_ext_memory_regions {
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__u64 regions;
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};
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/**
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* struct drm_i915_gem_create_ext_protected_content - The
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* I915_OBJECT_PARAM_PROTECTED_CONTENT extension.
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*
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* If this extension is provided, buffer contents are expected to be protected
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* by PXP encryption and require decryption for scan out and processing. This
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* is only possible on platforms that have PXP enabled, on all other scenarios
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* using this extension will cause the ioctl to fail and return -ENODEV. The
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* flags parameter is reserved for future expansion and must currently be set
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* to zero.
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*
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* The buffer contents are considered invalid after a PXP session teardown.
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*
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* The encryption is guaranteed to be processed correctly only if the object
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* is submitted with a context created using the
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* I915_CONTEXT_PARAM_PROTECTED_CONTENT flag. This will also enable extra checks
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* at submission time on the validity of the objects involved.
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*
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* Below is an example on how to create a protected object:
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*
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* .. code-block:: C
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*
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* struct drm_i915_gem_create_ext_protected_content protected_ext = {
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* .base = { .name = I915_GEM_CREATE_EXT_PROTECTED_CONTENT },
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* .flags = 0,
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* };
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* struct drm_i915_gem_create_ext create_ext = {
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* .size = PAGE_SIZE,
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* .extensions = (uintptr_t)&protected_ext,
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* };
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*
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* int err = ioctl(fd, DRM_IOCTL_I915_GEM_CREATE_EXT, &create_ext);
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* if (err) ...
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*/
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struct drm_i915_gem_create_ext_protected_content {
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/** @base: Extension link. See struct i915_user_extension. */
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struct i915_user_extension base;
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/** @flags: reserved for future usage, currently MBZ */
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__u32 flags;
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};
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/* ID of the protected content session managed by i915 when PXP is active */
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#define I915_PROTECTED_CONTENT_DEFAULT_SESSION 0xf
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#if defined(__cplusplus)
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}
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#endif
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