mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-08-21 08:19:28 +00:00
RealView: Move the EB GIC definitions to the board file
This is in preparation for the RealView PB11MPCore and PB1176 patches which have different base addresses for the GIC. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
This commit is contained in:
parent
be4f3c8691
commit
073b6ff3b9
3 changed files with 11 additions and 10 deletions
|
@ -51,13 +51,13 @@ static struct map_desc realview_eb_io_desc[] __initdata = {
|
|||
.length = SZ_4K,
|
||||
.type = MT_DEVICE,
|
||||
}, {
|
||||
.virtual = IO_ADDRESS(REALVIEW_GIC_CPU_BASE),
|
||||
.pfn = __phys_to_pfn(REALVIEW_GIC_CPU_BASE),
|
||||
.virtual = IO_ADDRESS(REALVIEW_EB_GIC_CPU_BASE),
|
||||
.pfn = __phys_to_pfn(REALVIEW_EB_GIC_CPU_BASE),
|
||||
.length = SZ_4K,
|
||||
.type = MT_DEVICE,
|
||||
}, {
|
||||
.virtual = IO_ADDRESS(REALVIEW_GIC_DIST_BASE),
|
||||
.pfn = __phys_to_pfn(REALVIEW_GIC_DIST_BASE),
|
||||
.virtual = IO_ADDRESS(REALVIEW_EB_GIC_DIST_BASE),
|
||||
.pfn = __phys_to_pfn(REALVIEW_EB_GIC_DIST_BASE),
|
||||
.length = SZ_4K,
|
||||
.type = MT_DEVICE,
|
||||
}, {
|
||||
|
@ -286,14 +286,14 @@ static void __init gic_init_irq(void)
|
|||
|
||||
#ifndef CONFIG_REALVIEW_EB_ARM11MP_REVB
|
||||
/* board GIC, secondary */
|
||||
gic_dist_init(1, __io_address(REALVIEW_GIC_DIST_BASE), 64);
|
||||
gic_cpu_init(1, __io_address(REALVIEW_GIC_CPU_BASE));
|
||||
gic_dist_init(1, __io_address(REALVIEW_EB_GIC_DIST_BASE), 64);
|
||||
gic_cpu_init(1, __io_address(REALVIEW_EB_GIC_CPU_BASE));
|
||||
gic_cascade_irq(1, IRQ_EB11MP_EB_IRQ1);
|
||||
#endif
|
||||
} else {
|
||||
/* board GIC, primary */
|
||||
gic_cpu_base_addr = __io_address(REALVIEW_GIC_CPU_BASE);
|
||||
gic_dist_init(0, __io_address(REALVIEW_GIC_DIST_BASE), 29);
|
||||
gic_cpu_base_addr = __io_address(REALVIEW_EB_GIC_CPU_BASE);
|
||||
gic_dist_init(0, __io_address(REALVIEW_EB_GIC_DIST_BASE), 29);
|
||||
gic_cpu_init(0, gic_cpu_base_addr);
|
||||
}
|
||||
}
|
||||
|
|
|
@ -26,6 +26,9 @@
|
|||
/*
|
||||
* RealView EB + ARM11MPCore peripheral addresses
|
||||
*/
|
||||
#define REALVIEW_EB_GIC_CPU_BASE 0x10040000 /* Generic interrupt controller CPU interface */
|
||||
#define REALVIEW_EB_GIC_DIST_BASE 0x10041000 /* Generic interrupt controller distributor */
|
||||
|
||||
#ifdef CONFIG_REALVIEW_EB_ARM11MP_REVB
|
||||
#define REALVIEW_EB11MP_SCU_BASE 0x10100000 /* SCU registers */
|
||||
#define REALVIEW_EB11MP_GIC_CPU_BASE 0x10100100 /* Generic interrupt controller CPU interface */
|
||||
|
|
|
@ -205,8 +205,6 @@
|
|||
/* Reserved 0x1001A000 - 0x1001FFFF */
|
||||
#define REALVIEW_CLCD_BASE 0x10020000 /* CLCD */
|
||||
#define REALVIEW_DMAC_BASE 0x10030000 /* DMA controller */
|
||||
#define REALVIEW_GIC_CPU_BASE 0x10040000 /* Generic interrupt controller CPU interface */
|
||||
#define REALVIEW_GIC_DIST_BASE 0x10041000 /* Generic interrupt controller distributor */
|
||||
#define REALVIEW_SMC_BASE 0x10080000 /* SMC */
|
||||
/* Reserved 0x10090000 - 0x100EFFFF */
|
||||
|
||||
|
|
Loading…
Reference in a new issue