mirrors/linux-stable
1
0
Fork 0
mirror of https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git synced 2024-09-14 06:35:12 +00:00
Code Issues Releases Wiki Activity

drm/amd/amdgpu: Convert messages in gmc v6 to dev_*()

Browse source 
Make the kernel log messaging more consistent and use the
dev_*() functions instead of a mix of DRM_*() and printk().

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Tom St Denis 2016-09-06 13:09:26 -04:00 committed by Alex Deucher
parent e5c5304f13
commit 075719c3cb
1 changed files with 8 additions and 8 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

16
drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
View file

@ -126,7 +126,7 @@ static int gmc_v6_0_init_microcode(struct amdgpu_device *adev)
out: out:
if (err) { if (err) {
printk(KERN_ERR dev_err(adev->dev,
"si_mc: Failed to load firmware \"%s\"\n", "si_mc: Failed to load firmware \"%s\"\n",
fw_name); fw_name);
release_firmware(adev->mc.fw); release_firmware(adev->mc.fw);
@ -452,7 +452,7 @@ static int gmc_v6_0_gart_enable(struct amdgpu_device *adev)
WRITE_PROTECTION_FAULT_ENABLE_DEFAULT); WRITE_PROTECTION_FAULT_ENABLE_DEFAULT);
gmc_v6_0_gart_flush_gpu_tlb(adev, 0); gmc_v6_0_gart_flush_gpu_tlb(adev, 0);
DRM_INFO("PCIE GART of %uM enabled (table at 0x%016llX).\n", dev_info(adev->dev, "PCIE GART of %uM enabled (table at 0x%016llX).\n",
(unsigned)(adev->mc.gtt_size >> 20), (unsigned)(adev->mc.gtt_size >> 20),
(unsigned long long)adev->gart.table_addr); (unsigned long long)adev->gart.table_addr);
adev->gart.ready = true; adev->gart.ready = true;
@ -464,7 +464,7 @@ static int gmc_v6_0_gart_init(struct amdgpu_device *adev)
int r; int r;
if (adev->gart.robj) { if (adev->gart.robj) {
WARN(1, "gmc_v6_0 PCIE GART already initialized\n"); dev_warn(adev->dev, "gmc_v6_0 PCIE GART already initialized\n");
return 0; return 0;
} }
r = amdgpu_gart_init(adev); r = amdgpu_gart_init(adev);
@ -549,7 +549,7 @@ static void gmc_v6_0_vm_decode_fault(struct amdgpu_device *adev,
mc_id = REG_GET_FIELD(status, mmVM_CONTEXT1_PROTECTION_FAULT_STATUS, mc_id = REG_GET_FIELD(status, mmVM_CONTEXT1_PROTECTION_FAULT_STATUS,
xxMEMORY_CLIENT_ID); xxMEMORY_CLIENT_ID);
printk("VM fault (0x%02x, vmid %d) at page %u, %s from '%s' (0x%08x) (%d)\n", dev_err(adev->dev, "VM fault (0x%02x, vmid %d) at page %u, %s from '%s' (0x%08x) (%d)\n",
protections, vmid, addr, protections, vmid, addr,
REG_GET_FIELD(status, mmVM_CONTEXT1_PROTECTION_FAULT_STATUS, REG_GET_FIELD(status, mmVM_CONTEXT1_PROTECTION_FAULT_STATUS,
xxMEMORY_CLIENT_RW) ? xxMEMORY_CLIENT_RW) ?
@ -752,17 +752,17 @@ static int gmc_v6_0_sw_init(void *handle)
if (r) { if (r) {
adev->need_dma32 = true; adev->need_dma32 = true;
dma_bits = 32; dma_bits = 32;
printk(KERN_WARNING "amdgpu: No suitable DMA available.\n"); dev_warn(adev->dev, "amdgpu: No suitable DMA available.\n");
} }
r = pci_set_consistent_dma_mask(adev->pdev, DMA_BIT_MASK(dma_bits)); r = pci_set_consistent_dma_mask(adev->pdev, DMA_BIT_MASK(dma_bits));
if (r) { if (r) {
pci_set_consistent_dma_mask(adev->pdev, DMA_BIT_MASK(32)); pci_set_consistent_dma_mask(adev->pdev, DMA_BIT_MASK(32));
printk(KERN_WARNING "amdgpu: No coherent DMA available.\n"); dev_warn(adev->dev, "amdgpu: No coherent DMA available.\n");
} }
r = gmc_v6_0_init_microcode(adev); r = gmc_v6_0_init_microcode(adev);
if (r) { if (r) {
DRM_ERROR("Failed to load mc firmware!\n"); dev_err(adev->dev, "Failed to load mc firmware!\n");
return r; return r;
} }
@ -820,7 +820,7 @@ static int gmc_v6_0_hw_init(void *handle)
if (!(adev->flags & AMD_IS_APU)) { if (!(adev->flags & AMD_IS_APU)) {
r = gmc_v6_0_mc_load_microcode(adev); r = gmc_v6_0_mc_load_microcode(adev);
if (r) { if (r) {
DRM_ERROR("Failed to load MC firmware!\n"); dev_err(adev->dev, "Failed to load MC firmware!\n");
return r; return r;
} }
} }