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Revert "ARM: 6943/1: mm: use TTBR1 instead of reserved context ID"
This reverts commit52af9c6cd8
. Will Deacon reports that: In52af9c6c
("ARM: 6943/1: mm: use TTBR1 instead of reserved context ID") I updated the ASID rollover code to use only the kernel page tables whilst updating the ASID. Unfortunately, the code to restore the user page tables was part of a later patch which isn't yet in mainline, so this leaves the code quite broken. We're also in the process of eliminating __ARCH_WANT_INTERRUPTS_ON_CTXSW from ARM, so lets revert these until we can properly sort out what we're doing with the ARM context switching. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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parent
17ee083b78
commit
07989b7ad6
2 changed files with 11 additions and 10 deletions
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@ -24,7 +24,9 @@ DEFINE_PER_CPU(struct mm_struct *, current_mm);
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/*
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* We fork()ed a process, and we need a new context for the child
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* to run in.
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* to run in. We reserve version 0 for initial tasks so we will
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* always allocate an ASID. The ASID 0 is reserved for the TTBR
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* register changing sequence.
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*/
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void __init_new_context(struct task_struct *tsk, struct mm_struct *mm)
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{
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@ -34,11 +36,8 @@ void __init_new_context(struct task_struct *tsk, struct mm_struct *mm)
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static void flush_context(void)
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{
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u32 ttb;
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/* Copy TTBR1 into TTBR0 */
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asm volatile("mrc p15, 0, %0, c2, c0, 1\n"
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"mcr p15, 0, %0, c2, c0, 0"
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: "=r" (ttb));
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/* set the reserved ASID before flushing the TLB */
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asm("mcr p15, 0, %0, c13, c0, 1\n" : : "r" (0));
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isb();
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local_flush_tlb_all();
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if (icache_is_vivt_asid_tagged()) {
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@ -108,16 +108,18 @@ ENTRY(cpu_v7_switch_mm)
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#ifdef CONFIG_ARM_ERRATA_430973
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mcr p15, 0, r2, c7, c5, 6 @ flush BTAC/BTB
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#endif
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mrc p15, 0, r2, c2, c0, 1 @ load TTB 1
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mcr p15, 0, r2, c2, c0, 0 @ into TTB 0
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#ifdef CONFIG_ARM_ERRATA_754322
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dsb
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#endif
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mcr p15, 0, r2, c13, c0, 1 @ set reserved context ID
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isb
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1: mcr p15, 0, r0, c2, c0, 0 @ set TTB 0
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isb
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#ifdef CONFIG_ARM_ERRATA_754322
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dsb
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#endif
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mcr p15, 0, r1, c13, c0, 1 @ set context ID
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isb
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mcr p15, 0, r0, c2, c0, 0 @ set TTB 0
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isb
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#endif
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mov pc, lr
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ENDPROC(cpu_v7_switch_mm)
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