mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-09-06 10:57:46 +00:00
sh-pfc: r8a7779: Add SCIF pin groups and functions
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
Laurent Pinchart
parent
6dbf296a45
commit
081b69bbb2
1 changed files with 490 additions and 0 deletions
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@ -1635,6 +1635,370 @@ static const unsigned int mmc1_ctrl_pins[] = {
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static const unsigned int mmc1_ctrl_mux[] = {
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MMC1_CMD_MARK, MMC1_CLK_MARK,
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};
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/* - SCIF0 ------------------------------------------------------------------ */
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static const unsigned int scif0_data_pins[] = {
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/* RXD, TXD */
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153, 152,
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};
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static const unsigned int scif0_data_mux[] = {
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RX0_MARK, TX0_MARK,
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};
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static const unsigned int scif0_clk_pins[] = {
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/* SCK */
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156,
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};
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static const unsigned int scif0_clk_mux[] = {
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SCK0_MARK,
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};
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static const unsigned int scif0_ctrl_pins[] = {
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/* RTS, CTS */
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151, 150,
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};
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static const unsigned int scif0_ctrl_mux[] = {
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RTS0_TANS_MARK, CTS0_MARK,
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};
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static const unsigned int scif0_data_b_pins[] = {
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/* RXD, TXD */
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20, 19,
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};
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static const unsigned int scif0_data_b_mux[] = {
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RX0_B_MARK, TX0_B_MARK,
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};
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static const unsigned int scif0_clk_b_pins[] = {
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/* SCK */
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33,
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};
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static const unsigned int scif0_clk_b_mux[] = {
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SCK0_B_MARK,
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};
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static const unsigned int scif0_ctrl_b_pins[] = {
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/* RTS, CTS */
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18, 11,
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};
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static const unsigned int scif0_ctrl_b_mux[] = {
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RTS0_B_TANS_B_MARK, CTS0_B_MARK,
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};
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static const unsigned int scif0_data_c_pins[] = {
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/* RXD, TXD */
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146, 147,
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};
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static const unsigned int scif0_data_c_mux[] = {
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RX0_C_MARK, TX0_C_MARK,
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};
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static const unsigned int scif0_clk_c_pins[] = {
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/* SCK */
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145,
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};
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static const unsigned int scif0_clk_c_mux[] = {
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SCK0_C_MARK,
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};
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static const unsigned int scif0_ctrl_c_pins[] = {
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/* RTS, CTS */
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149, 148,
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};
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static const unsigned int scif0_ctrl_c_mux[] = {
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RTS0_C_TANS_C_MARK, CTS0_C_MARK,
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};
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static const unsigned int scif0_data_d_pins[] = {
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/* RXD, TXD */
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43, 42,
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};
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static const unsigned int scif0_data_d_mux[] = {
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RX0_D_MARK, TX0_D_MARK,
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};
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static const unsigned int scif0_clk_d_pins[] = {
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/* SCK */
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50,
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};
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static const unsigned int scif0_clk_d_mux[] = {
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SCK0_D_MARK,
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};
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static const unsigned int scif0_ctrl_d_pins[] = {
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/* RTS, CTS */
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51, 35,
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};
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static const unsigned int scif0_ctrl_d_mux[] = {
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RTS0_D_TANS_D_MARK, CTS0_D_MARK,
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};
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/* - SCIF1 ------------------------------------------------------------------ */
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static const unsigned int scif1_data_pins[] = {
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/* RXD, TXD */
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149, 148,
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};
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static const unsigned int scif1_data_mux[] = {
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RX1_MARK, TX1_MARK,
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};
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static const unsigned int scif1_clk_pins[] = {
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/* SCK */
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145,
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};
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static const unsigned int scif1_clk_mux[] = {
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SCK1_MARK,
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};
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static const unsigned int scif1_ctrl_pins[] = {
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/* RTS, CTS */
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147, 146,
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};
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static const unsigned int scif1_ctrl_mux[] = {
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RTS1_TANS_MARK, CTS1_MARK,
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};
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static const unsigned int scif1_data_b_pins[] = {
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/* RXD, TXD */
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117, 114,
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};
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static const unsigned int scif1_data_b_mux[] = {
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RX1_B_MARK, TX1_B_MARK,
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};
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static const unsigned int scif1_clk_b_pins[] = {
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/* SCK */
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113,
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};
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static const unsigned int scif1_clk_b_mux[] = {
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SCK1_B_MARK,
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};
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static const unsigned int scif1_ctrl_b_pins[] = {
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/* RTS, CTS */
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115, 116,
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};
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static const unsigned int scif1_ctrl_b_mux[] = {
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RTS1_B_TANS_B_MARK, CTS1_B_MARK,
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};
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static const unsigned int scif1_data_c_pins[] = {
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/* RXD, TXD */
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67, 66,
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};
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static const unsigned int scif1_data_c_mux[] = {
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RX1_C_MARK, TX1_C_MARK,
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};
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static const unsigned int scif1_clk_c_pins[] = {
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/* SCK */
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86,
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};
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static const unsigned int scif1_clk_c_mux[] = {
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SCK1_C_MARK,
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};
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static const unsigned int scif1_ctrl_c_pins[] = {
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/* RTS, CTS */
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69, 68,
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};
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static const unsigned int scif1_ctrl_c_mux[] = {
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RTS1_C_TANS_C_MARK, CTS1_C_MARK,
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};
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/* - SCIF2 ------------------------------------------------------------------ */
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static const unsigned int scif2_data_pins[] = {
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/* RXD, TXD */
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106, 105,
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};
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static const unsigned int scif2_data_mux[] = {
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RX2_MARK, TX2_MARK,
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};
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static const unsigned int scif2_clk_pins[] = {
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/* SCK */
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107,
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};
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static const unsigned int scif2_clk_mux[] = {
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SCK2_MARK,
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};
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static const unsigned int scif2_data_b_pins[] = {
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/* RXD, TXD */
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120, 119,
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};
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static const unsigned int scif2_data_b_mux[] = {
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RX2_B_MARK, TX2_B_MARK,
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};
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static const unsigned int scif2_clk_b_pins[] = {
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/* SCK */
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118,
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};
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static const unsigned int scif2_clk_b_mux[] = {
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SCK2_B_MARK,
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};
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static const unsigned int scif2_data_c_pins[] = {
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/* RXD, TXD */
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33, 31,
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};
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static const unsigned int scif2_data_c_mux[] = {
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RX2_C_MARK, TX2_C_MARK,
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};
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static const unsigned int scif2_clk_c_pins[] = {
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/* SCK */
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32,
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};
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static const unsigned int scif2_clk_c_mux[] = {
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SCK2_C_MARK,
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};
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static const unsigned int scif2_data_d_pins[] = {
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/* RXD, TXD */
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64, 62,
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};
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static const unsigned int scif2_data_d_mux[] = {
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RX2_D_MARK, TX2_D_MARK,
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};
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static const unsigned int scif2_clk_d_pins[] = {
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/* SCK */
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63,
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};
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static const unsigned int scif2_clk_d_mux[] = {
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SCK2_D_MARK,
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};
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static const unsigned int scif2_data_e_pins[] = {
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/* RXD, TXD */
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20, 19,
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};
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static const unsigned int scif2_data_e_mux[] = {
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RX2_E_MARK, TX2_E_MARK,
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};
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/* - SCIF3 ------------------------------------------------------------------ */
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static const unsigned int scif3_data_pins[] = {
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/* RXD, TXD */
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137, 136,
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};
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static const unsigned int scif3_data_mux[] = {
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RX3_IRDA_RX_MARK, TX3_IRDA_TX_MARK,
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};
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static const unsigned int scif3_clk_pins[] = {
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/* SCK */
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135,
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};
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static const unsigned int scif3_clk_mux[] = {
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SCK3_MARK,
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};
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static const unsigned int scif3_data_b_pins[] = {
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/* RXD, TXD */
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64, 62,
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};
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static const unsigned int scif3_data_b_mux[] = {
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RX3_B_IRDA_RX_B_MARK, TX3_B_IRDA_TX_B_MARK,
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};
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static const unsigned int scif3_data_c_pins[] = {
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/* RXD, TXD */
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15, 12,
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};
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static const unsigned int scif3_data_c_mux[] = {
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RX3_C_IRDA_RX_C_MARK, TX3C_IRDA_TX_C_MARK,
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};
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static const unsigned int scif3_data_d_pins[] = {
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/* RXD, TXD */
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30, 29,
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};
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static const unsigned int scif3_data_d_mux[] = {
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RX3_D_IRDA_RX_D_MARK, TX3_D_IRDA_TX_D_MARK,
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};
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static const unsigned int scif3_data_e_pins[] = {
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/* RXD, TXD */
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35, 34,
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};
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static const unsigned int scif3_data_e_mux[] = {
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RX3_E_IRDA_RX_E_MARK, TX3_E_IRDA_TX_E_MARK,
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};
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static const unsigned int scif3_clk_e_pins[] = {
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/* SCK */
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42,
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};
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static const unsigned int scif3_clk_e_mux[] = {
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SCK3_E_MARK,
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};
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/* - SCIF4 ------------------------------------------------------------------ */
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static const unsigned int scif4_data_pins[] = {
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/* RXD, TXD */
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123, 122,
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};
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static const unsigned int scif4_data_mux[] = {
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RX4_MARK, TX4_MARK,
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};
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static const unsigned int scif4_clk_pins[] = {
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/* SCK */
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121,
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};
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static const unsigned int scif4_clk_mux[] = {
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SCK4_MARK,
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};
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static const unsigned int scif4_data_b_pins[] = {
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/* RXD, TXD */
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111, 110,
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};
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static const unsigned int scif4_data_b_mux[] = {
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RX4_B_MARK, TX4_B_MARK,
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};
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static const unsigned int scif4_clk_b_pins[] = {
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/* SCK */
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112,
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};
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static const unsigned int scif4_clk_b_mux[] = {
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SCK4_B_MARK,
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};
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static const unsigned int scif4_data_c_pins[] = {
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/* RXD, TXD */
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22, 21,
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};
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static const unsigned int scif4_data_c_mux[] = {
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RX4_C_MARK, TX4_C_MARK,
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};
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static const unsigned int scif4_data_d_pins[] = {
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/* RXD, TXD */
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69, 68,
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};
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static const unsigned int scif4_data_d_mux[] = {
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RX4_D_MARK, TX4_D_MARK,
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};
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/* - SCIF5 ------------------------------------------------------------------ */
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static const unsigned int scif5_data_pins[] = {
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/* RXD, TXD */
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51, 50,
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};
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static const unsigned int scif5_data_mux[] = {
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RX5_MARK, TX5_MARK,
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};
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static const unsigned int scif5_clk_pins[] = {
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/* SCK */
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43,
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};
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static const unsigned int scif5_clk_mux[] = {
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SCK5_MARK,
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};
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static const unsigned int scif5_data_b_pins[] = {
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/* RXD, TXD */
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18, 11,
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};
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static const unsigned int scif5_data_b_mux[] = {
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RX5_B_MARK, TX5_B_MARK,
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};
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static const unsigned int scif5_clk_b_pins[] = {
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/* SCK */
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19,
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};
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static const unsigned int scif5_clk_b_mux[] = {
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SCK5_B_MARK,
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};
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static const unsigned int scif5_data_c_pins[] = {
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/* RXD, TXD */
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24, 23,
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};
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static const unsigned int scif5_data_c_mux[] = {
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RX5_C_MARK, TX5_C_MARK,
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};
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static const unsigned int scif5_clk_c_pins[] = {
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/* SCK */
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28,
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};
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static const unsigned int scif5_clk_c_mux[] = {
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SCK5_C_MARK,
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};
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static const unsigned int scif5_data_d_pins[] = {
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/* RXD, TXD */
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8, 6,
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};
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static const unsigned int scif5_data_d_mux[] = {
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RX5_D_MARK, TX5_D_MARK,
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};
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static const unsigned int scif5_clk_d_pins[] = {
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/* SCK */
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7,
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};
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static const unsigned int scif5_clk_d_mux[] = {
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SCK5_D_MARK,
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};
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/* - SDHI0 ------------------------------------------------------------------ */
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static const unsigned int sdhi0_data1_pins[] = {
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/* D0 */
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@ -1804,6 +2168,57 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
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SH_PFC_PIN_GROUP(mmc1_data4),
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SH_PFC_PIN_GROUP(mmc1_data8),
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SH_PFC_PIN_GROUP(mmc1_ctrl),
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SH_PFC_PIN_GROUP(scif0_data),
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SH_PFC_PIN_GROUP(scif0_clk),
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SH_PFC_PIN_GROUP(scif0_ctrl),
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SH_PFC_PIN_GROUP(scif0_data_b),
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SH_PFC_PIN_GROUP(scif0_clk_b),
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SH_PFC_PIN_GROUP(scif0_ctrl_b),
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SH_PFC_PIN_GROUP(scif0_data_c),
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SH_PFC_PIN_GROUP(scif0_clk_c),
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SH_PFC_PIN_GROUP(scif0_ctrl_c),
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SH_PFC_PIN_GROUP(scif0_data_d),
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SH_PFC_PIN_GROUP(scif0_clk_d),
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SH_PFC_PIN_GROUP(scif0_ctrl_d),
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SH_PFC_PIN_GROUP(scif1_data),
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SH_PFC_PIN_GROUP(scif1_clk),
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SH_PFC_PIN_GROUP(scif1_ctrl),
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SH_PFC_PIN_GROUP(scif1_data_b),
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SH_PFC_PIN_GROUP(scif1_clk_b),
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SH_PFC_PIN_GROUP(scif1_ctrl_b),
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SH_PFC_PIN_GROUP(scif1_data_c),
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SH_PFC_PIN_GROUP(scif1_clk_c),
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SH_PFC_PIN_GROUP(scif1_ctrl_c),
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SH_PFC_PIN_GROUP(scif2_data),
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SH_PFC_PIN_GROUP(scif2_clk),
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SH_PFC_PIN_GROUP(scif2_data_b),
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SH_PFC_PIN_GROUP(scif2_clk_b),
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SH_PFC_PIN_GROUP(scif2_data_c),
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SH_PFC_PIN_GROUP(scif2_clk_c),
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SH_PFC_PIN_GROUP(scif2_data_d),
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SH_PFC_PIN_GROUP(scif2_clk_d),
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SH_PFC_PIN_GROUP(scif2_data_e),
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SH_PFC_PIN_GROUP(scif3_data),
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SH_PFC_PIN_GROUP(scif3_clk),
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SH_PFC_PIN_GROUP(scif3_data_b),
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SH_PFC_PIN_GROUP(scif3_data_c),
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SH_PFC_PIN_GROUP(scif3_data_d),
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SH_PFC_PIN_GROUP(scif3_data_e),
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SH_PFC_PIN_GROUP(scif3_clk_e),
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SH_PFC_PIN_GROUP(scif4_data),
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SH_PFC_PIN_GROUP(scif4_clk),
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SH_PFC_PIN_GROUP(scif4_data_b),
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SH_PFC_PIN_GROUP(scif4_clk_b),
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SH_PFC_PIN_GROUP(scif4_data_c),
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SH_PFC_PIN_GROUP(scif4_data_d),
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SH_PFC_PIN_GROUP(scif5_data),
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SH_PFC_PIN_GROUP(scif5_clk),
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SH_PFC_PIN_GROUP(scif5_data_b),
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SH_PFC_PIN_GROUP(scif5_clk_b),
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SH_PFC_PIN_GROUP(scif5_data_c),
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SH_PFC_PIN_GROUP(scif5_clk_c),
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SH_PFC_PIN_GROUP(scif5_data_d),
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SH_PFC_PIN_GROUP(scif5_clk_d),
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SH_PFC_PIN_GROUP(sdhi0_data1),
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SH_PFC_PIN_GROUP(sdhi0_data4),
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SH_PFC_PIN_GROUP(sdhi0_ctrl),
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@ -1861,6 +2276,75 @@ static const char * const mmc1_groups[] = {
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"mmc1_ctrl",
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};
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static const char * const scif0_groups[] = {
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"scif0_data",
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"scif0_clk",
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"scif0_ctrl",
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"scif0_data_b",
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"scif0_clk_b",
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"scif0_ctrl_b",
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"scif0_data_c",
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"scif0_clk_c",
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||||
"scif0_ctrl_c",
|
||||
"scif0_data_d",
|
||||
"scif0_clk_d",
|
||||
"scif0_ctrl_d",
|
||||
};
|
||||
|
||||
static const char * const scif1_groups[] = {
|
||||
"scif1_data",
|
||||
"scif1_clk",
|
||||
"scif1_ctrl",
|
||||
"scif1_data_b",
|
||||
"scif1_clk_b",
|
||||
"scif1_ctrl_b",
|
||||
"scif1_data_c",
|
||||
"scif1_clk_c",
|
||||
"scif1_ctrl_c",
|
||||
};
|
||||
|
||||
static const char * const scif2_groups[] = {
|
||||
"scif2_data",
|
||||
"scif2_clk",
|
||||
"scif2_data_b",
|
||||
"scif2_clk_b",
|
||||
"scif2_data_c",
|
||||
"scif2_clk_c",
|
||||
"scif2_data_d",
|
||||
"scif2_clk_d",
|
||||
"scif2_data_e",
|
||||
};
|
||||
|
||||
static const char * const scif3_groups[] = {
|
||||
"scif3_data",
|
||||
"scif3_clk",
|
||||
"scif3_data_b",
|
||||
"scif3_data_c",
|
||||
"scif3_data_d",
|
||||
"scif3_data_e",
|
||||
"scif3_clk_e",
|
||||
};
|
||||
|
||||
static const char * const scif4_groups[] = {
|
||||
"scif4_data",
|
||||
"scif4_clk",
|
||||
"scif4_data_b",
|
||||
"scif4_clk_b",
|
||||
"scif4_data_c",
|
||||
"scif4_data_d",
|
||||
};
|
||||
|
||||
static const char * const scif5_groups[] = {
|
||||
"scif5_data",
|
||||
"scif5_clk",
|
||||
"scif5_data_b",
|
||||
"scif5_clk_b",
|
||||
"scif5_data_c",
|
||||
"scif5_clk_c",
|
||||
"scif5_data_d",
|
||||
"scif5_clk_d",
|
||||
};
|
||||
|
||||
static const char * const sdhi0_groups[] = {
|
||||
"sdhi0_data1",
|
||||
"sdhi0_data4",
|
||||
|
|
@ -1902,6 +2386,12 @@ static const struct sh_pfc_function pinmux_functions[] = {
|
|||
SH_PFC_FUNCTION(sdhi1),
|
||||
SH_PFC_FUNCTION(sdhi2),
|
||||
SH_PFC_FUNCTION(sdhi3),
|
||||
SH_PFC_FUNCTION(scif0),
|
||||
SH_PFC_FUNCTION(scif1),
|
||||
SH_PFC_FUNCTION(scif2),
|
||||
SH_PFC_FUNCTION(scif3),
|
||||
SH_PFC_FUNCTION(scif4),
|
||||
SH_PFC_FUNCTION(scif5),
|
||||
};
|
||||
|
||||
#define PINMUX_FN_BASE ARRAY_SIZE(pinmux_pins)
|
||||
|
|
|
|||
Loading…
Reference in a new issue