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ARM: dts: ls1021a-tsn: Use interrupts for the SGMII PHYs

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On the LS1021A-TSN board, the 2 Atheros AR8031 PHYs for eth0 and eth1
have interrupt lines connected to the shared IRQ2_B LS1021A pin.

Switching to interrupts offloads the PHY library from the task of
polling the MDIO status and AN registers (1, 4, 5) every second.

Unfortunately, the BCM5464R quad PHY connected to the switch does not
appear to have an interrupt line routed to the SoC.

Signed-off-by: Vladimir Oltean <olteanv@gmail.com>
Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
Vladimir Oltean 2019-11-14 12:02:53 +01:00 committed by Shawn Guo
parent d27f9d634c
commit 0840a47ee8
1 changed files with 4 additions and 0 deletions
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4
arch/arm/boot/dts/ls1021a-tsn.dts
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@ -203,11 +203,15 @@ &mdio0 {
/* AR8031 */
sgmii_phy1: ethernet-phy@1 {
reg = <0x1>;
/* SGMII1_PHY_INT_B: connected to IRQ2, active low */
interrupts-extended = <&extirq 2 IRQ_TYPE_LEVEL_LOW>;
};
/* AR8031 */
sgmii_phy2: ethernet-phy@2 {
reg = <0x2>;
/* SGMII2_PHY_INT_B: connected to IRQ2, active low */
interrupts-extended = <&extirq 2 IRQ_TYPE_LEVEL_LOW>;
};
/* BCM5464 quad PHY */