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cxgb4: advertise support for FR_NSMR_TPTE_WR
Query firmware for the FW_PARAMS_PARAM_DEV_RI_FR_NSMR_TPTE_WR parameter. If it exists and is 1, then advertise support for FR_NSMR_TPTE_WR to the ULDs. Signed-off-by: Steve Wise <swise@opengridcomputing.com> Signed-off-by: Doug Ledford <dledford@redhat.com>
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4 changed files with 10 additions and 0 deletions
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@ -349,6 +349,7 @@ struct adapter_params {
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unsigned int max_ordird_qp; /* Max read depth per RDMA QP */
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unsigned int max_ordird_qp; /* Max read depth per RDMA QP */
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unsigned int max_ird_adapter; /* Max read depth per adapter */
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unsigned int max_ird_adapter; /* Max read depth per adapter */
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bool fr_nsmr_tpte_wr_support; /* FW support for FR_NSMR_TPTE_WR */
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};
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};
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/* State needed to monitor the forward progress of SGE Ingress DMA activities
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/* State needed to monitor the forward progress of SGE Ingress DMA activities
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@ -2517,6 +2517,7 @@ static void uld_attach(struct adapter *adap, unsigned int uld)
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lli.max_ird_adapter = adap->params.max_ird_adapter;
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lli.max_ird_adapter = adap->params.max_ird_adapter;
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lli.ulptx_memwrite_dsgl = adap->params.ulptx_memwrite_dsgl;
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lli.ulptx_memwrite_dsgl = adap->params.ulptx_memwrite_dsgl;
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lli.nodeid = dev_to_node(adap->pdev_dev);
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lli.nodeid = dev_to_node(adap->pdev_dev);
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lli.fr_nsmr_tpte_wr_support = adap->params.fr_nsmr_tpte_wr_support;
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handle = ulds[uld].add(&lli);
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handle = ulds[uld].add(&lli);
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if (IS_ERR(handle)) {
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if (IS_ERR(handle)) {
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@ -4061,6 +4062,12 @@ static int adap_init0(struct adapter *adap)
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adap->params.ulptx_memwrite_dsgl = (ret == 0 && val[0] != 0);
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adap->params.ulptx_memwrite_dsgl = (ret == 0 && val[0] != 0);
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}
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}
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/* See if FW supports FW_RI_FR_NSMR_TPTE_WR work request */
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params[0] = FW_PARAM_DEV(RI_FR_NSMR_TPTE_WR);
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ret = t4_query_params(adap, adap->mbox, adap->pf, 0,
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1, params, val);
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adap->params.fr_nsmr_tpte_wr_support = (ret == 0 && val[0] != 0);
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/*
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/*
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* Get device capabilities so we can determine what resources we need
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* Get device capabilities so we can determine what resources we need
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* to manage.
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* to manage.
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@ -280,6 +280,7 @@ struct cxgb4_lld_info {
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unsigned int iscsi_llimit; /* chip's iscsi region llimit */
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unsigned int iscsi_llimit; /* chip's iscsi region llimit */
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void **iscsi_ppm; /* iscsi page pod manager */
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void **iscsi_ppm; /* iscsi page pod manager */
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int nodeid; /* device numa node id */
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int nodeid; /* device numa node id */
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bool fr_nsmr_tpte_wr_support; /* FW supports FR_NSMR_TPTE_WR */
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};
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};
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struct cxgb4_uld_info {
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struct cxgb4_uld_info {
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@ -1120,6 +1120,7 @@ enum fw_params_param_dev {
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FW_PARAMS_PARAM_DEV_MAXIRD_ADAPTER = 0x14, /* max supported adap IRD */
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FW_PARAMS_PARAM_DEV_MAXIRD_ADAPTER = 0x14, /* max supported adap IRD */
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FW_PARAMS_PARAM_DEV_ULPTX_MEMWRITE_DSGL = 0x17,
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FW_PARAMS_PARAM_DEV_ULPTX_MEMWRITE_DSGL = 0x17,
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FW_PARAMS_PARAM_DEV_FWCACHE = 0x18,
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FW_PARAMS_PARAM_DEV_FWCACHE = 0x18,
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FW_PARAMS_PARAM_DEV_RI_FR_NSMR_TPTE_WR = 0x1C,
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};
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};
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/*
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/*
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