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regulator: qcom: Rework to single platform device
Modeling the individual RPM resources as platform devices consumes at least 12-15kb of RAM, just to hold the platform_device structs. Rework this to instead have one device per pmic exposed by the RPM. With this representation we can more accurately define the input pins on the pmic and have the supply description match the data sheet. Suggested-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Reviewed-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Bjorn Andersson
Mark Brown
parent
469a951446
commit
087a1b5cdd
1 changed files with 159 additions and 81 deletions
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@ -607,31 +607,6 @@ static const struct qcom_rpm_reg smb208_smps = {
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.supports_force_mode_bypass = false,
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};
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static const struct of_device_id rpm_of_match[] = {
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{ .compatible = "qcom,rpm-pm8058-pldo", .data = &pm8058_pldo },
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{ .compatible = "qcom,rpm-pm8058-nldo", .data = &pm8058_nldo },
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{ .compatible = "qcom,rpm-pm8058-smps", .data = &pm8058_smps },
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{ .compatible = "qcom,rpm-pm8058-ncp", .data = &pm8058_ncp },
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{ .compatible = "qcom,rpm-pm8058-switch", .data = &pm8058_switch },
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{ .compatible = "qcom,rpm-pm8901-pldo", .data = &pm8901_pldo },
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{ .compatible = "qcom,rpm-pm8901-nldo", .data = &pm8901_nldo },
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{ .compatible = "qcom,rpm-pm8901-ftsmps", .data = &pm8901_ftsmps },
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{ .compatible = "qcom,rpm-pm8901-switch", .data = &pm8901_switch },
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{ .compatible = "qcom,rpm-pm8921-pldo", .data = &pm8921_pldo },
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{ .compatible = "qcom,rpm-pm8921-nldo", .data = &pm8921_nldo },
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{ .compatible = "qcom,rpm-pm8921-nldo1200", .data = &pm8921_nldo1200 },
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{ .compatible = "qcom,rpm-pm8921-smps", .data = &pm8921_smps },
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{ .compatible = "qcom,rpm-pm8921-ftsmps", .data = &pm8921_ftsmps },
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{ .compatible = "qcom,rpm-pm8921-ncp", .data = &pm8921_ncp },
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{ .compatible = "qcom,rpm-pm8921-switch", .data = &pm8921_switch },
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{ .compatible = "qcom,rpm-smb208", .data = &smb208_smps },
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{ }
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};
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MODULE_DEVICE_TABLE(of, rpm_of_match);
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static int rpm_reg_set(struct qcom_rpm_reg *vreg,
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const struct request_member *req,
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const int value)
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@ -773,74 +748,177 @@ static int rpm_reg_of_parse(struct device_node *node,
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return 0;
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}
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struct rpm_regulator_data {
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const char *name;
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int resource;
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const struct qcom_rpm_reg *template;
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const char *supply;
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};
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static const struct rpm_regulator_data rpm_pm8058_regulators[] = {
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{ "l0", QCOM_RPM_PM8058_LDO0, &pm8058_nldo, "vdd_l0_l1_lvs" },
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{ "l1", QCOM_RPM_PM8058_LDO1, &pm8058_nldo, "vdd_l0_l1_lvs" },
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{ "l2", QCOM_RPM_PM8058_LDO2, &pm8058_pldo, "vdd_l2_l11_l12" },
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{ "l3", QCOM_RPM_PM8058_LDO3, &pm8058_pldo, "vdd_l3_l4_l5" },
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{ "l4", QCOM_RPM_PM8058_LDO4, &pm8058_pldo, "vdd_l3_l4_l5" },
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{ "l5", QCOM_RPM_PM8058_LDO5, &pm8058_pldo, "vdd_l3_l4_l5" },
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{ "l6", QCOM_RPM_PM8058_LDO6, &pm8058_pldo, "vdd_l6_l7" },
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{ "l7", QCOM_RPM_PM8058_LDO7, &pm8058_pldo, "vdd_l6_l7" },
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{ "l8", QCOM_RPM_PM8058_LDO8, &pm8058_pldo, "vdd_l8" },
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{ "l9", QCOM_RPM_PM8058_LDO9, &pm8058_pldo, "vdd_l9" },
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{ "l10", QCOM_RPM_PM8058_LDO10, &pm8058_pldo, "vdd_l10" },
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{ "l11", QCOM_RPM_PM8058_LDO11, &pm8058_pldo, "vdd_l2_l11_l12" },
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{ "l12", QCOM_RPM_PM8058_LDO12, &pm8058_pldo, "vdd_l2_l11_l12" },
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{ "l13", QCOM_RPM_PM8058_LDO13, &pm8058_pldo, "vdd_l13_l16" },
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{ "l14", QCOM_RPM_PM8058_LDO14, &pm8058_pldo, "vdd_l14_l15" },
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{ "l15", QCOM_RPM_PM8058_LDO15, &pm8058_pldo, "vdd_l14_l15" },
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{ "l16", QCOM_RPM_PM8058_LDO16, &pm8058_pldo, "vdd_l13_l16" },
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{ "l17", QCOM_RPM_PM8058_LDO17, &pm8058_pldo, "vdd_l17_l18" },
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{ "l18", QCOM_RPM_PM8058_LDO18, &pm8058_pldo, "vdd_l17_l18" },
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{ "l19", QCOM_RPM_PM8058_LDO19, &pm8058_pldo, "vdd_l19_l20" },
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{ "l20", QCOM_RPM_PM8058_LDO20, &pm8058_pldo, "vdd_l19_l20" },
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{ "l21", QCOM_RPM_PM8058_LDO21, &pm8058_nldo, "vdd_l21" },
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{ "l22", QCOM_RPM_PM8058_LDO22, &pm8058_nldo, "vdd_l22" },
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{ "l23", QCOM_RPM_PM8058_LDO23, &pm8058_nldo, "vdd_l23_l24_l25" },
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{ "l24", QCOM_RPM_PM8058_LDO24, &pm8058_nldo, "vdd_l23_l24_l25" },
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{ "l25", QCOM_RPM_PM8058_LDO25, &pm8058_nldo, "vdd_l23_l24_l25" },
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{ "s0", QCOM_RPM_PM8058_SMPS0, &pm8058_smps, "vdd_s0" },
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{ "s1", QCOM_RPM_PM8058_SMPS1, &pm8058_smps, "vdd_s1" },
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{ "s2", QCOM_RPM_PM8058_SMPS2, &pm8058_smps, "vdd_s2" },
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{ "s3", QCOM_RPM_PM8058_SMPS3, &pm8058_smps, "vdd_s3" },
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{ "s4", QCOM_RPM_PM8058_SMPS4, &pm8058_smps, "vdd_s4" },
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{ "lvs0", QCOM_RPM_PM8058_LVS0, &pm8058_switch, "vdd_l0_l1_lvs" },
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{ "lvs1", QCOM_RPM_PM8058_LVS1, &pm8058_switch, "vdd_l0_l1_lvs" },
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{ "ncp", QCOM_RPM_PM8058_NCP, &pm8058_ncp, "vdd_ncp" },
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{ }
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};
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static const struct rpm_regulator_data rpm_pm8901_regulators[] = {
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{ "l0", QCOM_RPM_PM8901_LDO0, &pm8901_nldo, "vdd_l0" },
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{ "l1", QCOM_RPM_PM8901_LDO1, &pm8901_pldo, "vdd_l1" },
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{ "l2", QCOM_RPM_PM8901_LDO2, &pm8901_pldo, "vdd_l2" },
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{ "l3", QCOM_RPM_PM8901_LDO3, &pm8901_pldo, "vdd_l3" },
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{ "l4", QCOM_RPM_PM8901_LDO4, &pm8901_pldo, "vdd_l4" },
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{ "l5", QCOM_RPM_PM8901_LDO5, &pm8901_pldo, "vdd_l5" },
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{ "l6", QCOM_RPM_PM8901_LDO6, &pm8901_pldo, "vdd_l6" },
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{ "s0", QCOM_RPM_PM8901_SMPS0, &pm8901_ftsmps, "vdd_s0" },
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{ "s1", QCOM_RPM_PM8901_SMPS1, &pm8901_ftsmps, "vdd_s1" },
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{ "s2", QCOM_RPM_PM8901_SMPS2, &pm8901_ftsmps, "vdd_s2" },
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{ "s3", QCOM_RPM_PM8901_SMPS3, &pm8901_ftsmps, "vdd_s3" },
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{ "s4", QCOM_RPM_PM8901_SMPS4, &pm8901_ftsmps, "vdd_s4" },
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{ "lvs0", QCOM_RPM_PM8901_LVS0, &pm8901_switch, "lvs0_in" },
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{ "lvs1", QCOM_RPM_PM8901_LVS1, &pm8901_switch, "lvs1_in" },
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{ "lvs2", QCOM_RPM_PM8901_LVS2, &pm8901_switch, "lvs2_in" },
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{ "lvs3", QCOM_RPM_PM8901_LVS3, &pm8901_switch, "lvs3_in" },
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{ "mvs", QCOM_RPM_PM8901_MVS, &pm8901_switch, "mvs_in" },
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{ }
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};
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static const struct rpm_regulator_data rpm_pm8921_regulators[] = {
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{ "s1", QCOM_RPM_PM8921_SMPS1, &pm8921_smps, "vdd_s1" },
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{ "s2", QCOM_RPM_PM8921_SMPS2, &pm8921_smps, "vdd_s2" },
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{ "s3", QCOM_RPM_PM8921_SMPS3, &pm8921_smps },
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{ "s4", QCOM_RPM_PM8921_SMPS4, &pm8921_smps, "vdd_s4" },
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{ "s7", QCOM_RPM_PM8921_SMPS7, &pm8921_smps, "vdd_s7" },
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{ "s8", QCOM_RPM_PM8921_SMPS8, &pm8921_smps, "vdd_s8" },
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{ "l1", QCOM_RPM_PM8921_LDO1, &pm8921_nldo, "vdd_l1_l2_l12_l18" },
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{ "l2", QCOM_RPM_PM8921_LDO2, &pm8921_nldo, "vdd_l1_l2_l12_l18" },
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{ "l3", QCOM_RPM_PM8921_LDO3, &pm8921_pldo, "vdd_l3_l15_l17" },
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{ "l4", QCOM_RPM_PM8921_LDO4, &pm8921_pldo, "vdd_l4_l14" },
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{ "l5", QCOM_RPM_PM8921_LDO5, &pm8921_pldo, "vdd_l5_l8_l16" },
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{ "l6", QCOM_RPM_PM8921_LDO6, &pm8921_pldo, "vdd_l6_l7" },
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{ "l7", QCOM_RPM_PM8921_LDO7, &pm8921_pldo, "vdd_l6_l7" },
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{ "l8", QCOM_RPM_PM8921_LDO8, &pm8921_pldo, "vdd_l5_l8_l16" },
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{ "l9", QCOM_RPM_PM8921_LDO9, &pm8921_pldo, "vdd_l9_l11" },
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{ "l10", QCOM_RPM_PM8921_LDO10, &pm8921_pldo, "vdd_l10_l22" },
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{ "l11", QCOM_RPM_PM8921_LDO11, &pm8921_pldo, "vdd_l9_l11" },
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{ "l12", QCOM_RPM_PM8921_LDO12, &pm8921_nldo, "vdd_l1_l2_l12_l18" },
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{ "l14", QCOM_RPM_PM8921_LDO14, &pm8921_pldo, "vdd_l4_l14" },
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{ "l15", QCOM_RPM_PM8921_LDO15, &pm8921_pldo, "vdd_l3_l15_l17" },
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{ "l16", QCOM_RPM_PM8921_LDO16, &pm8921_pldo, "vdd_l5_l8_l16" },
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{ "l17", QCOM_RPM_PM8921_LDO17, &pm8921_pldo, "vdd_l3_l15_l17" },
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{ "l18", QCOM_RPM_PM8921_LDO18, &pm8921_nldo, "vdd_l1_l2_l12_l18" },
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{ "l21", QCOM_RPM_PM8921_LDO21, &pm8921_pldo, "vdd_l21_l23_l29" },
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{ "l22", QCOM_RPM_PM8921_LDO22, &pm8921_pldo, "vdd_l10_l22" },
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{ "l23", QCOM_RPM_PM8921_LDO23, &pm8921_pldo, "vdd_l21_l23_l29" },
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{ "l24", QCOM_RPM_PM8921_LDO24, &pm8921_nldo1200, "vdd_l24" },
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{ "l25", QCOM_RPM_PM8921_LDO25, &pm8921_nldo1200, "vdd_l25" },
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{ "l26", QCOM_RPM_PM8921_LDO26, &pm8921_nldo1200, "vdd_l26" },
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{ "l27", QCOM_RPM_PM8921_LDO27, &pm8921_nldo1200, "vdd_l27" },
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{ "l28", QCOM_RPM_PM8921_LDO28, &pm8921_nldo1200, "vdd_l28" },
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{ "l29", QCOM_RPM_PM8921_LDO29, &pm8921_pldo, "vdd_l21_l23_l29" },
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{ "lvs1", QCOM_RPM_PM8921_LVS1, &pm8921_switch, "vin_lvs1_3_6" },
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{ "lvs2", QCOM_RPM_PM8921_LVS2, &pm8921_switch, "vin_lvs2" },
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{ "lvs3", QCOM_RPM_PM8921_LVS3, &pm8921_switch, "vin_lvs1_3_6" },
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{ "lvs4", QCOM_RPM_PM8921_LVS4, &pm8921_switch, "vin_lvs4_5_7" },
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{ "lvs5", QCOM_RPM_PM8921_LVS5, &pm8921_switch, "vin_lvs4_5_7" },
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{ "lvs6", QCOM_RPM_PM8921_LVS6, &pm8921_switch, "vin_lvs1_3_6" },
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{ "lvs7", QCOM_RPM_PM8921_LVS7, &pm8921_switch, "vin_lvs4_5_7" },
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{ "usb-switch", QCOM_RPM_USB_OTG_SWITCH, &pm8921_switch, "vin_5vs" },
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{ "hdmi-switch", QCOM_RPM_HDMI_SWITCH, &pm8921_switch, "vin_5vs" },
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{ "ncp", QCOM_RPM_PM8921_NCP, &pm8921_ncp, "vdd_ncp" },
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{ }
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};
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static const struct of_device_id rpm_of_match[] = {
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{ .compatible = "qcom,rpm-pm8058-regulators", .data = &rpm_pm8058_regulators },
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{ .compatible = "qcom,rpm-pm8901-regulators", .data = &rpm_pm8901_regulators },
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{ .compatible = "qcom,rpm-pm8921-regulators", .data = &rpm_pm8921_regulators },
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{ }
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};
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MODULE_DEVICE_TABLE(of, rpm_of_match);
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static int rpm_reg_probe(struct platform_device *pdev)
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{
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struct regulator_init_data *initdata;
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const struct qcom_rpm_reg *template;
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const struct rpm_regulator_data *reg;
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const struct of_device_id *match;
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struct regulator_config config = { };
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struct regulator_dev *rdev;
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struct qcom_rpm_reg *vreg;
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const char *key;
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u32 val;
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int ret;
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match = of_match_device(rpm_of_match, &pdev->dev);
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template = match->data;
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for (reg = match->data; reg->name; reg++) {
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vreg = devm_kmalloc(&pdev->dev, sizeof(*vreg), GFP_KERNEL);
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if (!vreg) {
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dev_err(&pdev->dev, "failed to allocate vreg\n");
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return -ENOMEM;
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}
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memcpy(vreg, reg->template, sizeof(*vreg));
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mutex_init(&vreg->lock);
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vreg = devm_kmalloc(&pdev->dev, sizeof(*vreg), GFP_KERNEL);
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if (!vreg) {
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dev_err(&pdev->dev, "failed to allocate vreg\n");
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return -ENOMEM;
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}
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memcpy(vreg, template, sizeof(*vreg));
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mutex_init(&vreg->lock);
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vreg->dev = &pdev->dev;
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vreg->desc.id = -1;
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vreg->desc.owner = THIS_MODULE;
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vreg->desc.type = REGULATOR_VOLTAGE;
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vreg->desc.name = pdev->dev.of_node->name;
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vreg->desc.supply_name = "vin";
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vreg->dev = &pdev->dev;
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vreg->resource = reg->resource;
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vreg->rpm = dev_get_drvdata(pdev->dev.parent);
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if (!vreg->rpm) {
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dev_err(&pdev->dev, "unable to retrieve handle to rpm\n");
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return -ENODEV;
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}
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vreg->desc.id = -1;
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vreg->desc.owner = THIS_MODULE;
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vreg->desc.type = REGULATOR_VOLTAGE;
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vreg->desc.name = reg->name;
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vreg->desc.supply_name = reg->supply;
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vreg->desc.of_match = reg->name;
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vreg->desc.of_parse_cb = rpm_reg_of_parse;
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initdata = of_get_regulator_init_data(&pdev->dev, pdev->dev.of_node,
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&vreg->desc);
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if (!initdata)
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return -EINVAL;
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vreg->rpm = dev_get_drvdata(pdev->dev.parent);
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if (!vreg->rpm) {
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dev_err(&pdev->dev, "unable to retrieve handle to rpm\n");
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return -ENODEV;
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}
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key = "reg";
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ret = of_property_read_u32(pdev->dev.of_node, key, &val);
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if (ret) {
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dev_err(&pdev->dev, "failed to read %s\n", key);
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return ret;
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}
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vreg->resource = val;
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if ((vreg->parts->uV.mask || vreg->parts->mV.mask) &&
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(!initdata->constraints.min_uV || !initdata->constraints.max_uV)) {
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dev_err(&pdev->dev, "no voltage specified for regulator\n");
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return -EINVAL;
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}
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config.dev = &pdev->dev;
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config.init_data = initdata;
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config.driver_data = vreg;
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config.of_node = pdev->dev.of_node;
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ret = rpm_reg_of_parse(pdev->dev.of_node, &vreg->desc, &config);
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if (ret)
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return ret;
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rdev = devm_regulator_register(&pdev->dev, &vreg->desc, &config);
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if (IS_ERR(rdev)) {
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dev_err(&pdev->dev, "can't register regulator\n");
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return PTR_ERR(rdev);
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config.dev = &pdev->dev;
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config.driver_data = vreg;
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rdev = devm_regulator_register(&pdev->dev, &vreg->desc, &config);
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if (IS_ERR(rdev)) {
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dev_err(&pdev->dev, "can't register regulator\n");
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return PTR_ERR(rdev);
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}
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}
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return 0;
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