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MHI Host

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========
 
 Core
 ----
 
 - Use mhi_soc_reset() API for resetting the modem in case of crash.
 - Fixed a race condition between mhi_prepare_channel() and M0 state
   transition. This can happen when mhi_prepare_channel() was updating the
   read/write pointers and in parallel, the mhi_pm_m0_transition() rings
   the doorbell of all channels without checking if it was enabled or not.
   Fixed the race by ringing the doorbell only for the enabled channels in
   mhi_pm_m0_transition().
 
 pci_generic
 -----------
 
 - Added a secondary "AT" port using the OEM reserved channel of Telit FN990
   modem.
 - Added support for a SDX55 variant modem that exists in the Qualcomm
   SC8280XP Compute Reference Design (CRD).
 - Added support for a T99W175 variant modem manufactured by HP. The modem
   uses the same configuration as of T99W175, but with a different VID:PID.
 - Added local definitions for some VIDs (Thales and Quectel).
 
 MAINTAINERS
 ===========
 
 - Removed Hemant from MHI MAINTAINERS list since he left Qualcomm and
   expressed his wish to not continue doing reviews for MHI patches.
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Merge tag 'mhi-for-v6.2' of git://git.kernel.org/pub/scm/linux/kernel/git/mani/mhi into char-misc-next

Manivannan writes:
  "MHI Host:

   Core:
   - Use mhi_soc_reset() API for resetting the modem in case of crash.
   - Fixed a race condition between mhi_prepare_channel() and M0 state
     transition. This can happen when mhi_prepare_channel() was updating the
     read/write pointers and in parallel, the mhi_pm_m0_transition() rings
     the doorbell of all channels without checking if it was enabled or not.
     Fixed the race by ringing the doorbell only for the enabled channels in
     mhi_pm_m0_transition().

   pci_generic:
   - Added a secondary "AT" port using the OEM reserved channel of Telit FN990
     modem.
   - Added support for a SDX55 variant modem that exists in the Qualcomm
     SC8280XP Compute Reference Design (CRD).
   - Added support for a T99W175 variant modem manufactured by HP. The modem
     uses the same configuration as of T99W175, but with a different VID:PID.
   - Added local definitions for some VIDs (Thales and Quectel).

   MAINTAINERS:
   - Removed Hemant from MHI MAINTAINERS list since he left Qualcomm and
     expressed his wish to not continue doing reviews for MHI patches."

* tag 'mhi-for-v6.2' of git://git.kernel.org/pub/scm/linux/kernel/git/mani/mhi:
  bus: mhi: host: pci_generic: Add definition for some VIDs
  bus: mhi: host: pci_generic: Add HP variant of T99W175
  bus: mhi: host: pci_generic: add support for sc8280xp-crd SDX55 variant
  MAINTAINERS: Remove Hemant from MHI bus
  bus: mhi: host: pci_generic: Add a secondary AT port to Telit FN990
  bus: mhi: host: Fix race between channel preparation and M0 event
  bus: mhi: host: Use mhi_soc_reset() API in place of register write
This commit is contained in:
Greg Kroah-Hartman 2022-11-23 19:37:24 +01:00
commit 08c9d2f561
4 changed files with 21 additions and 12 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

1
MAINTAINERS
View file

@ -13405,7 +13405,6 @@ F: arch/arm64/boot/dts/marvell/armada-3720-uDPU.dts
MHI BUS
M: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
R: Hemant Kumar <quic_hemantk@quicinc.com>
L: mhi@lists.linux.dev
L: linux-arm-msm@vger.kernel.org
S: Maintained

4
drivers/bus/mhi/host/boot.c
View file

@ -118,9 +118,7 @@ static int __mhi_download_rddm_in_panic(struct mhi_controller *mhi_cntrl)
/* Hardware reset so force device to enter RDDM */
dev_dbg(dev,
"Did not enter RDDM, do a host req reset\n");
mhi_write_reg(mhi_cntrl, mhi_cntrl->regs,
MHI_SOC_RESET_REQ_OFFSET,
MHI_SOC_RESET_REQ);
mhi_soc_reset(mhi_cntrl);
udelay(delayus);
}

25
drivers/bus/mhi/host/pci_generic.c
View file

@ -24,6 +24,10 @@
#define HEALTH_CHECK_PERIOD (HZ * 2)
/* PCI VID definitions */
#define PCI_VENDOR_ID_THALES 0x1269
#define PCI_VENDOR_ID_QUECTEL 0x1eac
/**
* struct mhi_pci_dev_info - MHI PCI device specific information
* @config: MHI controller configuration
@ -340,6 +344,8 @@ static const struct mhi_channel_config mhi_foxconn_sdx55_channels[] = {
MHI_CHANNEL_CONFIG_DL(13, "MBIM", 32, 0),
MHI_CHANNEL_CONFIG_UL(32, "DUN", 32, 0),
MHI_CHANNEL_CONFIG_DL(33, "DUN", 32, 0),
MHI_CHANNEL_CONFIG_UL(92, "DUN2", 32, 1),
MHI_CHANNEL_CONFIG_DL(93, "DUN2", 32, 1),
MHI_CHANNEL_CONFIG_HW_UL(100, "IP_HW0_MBIM", 128, 2),
MHI_CHANNEL_CONFIG_HW_DL(101, "IP_HW0_MBIM", 128, 3),
};
@ -542,6 +548,8 @@ static const struct mhi_pci_dev_info mhi_telit_fn990_info = {
static const struct pci_device_id mhi_pci_id_table[] = {
{ PCI_DEVICE(PCI_VENDOR_ID_QCOM, 0x0304),
.driver_data = (kernel_ulong_t) &mhi_qcom_sdx24_info },
{ PCI_DEVICE_SUB(PCI_VENDOR_ID_QCOM, 0x0306, PCI_VENDOR_ID_QCOM, 0x010c),
.driver_data = (kernel_ulong_t) &mhi_foxconn_sdx55_info },
/* EM919x (sdx55), use the same vid:pid as qcom-sdx55m */
{ PCI_DEVICE_SUB(PCI_VENDOR_ID_QCOM, 0x0306, 0x18d7, 0x0200),
.driver_data = (kernel_ulong_t) &mhi_sierra_em919x_info },
@ -555,11 +563,11 @@ static const struct pci_device_id mhi_pci_id_table[] = {
.driver_data = (kernel_ulong_t) &mhi_telit_fn990_info },
{ PCI_DEVICE(PCI_VENDOR_ID_QCOM, 0x0308),
.driver_data = (kernel_ulong_t) &mhi_qcom_sdx65_info },
{ PCI_DEVICE(0x1eac, 0x1001), /* EM120R-GL (sdx24) */
{ PCI_DEVICE(PCI_VENDOR_ID_QUECTEL, 0x1001), /* EM120R-GL (sdx24) */
.driver_data = (kernel_ulong_t) &mhi_quectel_em1xx_info },
{ PCI_DEVICE(0x1eac, 0x1002), /* EM160R-GL (sdx24) */
{ PCI_DEVICE(PCI_VENDOR_ID_QUECTEL, 0x1002), /* EM160R-GL (sdx24) */
.driver_data = (kernel_ulong_t) &mhi_quectel_em1xx_info },
{ PCI_DEVICE(0x1eac, 0x2001), /* EM120R-GL for FCCL (sdx24) */
{ PCI_DEVICE(PCI_VENDOR_ID_QUECTEL, 0x2001), /* EM120R-GL for FCCL (sdx24) */
.driver_data = (kernel_ulong_t) &mhi_quectel_em1xx_info },
/* T99W175 (sdx55), Both for eSIM and Non-eSIM */
{ PCI_DEVICE(PCI_VENDOR_ID_FOXCONN, 0xe0ab),
@ -583,17 +591,20 @@ static const struct pci_device_id mhi_pci_id_table[] = {
{ PCI_DEVICE(PCI_VENDOR_ID_FOXCONN, 0xe0d9),
.driver_data = (kernel_ulong_t) &mhi_foxconn_sdx65_info },
/* MV31-W (Cinterion) */
{ PCI_DEVICE(0x1269, 0x00b3),
{ PCI_DEVICE(PCI_VENDOR_ID_THALES, 0x00b3),
.driver_data = (kernel_ulong_t) &mhi_mv31_info },
/* MV31-W (Cinterion), based on new baseline */
{ PCI_DEVICE(0x1269, 0x00b4),
{ PCI_DEVICE(PCI_VENDOR_ID_THALES, 0x00b4),
.driver_data = (kernel_ulong_t) &mhi_mv31_info },
/* MV32-WA (Cinterion) */
{ PCI_DEVICE(0x1269, 0x00ba),
{ PCI_DEVICE(PCI_VENDOR_ID_THALES, 0x00ba),
.driver_data = (kernel_ulong_t) &mhi_mv32_info },
/* MV32-WB (Cinterion) */
{ PCI_DEVICE(0x1269, 0x00bb),
{ PCI_DEVICE(PCI_VENDOR_ID_THALES, 0x00bb),
.driver_data = (kernel_ulong_t) &mhi_mv32_info },
/* T99W175 (sdx55), HP variant */
{ PCI_DEVICE(0x03f0, 0x0a6c),
.driver_data = (kernel_ulong_t) &mhi_foxconn_sdx55_info },
{ }
};
MODULE_DEVICE_TABLE(pci, mhi_pci_id_table);

3
drivers/bus/mhi/host/pm.c
View file

@ -301,7 +301,8 @@ int mhi_pm_m0_transition(struct mhi_controller *mhi_cntrl)
read_lock_irq(&mhi_chan->lock);
/* Only ring DB if ring is not empty */
if (tre_ring->base && tre_ring->wp != tre_ring->rp)
if (tre_ring->base && tre_ring->wp != tre_ring->rp &&
mhi_chan->ch_state == MHI_CH_STATE_ENABLED)
mhi_ring_chan_db(mhi_cntrl, mhi_chan);
read_unlock_irq(&mhi_chan->lock);
}